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authorgalmes2004-03-03 20:20:53 +0000
committergalmes2004-03-03 20:20:53 +0000
commit3f0458c3087881ee7e3a07f0838a692c93b0919f (patch)
tree42985a9350b14b95adc86614f6a6a4bf72f94e8f /2004/n/fpga/src
parentdc5116c2d6624d1607eeef67fab5d53722dc012e (diff)
Modification et ajout de fichiers pour la GPIO et la gestion des
interruptions.
Diffstat (limited to '2004/n/fpga/src')
-rw-r--r--2004/n/fpga/src/bascule/bascule.vhd15
-rw-r--r--2004/n/fpga/src/bascule/bch_bascule.vhd8
-rw-r--r--2004/n/fpga/src/interrupt/IRQ_manager.vhd30
-rw-r--r--2004/n/fpga/src/interrupt/bch_IRQ_manager.vhd52
-rw-r--r--2004/n/fpga/src/interrupt/bch_conserv.vhd20
-rw-r--r--2004/n/fpga/src/interrupt/conserv.vhd18
-rw-r--r--2004/n/fpga/src/packages/isa_const.vhd7
7 files changed, 124 insertions, 26 deletions
diff --git a/2004/n/fpga/src/bascule/bascule.vhd b/2004/n/fpga/src/bascule/bascule.vhd
index e3511ee..c17fe8f 100644
--- a/2004/n/fpga/src/bascule/bascule.vhd
+++ b/2004/n/fpga/src/bascule/bascule.vhd
@@ -37,6 +37,8 @@ begin
data_out <= x"00";
it_detected <= '0';
elsif (clk'event and clk = '1') then
+
+ -- TODO : ici c'est séquentiel. On peut le faire en combinatiore ?
if (data_in(0) = '1') then data_out(0) <= '1'; end if;
if (data_in(1) = '1') then data_out(1) <= '1'; end if;
if (data_in(2) = '1') then data_out(2) <= '1'; end if;
@@ -45,9 +47,22 @@ begin
if (data_in(5) = '1') then data_out(5) <= '1'; end if;
if (data_in(6) = '1') then data_out(6) <= '1'; end if;
if (data_in(7) = '1') then data_out(7) <= '1'; end if;
+
-- Détection des interruptions.
if (data_in /= x"00") then it_detected <= '1'; end if;
end if;
end process;
+
+-- TODO : modifier et mettre en concurentiel cette partie (la c'est en
+-- séquentiel !!!)
+
+-- data_out(0) <= '1' when (data_in(0) = '1');
+-- data_out(1) <= '1' when (data_in(1) = '1');
+-- data_out(2) <= '1' when (data_in(2) = '1');
+-- data_out(3) <= '1' when (data_in(3) = '1');
+-- data_out(4) <= '1' when (data_in(4) = '1');
+-- data_out(5) <= '1' when (data_in(5) = '1');
+-- data_out(6) <= '1' when (data_in(6) = '1');
+-- data_out(7) <= '1' when (data_in(7) = '1');
end RTL;
diff --git a/2004/n/fpga/src/bascule/bch_bascule.vhd b/2004/n/fpga/src/bascule/bch_bascule.vhd
index 6fac989..dbe0283 100644
--- a/2004/n/fpga/src/bascule/bch_bascule.vhd
+++ b/2004/n/fpga/src/bascule/bch_bascule.vhd
@@ -48,10 +48,10 @@ begin
'0' after CK_PERIOD,
'1' after 5*CK_PERIOD,
'0' after 7*CK_PERIOD;
- data_in <= x"02",
- x"00" after 2*CK_PERIOD,
- x"08" after 5*CK_PERIOD,
- x"01" after 7*CK_PERIOD;
+ data_in <= x"00",
+ x"08" after 2*CK_PERIOD,
+ x"01" after 5*CK_PERIOD,
+ x"00" after 8*CK_PERIOD;
--x"03" after 5*CK_PERIOD;
end sim1;
diff --git a/2004/n/fpga/src/interrupt/IRQ_manager.vhd b/2004/n/fpga/src/interrupt/IRQ_manager.vhd
new file mode 100644
index 0000000..47359a7
--- /dev/null
+++ b/2004/n/fpga/src/interrupt/IRQ_manager.vhd
@@ -0,0 +1,30 @@
+-- IRQ_manager.vhd
+-- Eurobot 2004 : APB Team
+-- Auteur : Pierre-André Galmes
+-- Bloc de gestion des IRQ (~ OU logique).
+
+-- Principe :
+-- Bloc trois états (three-state) qui met les sorties en hautes impédance si
+-- elle ne sont pas "enabled".
+
+library ieee;
+use ieee.std_logic_1164.all;
+--use ieee.std_logic_arith.all;
+--use ieee.std_logic_unsigned.all;
+
+use work.isa_const.all;
+use work.nono_const.all;
+
+
+entity IRQ_manager is
+ port (
+ it_detected : in std_logic_vector(2 downto 0);
+ IRQ : out std_logic
+ );
+end entity;
+
+architecture RTL of IRQ_manager is
+begin
+ -- partie combinatoire.
+ IRQ <= IRQ_ON when (it_detected /= "000") else IRQ_OFF;
+end RTL;
diff --git a/2004/n/fpga/src/interrupt/bch_IRQ_manager.vhd b/2004/n/fpga/src/interrupt/bch_IRQ_manager.vhd
new file mode 100644
index 0000000..1c59d1b
--- /dev/null
+++ b/2004/n/fpga/src/interrupt/bch_IRQ_manager.vhd
@@ -0,0 +1,52 @@
+-- bch_IRQ_manager.vhd
+-- Eurobot 2004 : APB Team
+-- Auteur : Pierre-André Galmes
+-- Test de IRQ_manager.
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_arith.all;
+use ieee.std_logic_unsigned.all;
+
+use work.isa_const.all;
+use work.nono_const.all;
+
+
+entity bch_IRQ_manager is
+end bch_IRQ_manager;
+
+architecture sim1 of bch_IRQ_manager is
+
+ component IRQ_manager
+ port (
+ it_detected : in std_logic_vector(2 downto 0);
+ IRQ : out std_logic
+ );
+ end component;
+
+ -- définiton des signaux
+ signal it_detected : std_logic_vector(2 downto 0);
+ signal IRQ : std_logic;
+
+begin
+ U1 : IRQ_manager port map (
+ it_detected => it_detected,
+ IRQ => IRQ
+ );
+
+ it_detected <= "000",
+ "001" after 2*CK_PERIOD,
+ "000" after 3*CK_PERIOD,
+ "010" after 4*CK_PERIOD,
+ "000" after 5*CK_PERIOD,
+ "100" after 6*CK_PERIOD,
+ "000" after 7*CK_PERIOD;
+ --x"03" after 5*CK_PERIOD;
+end sim1;
+
+configuration cf1_bch_IRQ_manager of bch_IRQ_manager is
+ for sim1
+ for all : IRQ_manager use entity work.IRQ_manager(RTL); end for;
+ end for;
+end cf1_bch_IRQ_manager;
+
diff --git a/2004/n/fpga/src/interrupt/bch_conserv.vhd b/2004/n/fpga/src/interrupt/bch_conserv.vhd
index 6fac989..e99bf5e 100644
--- a/2004/n/fpga/src/interrupt/bch_conserv.vhd
+++ b/2004/n/fpga/src/interrupt/bch_conserv.vhd
@@ -1,7 +1,7 @@
--- bch_bascule.vhd
+-- bch_conserv.vhd
-- Eurobot 2004 : APB Team
-- Auteur : Pierre-André Galmes
--- Test de bascule.
+-- Test de conserv.
library ieee;
use ieee.std_logic_1164.all;
@@ -12,12 +12,12 @@ use work.isa_const.all;
use work.nono_const.all;
-entity bch_bascule is
-end bch_bascule;
+entity bch_conserv is
+end bch_conserv;
-architecture sim1 of bch_bascule is
+architecture sim1 of bch_conserv is
- component bascule
+ component conserv
port (
clk : in std_logic;
rst : in std_logic;
@@ -35,7 +35,7 @@ architecture sim1 of bch_bascule is
signal it_detected : std_logic;
begin
- U1 : bascule port map (
+ U1 : conserv port map (
clk => clk,
rst => rst,
data_in => data_in,
@@ -55,9 +55,9 @@ begin
--x"03" after 5*CK_PERIOD;
end sim1;
-configuration cf1_bch_bascule of bch_bascule is
+configuration cf1_bch_conserv of bch_conserv is
for sim1
- for all : bascule use entity work.bascule(RTL); end for;
+ for all : conserv use entity work.conserv(RTL); end for;
end for;
-end cf1_bch_bascule;
+end cf1_bch_conserv;
diff --git a/2004/n/fpga/src/interrupt/conserv.vhd b/2004/n/fpga/src/interrupt/conserv.vhd
index e3511ee..97a13f7 100644
--- a/2004/n/fpga/src/interrupt/conserv.vhd
+++ b/2004/n/fpga/src/interrupt/conserv.vhd
@@ -1,11 +1,8 @@
--- bascule.vhd
+-- conserv.vhd
-- Eurobot 2004 : APB Team
-- Auteur : Pierre-André Galmes
--- Bascule 8 bits avec signal de détection des changements.
-
--- Remarque :
--- masque : si bit à 1 => on détecte l'interruption.
--- si bit à 0 => on détecte pas l'interruption.
+-- Lors de la détection d'un front, garde un état haut durant 2 cycles
+-- d'horloge.
library ieee;
@@ -17,17 +14,16 @@ use work.isa_const.all;
use work.nono_const.all;
-entity bascule is
+entity conserv is
port (
clk : in std_logic;
rst : in std_logic;
data_in : in T_DATA;
data_out : out T_DATA;
- it_detected : out std_logic
);
end entity;
-architecture RTL of bascule is
+architecture RTL of conserv is
begin
-- process séquentiel
process (rst, clk)
@@ -35,9 +31,9 @@ begin
if (rst = '1') then
-- ne pas déclencher d'it après rst.
data_out <= x"00";
- it_detected <= '0';
elsif (clk'event and clk = '1') then
- if (data_in(0) = '1') then data_out(0) <= '1'; end if;
+ if (data_in(0) = '1') then
+ data_out(0) <= '1'; end if;
if (data_in(1) = '1') then data_out(1) <= '1'; end if;
if (data_in(2) = '1') then data_out(2) <= '1'; end if;
if (data_in(3) = '1') then data_out(3) <= '1'; end if;
diff --git a/2004/n/fpga/src/packages/isa_const.vhd b/2004/n/fpga/src/packages/isa_const.vhd
index 5f5d1d4..8db9836 100644
--- a/2004/n/fpga/src/packages/isa_const.vhd
+++ b/2004/n/fpga/src/packages/isa_const.vhd
@@ -24,9 +24,14 @@ package isa_const is
constant ISA_READ : std_logic := '0';
constant ISA_WRITE : std_logic := '1';
+ -- Comportement de la ligne IRQ.
+ constant IRQ_ON : std_logic := '0';
+ constant IRQ_OFF : std_logic := '1'; -- TODO : est-ce pas 'Z' ?
+
-- Nombre de bits du bus d'adresse
constant NB_BIT_ADDRESS_ISA : integer := 20;
- subtype T_ADDRESS_ISA is std_logic_vector((NB_BIT_ADDRESS_ISA - 1) downto 0);
+ subtype T_ADDRESS_ISA is std_logic_vector(
+ (NB_BIT_ADDRESS_ISA - 1) downto 0);
end isa_const;