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authorchrysn2012-10-18 13:30:19 +0200
committerchrysn2012-10-18 13:31:17 +0200
commit172ce56e3cbc7e64fd3e6a3dc564eb10e0ca766a (patch)
treeb26153bbc41374e35370214a765b87b25bc01c33 /include/libopencm3/stm32/f1
parent7c33025c318bcc43cfcd3a23a76d14b299fecc0a (diff)
parent94ce82396bd69dfde8807dad27e23f30913247aa (diff)
nvic unification
* created include/libopencm3/cm3/nvic.h from the respective stm32 and lpc43xx files. the chip specific definitions were left in place (they were already split out in sthe stm32 case). * created lib/cm3/nvic.c from the respective stm32 and lpc43xx files. a hack from the lpc43xx was taken over (for manipulating the internal interrupts); for now it'll work. * created a include/libopencm3/dispatch/ directory where the dispatching of files with common interfaces but different implenentations can happen; for now, an nvic.h there includes the respective irq name definitions. (future implementations might have some automation or preprocessor magic there; so far, it's manual dispatching based on defines.) * for efm32, an nvic.h gets generated from an interrupt list, the rationale for code generation is, in this case, that this can't be done easily in c preprocessor, and it's really just a list of definitions and not code proper. * examples now include <libopencm3/cm3/nvic.h> instead of <libopencm3/stm32/nvic.h>
Diffstat (limited to 'include/libopencm3/stm32/f1')
-rw-r--r--include/libopencm3/stm32/f1/nvic_f1.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/libopencm3/stm32/f1/nvic_f1.h b/include/libopencm3/stm32/f1/nvic_f1.h
index 5223bb6..1544e4f 100644
--- a/include/libopencm3/stm32/f1/nvic_f1.h
+++ b/include/libopencm3/stm32/f1/nvic_f1.h
@@ -109,6 +109,8 @@ LGPL License Terms @ref lgpl_license
#define NVIC_CAN2_RX1_IRQ 65
#define NVIC_CAN2_SCE_IRQ 66
#define NVIC_OTG_FS_IRQ 67
+
+#define NVIC_IRQ_COUNT 68
/**@}*/
#endif