summaryrefslogtreecommitdiff
path: root/polux/linux-2.6.10/drivers/net/synop3504/synop3504_mii.h
blob: 5425334e00edf80215d1a688debf31133cef4360 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
#ifndef synop3504_mii_h
#define synop3504_mii_h

#define OFFSET_OUI      10
#define OFFSET_MODEL    4

/****** Organizationally Unique Identifier *****/
#define OUI_ICS             (0x00057D)
#define OUI_MICREL          (0x000885)
#define OUI_JVA             (0x00BEEF)
#define OUI_REALTEK         (0x000020)
#define OUI_ICPLUS          (0x0090C3)

/********* Manufacture’s Model Number **********/

#define MODEL_1893BF        (0x04)
#define MODEL_1893CF        (0x05)
#define MODEL_IP101A        (0x05)
#define MODEL_IP175C        (0x18)
/** The REAL ID is the same as IP175C */
#define MODEL_IP175D        (0x19)
#define MODEL_KS8721        (0x21)
#define MODEL_RTL8201CP     (0x20)

/********* Supported PHY ***********************/
/**  Revision Number ignored */
enum phy_chipset_id
{
    /**  ICS list */
    ICS_1893BF = ((OUI_ICS << OFFSET_OUI) + (MODEL_1893BF << OFFSET_MODEL)),
    ICS_1893CF = ((OUI_ICS << OFFSET_OUI) + (MODEL_1893CF << OFFSET_MODEL)),

    /**  MICREL List */
    MICREL_KS8721 =
        ((OUI_MICREL << OFFSET_OUI) + (MODEL_KS8721 << OFFSET_MODEL)),

    /**  REALTEK List */
    REALTEK_RTL8201CP =
        ((OUI_REALTEK << OFFSET_OUI) + (MODEL_RTL8201CP << OFFSET_MODEL)),

    /**  IC+ list. */
    ICPLUS_IP101A =
        ((OUI_ICPLUS << OFFSET_OUI) + (MODEL_IP101A << OFFSET_MODEL)),
    ICPLUS_IP175C =
        ((OUI_ICPLUS << OFFSET_OUI) + (MODEL_IP175C << OFFSET_MODEL)),
    ICPLUS_IP175D =
        ((OUI_ICPLUS << OFFSET_OUI) + (MODEL_IP175D << OFFSET_MODEL)),

    /**  JVA List */
    JVA_1893BF = ((OUI_JVA << OFFSET_OUI) + (MODEL_1893BF << OFFSET_MODEL))
};

/*******************  ICS  *********************/
/** specific regs */
/** Autonegotiation Next Page */
#define MII_NEXTPAGE         (0x07)
/** Autonegotiation Next Page Link Partner */
#define MII_NEXTPAGELPA      (0x08)
/** Extended Control */
#define MII_EXCR             (0x10)
/** Quick Poll Detailed Status Register */
#define MII_QPDSR            (0x11)
/** Extended Control 2 */
#define MII_EXCR2            (0x13)
/** QPDSR reg */
#define QPDSR_SPEED100       (0x8000)
#define QPDSR_FULLDPLX       (0x4000)
#define QPDSR_AN_PMB2        (0x2000)
#define QPDSR_AN_PMB1        (0x1000)
#define QPDSR_AN_PMB0        (0x0800)
#define QPDSR_100TX_LOST     (0x0400)
#define QPDSR_PLL_FAIL       (0x0200)
#define QPDSR_FALSE_CARRIER  (0x0100)
#define QPDSR_INV_SYM        (0x0080)
#define QPDSR_HALT_SYM       (0x0040)
#define QPDSR_PREM_END       (0x0020)
#define QPDSR_ANEGCOMPLETE   (0x0010)
#define QPDSR_100TX_DTCT     (0x0008)
#define QPDSR_JABBER_DTCT    (0x0004)
#define QPDSR_REM_FAULT      (0x0002)
#define QPDSR_LSTATUS        (0x0001)


/*****************  MICREL  *******************/
/** specific reg */
#define MII_PHYCTRL          (0x1F)
/** PHYCTRL reg */
#define PHYCTRL_PAIRSWP_DIS  (0x2000)
#define PHYCTRL_ENERGY       (0x1000)
#define PHYCTRL_FORCE_LINK   (0x0800)
#define PHYCTRL_POW_SAVE     (0x0400)
#define PHYCTRL_INTR_HIGH    (0x0200)
#define PHYCTRL_EN_JABBER    (0x0100)
#define PHYCTRL_ANEGCOMPLETE (0x0080)
#define PHYCTRL_EN_PAUSE     (0x0040)
#define PHYCTRL_PHY_ISOL     (0x0020)
#define PHYCTRL_OP_MODE      (0x001C)
#define PHYCTRL_EN_SQE_TEST  (0x0002)
#define PHYCTRL_DIS_DATA_SCR (0x0001)
/** PHYCTRL_OP_MODE values */
#define PHYCTRL_OM_ANEG      (0x0 << 2)
#define PHYCTRL_OM_10HALF    (0x1 << 2)
#define PHYCTRL_OM_100HALF   (0x2 << 2)
#define PHYCTRL_OM_DEFAULT   (0x3 << 2)
#define PHYCTRL_OM_RESERVED  (0x4 << 2)
#define PHYCTRL_OM_10FULL    (0x5 << 2)
#define PHYCTRL_OM_100FULL   (0x6 << 2)
#define PHYCTRL_OM_PHY_ISOL  (0x7 << 2)

/*****************  ICPLUS_IP175D  *******************/
#define IP175D_VLAN_TABLE_SIZE          16
#define IP175D_VLAN_TABLE_COMMON_PHY    5
#define IP175D_VLAN_TABLE_NO_TAG_LINE   6

/*****************   ETHTOOL Section  *******************/
#define    SYNOP3504__OUI1   0
#define    SYNOP3504__OUI2   1

/*****************  specific reg ICPLUS_IP175C  *******************/
enum
{
    ICPLUS_IP175C__BMSR_PHY0 = 2,
    ICPLUS_IP175C__BMSR_PHY1,
    ICPLUS_IP175C__BMSR_PHY2,
    ICPLUS_IP175C__BMSR_PHY3,
    ICPLUS_IP175C__BMSR_PHY4,

    ICPLUS_IP175C__PHY29_MII18 = 7,
    ICPLUS_IP175C__PHY29_MII19,
    ICPLUS_IP175C__PHY29_MII20,
    ICPLUS_IP175C__PHY29_MII21,
    ICPLUS_IP175C__PHY29_MII22,
    ICPLUS_IP175C__PHY29_MII23,
    ICPLUS_IP175C__PHY29_MII24,
    ICPLUS_IP175C__PHY29_MII25,
    ICPLUS_IP175C__PHY29_MII26,
    ICPLUS_IP175C__PHY29_MII27,
    ICPLUS_IP175C__PHY29_MII28,
    ICPLUS_IP175C__PHY29_MII29,
    ICPLUS_IP175C__PHY29_MII30,
    ICPLUS_IP175C__PHY29_MII31,

    ICPLUS_IP175C__PHY30_MII0 = 31,
    ICPLUS_IP175C__PHY30_MII1,
    ICPLUS_IP175C__PHY30_MII2,
    ICPLUS_IP175C__PHY30_MII3,
    ICPLUS_IP175C__PHY30_MII4,
    ICPLUS_IP175C__PHY30_MII5,
    ICPLUS_IP175C__PHY30_MII6,
    ICPLUS_IP175C__PHY30_MII7,
    ICPLUS_IP175C__PHY30_MII8,
    ICPLUS_IP175C__PHY30_MII9,
    ICPLUS_IP175C__PHY30_MII10,
    ICPLUS_IP175C__PHY30_MII11,
    ICPLUS_IP175C__PHY30_MII12,
    ICPLUS_IP175C__PHY30_MII13,
    ICPLUS_IP175C__PHY30_MII14,
    ICPLUS_IP175C__PHY30_MII15,
    ICPLUS_IP175C__PHY30_MII16,
    ICPLUS_IP175C__PHY30_MII17,
    ICPLUS_IP175C__PHY30_MII18,
    ICPLUS_IP175C__PHY30_MII19,
    ICPLUS_IP175C__PHY30_MII20,
    ICPLUS_IP175C__PHY30_MII21,
    ICPLUS_IP175C__PHY30_MII22,
    ICPLUS_IP175C__PHY30_MII23,
    ICPLUS_IP175C__PHY30_MII24,
    ICPLUS_IP175C__PHY30_MII25,
    ICPLUS_IP175C__PHY30_MII26,
    ICPLUS_IP175C__PHY30_MII27,
    ICPLUS_IP175C__PHY30_MII28,
    ICPLUS_IP175C__PHY30_MII29,
    ICPLUS_IP175C__PHY30_MII30,
    ICPLUS_IP175C__PHY30_MII31,

    ICPLUS_IP175C__PHY31_MII0 = 63,
    ICPLUS_IP175C__PHY31_MII1,
    ICPLUS_IP175C__PHY31_MII2,
    ICPLUS_IP175C__PHY31_MII3,
    ICPLUS_IP175C__PHY31_MII4,
    ICPLUS_IP175C__PHY31_MII5,
    ICPLUS_IP175C__PHY31_MII6,
};

/*****************  specific reg ICPLUS_IP175D  *******************/
enum
{
    ICPLUS_IP175D__BMSR_PHY0 = 2,
    ICPLUS_IP175D__BMSR_PHY1,
    ICPLUS_IP175D__BMSR_PHY2,
    ICPLUS_IP175D__BMSR_PHY3,
    ICPLUS_IP175D__BMSR_PHY4,

    ICPLUS_IP175D__PHY20_MII0 = 7,
    ICPLUS_IP175D__PHY20_MII2,
    ICPLUS_IP175D__PHY20_MII3,
    ICPLUS_IP175D__PHY20_MII4,
    ICPLUS_IP175D__PHY20_MII5,
    ICPLUS_IP175D__PHY20_MII6,
    ICPLUS_IP175D__PHY20_MII7,
    ICPLUS_IP175D__PHY20_MII8,
    ICPLUS_IP175D__PHY20_MII9,
    ICPLUS_IP175D__PHY20_MII10,
    ICPLUS_IP175D__PHY20_MII11,
    ICPLUS_IP175D__PHY20_MII12,
    ICPLUS_IP175D__PHY20_MII13,
    ICPLUS_IP175D__PHY20_MII14,
    ICPLUS_IP175D__PHY20_MII15,
    ICPLUS_IP175D__PHY20_MII16,
    ICPLUS_IP175D__PHY20_MII17,
    ICPLUS_IP175D__PHY20_MII18,
    ICPLUS_IP175D__PHY20_MII19,
    ICPLUS_IP175D__PHY20_MII20,
    ICPLUS_IP175D__PHY20_MII21,
    ICPLUS_IP175D__PHY20_MII22,
    ICPLUS_IP175D__PHY20_MII24,

    ICPLUS_IP175D__PHY21_MII0 = 30,
    ICPLUS_IP175D__PHY21_MII1,
    ICPLUS_IP175D__PHY21_MII2,
    ICPLUS_IP175D__PHY21_MII3,
    ICPLUS_IP175D__PHY21_MII4,
    ICPLUS_IP175D__PHY21_MII5,
    ICPLUS_IP175D__PHY21_MII6,
    ICPLUS_IP175D__PHY21_MII7,
    ICPLUS_IP175D__PHY21_MII8,
    ICPLUS_IP175D__PHY21_MII9,
    ICPLUS_IP175D__PHY21_MII10,
    ICPLUS_IP175D__PHY21_MII12,
    ICPLUS_IP175D__PHY21_MII14,
    ICPLUS_IP175D__PHY21_MII15,
    ICPLUS_IP175D__PHY21_MII16,
    ICPLUS_IP175D__PHY21_MII17,
    ICPLUS_IP175D__PHY21_MII18,
    ICPLUS_IP175D__PHY21_MII19,
    ICPLUS_IP175D__PHY21_MII20,
    ICPLUS_IP175D__PHY21_MII21,
    ICPLUS_IP175D__PHY21_MII22,
    ICPLUS_IP175D__PHY21_MII23,
    ICPLUS_IP175D__PHY21_MII24,
    ICPLUS_IP175D__PHY21_MII25,

    ICPLUS_IP175D__PHY22_MII0 = 54,
    ICPLUS_IP175D__PHY22_MII1,
    ICPLUS_IP175D__PHY22_MII2,
    ICPLUS_IP175D__PHY22_MII3,
    ICPLUS_IP175D__PHY22_MII4,
    ICPLUS_IP175D__PHY22_MII5,
    ICPLUS_IP175D__PHY22_MII6,
    ICPLUS_IP175D__PHY22_MII7,
    ICPLUS_IP175D__PHY22_MII8,
    ICPLUS_IP175D__PHY22_MII9,
    ICPLUS_IP175D__PHY22_MII10,
    ICPLUS_IP175D__PHY22_MII11,
    ICPLUS_IP175D__PHY22_MII12,
    ICPLUS_IP175D__PHY22_MII13,
    ICPLUS_IP175D__PHY22_MII14,
    ICPLUS_IP175D__PHY22_MII15,
    ICPLUS_IP175D__PHY22_MII16,
    ICPLUS_IP175D__PHY22_MII17,
    ICPLUS_IP175D__PHY22_MII18,
    ICPLUS_IP175D__PHY22_MII19,
    ICPLUS_IP175D__PHY22_MII20,
    ICPLUS_IP175D__PHY22_MII21,
    ICPLUS_IP175D__PHY22_MII22,
    ICPLUS_IP175D__PHY22_MII23,
    ICPLUS_IP175D__PHY22_MII24,
    ICPLUS_IP175D__PHY22_MII25,
    ICPLUS_IP175D__PHY22_MII26,
    ICPLUS_IP175D__PHY22_MII27,
    ICPLUS_IP175D__PHY22_MII28,
    ICPLUS_IP175D__PHY22_MII29,

    ICPLUS_IP175D__PHY23_MII0 = 84,
    ICPLUS_IP175D__PHY23_MII1,
    ICPLUS_IP175D__PHY23_MII2,
    ICPLUS_IP175D__PHY23_MII3,
    ICPLUS_IP175D__PHY23_MII4,
    ICPLUS_IP175D__PHY23_MII5,
    ICPLUS_IP175D__PHY23_MII6,
    ICPLUS_IP175D__PHY23_MII7,
    ICPLUS_IP175D__PHY23_MII8,
    ICPLUS_IP175D__PHY23_MII9,
    ICPLUS_IP175D__PHY23_MII10,
    ICPLUS_IP175D__PHY23_MII11,
    ICPLUS_IP175D__PHY23_MII12,
    ICPLUS_IP175D__PHY23_MII13,
    ICPLUS_IP175D__PHY23_MII14,
    ICPLUS_IP175D__PHY23_MII15,
    ICPLUS_IP175D__PHY23_MII16,
    ICPLUS_IP175D__PHY23_MII17,
    ICPLUS_IP175D__PHY23_MII18,
    ICPLUS_IP175D__PHY23_MII19,
    ICPLUS_IP175D__PHY23_MII20,
    ICPLUS_IP175D__PHY23_MII21,
    ICPLUS_IP175D__PHY23_MII22,
    ICPLUS_IP175D__PHY23_MII23,
    ICPLUS_IP175D__PHY23_MII24,
    ICPLUS_IP175D__PHY23_MII25,
    ICPLUS_IP175D__PHY23_MII26,
    ICPLUS_IP175D__PHY23_MII27,
    ICPLUS_IP175D__PHY23_MII28,
    ICPLUS_IP175D__PHY23_MII29,
    ICPLUS_IP175D__PHY23_MII30,
    ICPLUS_IP175D__PHY23_MII31,

    ICPLUS_IP175D__PHY24_MII0 = 116,
    ICPLUS_IP175D__PHY24_MII1,
    ICPLUS_IP175D__PHY24_MII2,
    ICPLUS_IP175D__PHY24_MII3,

    ICPLUS_IP175D__PHY25_MII0 = 120,
    ICPLUS_IP175D__PHY25_MII1,
    ICPLUS_IP175D__PHY25_MII2,
    ICPLUS_IP175D__PHY25_MII3,
    ICPLUS_IP175D__PHY25_MII4,
    ICPLUS_IP175D__PHY25_MII5,
    ICPLUS_IP175D__PHY25_MII6,
    ICPLUS_IP175D__PHY25_MII7,
    ICPLUS_IP175D__PHY25_MII8,
    ICPLUS_IP175D__PHY25_MII9,
    ICPLUS_IP175D__PHY25_MII10,
    ICPLUS_IP175D__PHY25_MII11,
    ICPLUS_IP175D__PHY25_MII12,
    ICPLUS_IP175D__PHY25_MII13,
    ICPLUS_IP175D__PHY25_MII14,
    ICPLUS_IP175D__PHY25_MII15,
    ICPLUS_IP175D__PHY25_MII16,
    ICPLUS_IP175D__PHY25_MII17,
    ICPLUS_IP175D__PHY25_MII18,
    ICPLUS_IP175D__PHY25_MII19,
    ICPLUS_IP175D__PHY25_MII20,
    ICPLUS_IP175D__PHY25_MII21,
    ICPLUS_IP175D__PHY25_MII22,
    ICPLUS_IP175D__PHY25_MII23,

    ICPLUS_IP175D__PHY26_MII0 = 144,
    ICPLUS_IP175D__PHY26_MII1,
    ICPLUS_IP175D__PHY26_MII2,
    ICPLUS_IP175D__PHY26_MII3,
    ICPLUS_IP175D__PHY26_MII4,
    ICPLUS_IP175D__PHY26_MII5,
    ICPLUS_IP175D__PHY26_MII6,
    ICPLUS_IP175D__PHY26_MII7,
    ICPLUS_IP175D__PHY26_MII8,
    ICPLUS_IP175D__PHY26_MII9,
    ICPLUS_IP175D__PHY26_MII10,
    ICPLUS_IP175D__PHY26_MII11,
    ICPLUS_IP175D__PHY26_MII12,
    ICPLUS_IP175D__PHY26_MII13,
    ICPLUS_IP175D__PHY26_MII14,
    ICPLUS_IP175D__PHY26_MII15,
    ICPLUS_IP175D__PHY26_MII16,
    ICPLUS_IP175D__PHY26_MII17,
    ICPLUS_IP175D__PHY26_MII18,
    ICPLUS_IP175D__PHY26_MII19,
    ICPLUS_IP175D__PHY26_MII20,
    ICPLUS_IP175D__PHY26_MII21,
    ICPLUS_IP175D__PHY26_MII22,
    ICPLUS_IP175D__PHY26_MII23
};

#endif /* synop3504_mii_h */