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path: root/polux/linux-2.6.10/drivers/net/synop3504/synop3504_mii.h
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Diffstat (limited to 'polux/linux-2.6.10/drivers/net/synop3504/synop3504_mii.h')
-rw-r--r--polux/linux-2.6.10/drivers/net/synop3504/synop3504_mii.h68
1 files changed, 41 insertions, 27 deletions
diff --git a/polux/linux-2.6.10/drivers/net/synop3504/synop3504_mii.h b/polux/linux-2.6.10/drivers/net/synop3504/synop3504_mii.h
index acf2c9e412..5425334e00 100644
--- a/polux/linux-2.6.10/drivers/net/synop3504/synop3504_mii.h
+++ b/polux/linux-2.6.10/drivers/net/synop3504/synop3504_mii.h
@@ -17,40 +17,52 @@
#define MODEL_1893CF (0x05)
#define MODEL_IP101A (0x05)
#define MODEL_IP175C (0x18)
-#define MODEL_IP175D (0x19) // The REAL ID is the same as IP175C ... big shit. So we robe in ID.
+/** The REAL ID is the same as IP175C */
+#define MODEL_IP175D (0x19)
#define MODEL_KS8721 (0x21)
#define MODEL_RTL8201CP (0x20)
/********* Supported PHY ***********************/
-// Revision Number ignored
-enum phy_chipset_id {
- // ICS list
+/** Revision Number ignored */
+enum phy_chipset_id
+{
+ /** ICS list */
ICS_1893BF = ((OUI_ICS << OFFSET_OUI) + (MODEL_1893BF << OFFSET_MODEL)),
ICS_1893CF = ((OUI_ICS << OFFSET_OUI) + (MODEL_1893CF << OFFSET_MODEL)),
- // MICREL List
- MICREL_KS8721 = ((OUI_MICREL << OFFSET_OUI) + (MODEL_KS8721 << OFFSET_MODEL)),
+ /** MICREL List */
+ MICREL_KS8721 =
+ ((OUI_MICREL << OFFSET_OUI) + (MODEL_KS8721 << OFFSET_MODEL)),
- // REALTEK List
- REALTEK_RTL8201CP = ((OUI_REALTEK << OFFSET_OUI) + (MODEL_RTL8201CP << OFFSET_MODEL)),
+ /** REALTEK List */
+ REALTEK_RTL8201CP =
+ ((OUI_REALTEK << OFFSET_OUI) + (MODEL_RTL8201CP << OFFSET_MODEL)),
- // IC+ list.
- ICPLUS_IP101A = ((OUI_ICPLUS << OFFSET_OUI) + (MODEL_IP101A << OFFSET_MODEL)),
- ICPLUS_IP175C = ((OUI_ICPLUS << OFFSET_OUI) + (MODEL_IP175C << OFFSET_MODEL)),
- ICPLUS_IP175D = ((OUI_ICPLUS << OFFSET_OUI) + (MODEL_IP175D << OFFSET_MODEL)),
+ /** IC+ list. */
+ ICPLUS_IP101A =
+ ((OUI_ICPLUS << OFFSET_OUI) + (MODEL_IP101A << OFFSET_MODEL)),
+ ICPLUS_IP175C =
+ ((OUI_ICPLUS << OFFSET_OUI) + (MODEL_IP175C << OFFSET_MODEL)),
+ ICPLUS_IP175D =
+ ((OUI_ICPLUS << OFFSET_OUI) + (MODEL_IP175D << OFFSET_MODEL)),
- // JVA List
+ /** JVA List */
JVA_1893BF = ((OUI_JVA << OFFSET_OUI) + (MODEL_1893BF << OFFSET_MODEL))
};
/******************* ICS *********************/
-//specific regs
-#define MII_NEXTPAGE (0x07) //Autonegotiation Next Page
-#define MII_NEXTPAGELPA (0x08) //Autonegotiation Next Page Link Partner
-#define MII_EXCR (0x10) //Extended Control
-#define MII_QPDSR (0x11) //Quick Poll Detailed Status Register
-#define MII_EXCR2 (0x13) //Extended Control 2
-//QPDSR reg
+/** specific regs */
+/** Autonegotiation Next Page */
+#define MII_NEXTPAGE (0x07)
+/** Autonegotiation Next Page Link Partner */
+#define MII_NEXTPAGELPA (0x08)
+/** Extended Control */
+#define MII_EXCR (0x10)
+/** Quick Poll Detailed Status Register */
+#define MII_QPDSR (0x11)
+/** Extended Control 2 */
+#define MII_EXCR2 (0x13)
+/** QPDSR reg */
#define QPDSR_SPEED100 (0x8000)
#define QPDSR_FULLDPLX (0x4000)
#define QPDSR_AN_PMB2 (0x2000)
@@ -70,9 +82,9 @@ enum phy_chipset_id {
/***************** MICREL *******************/
-//specific reg
+/** specific reg */
#define MII_PHYCTRL (0x1F)
-//PHYCTRL reg
+/** PHYCTRL reg */
#define PHYCTRL_PAIRSWP_DIS (0x2000)
#define PHYCTRL_ENERGY (0x1000)
#define PHYCTRL_FORCE_LINK (0x0800)
@@ -85,7 +97,7 @@ enum phy_chipset_id {
#define PHYCTRL_OP_MODE (0x001C)
#define PHYCTRL_EN_SQE_TEST (0x0002)
#define PHYCTRL_DIS_DATA_SCR (0x0001)
-//PHYCTRL_OP_MODE values
+/** PHYCTRL_OP_MODE values */
#define PHYCTRL_OM_ANEG (0x0 << 2)
#define PHYCTRL_OM_10HALF (0x1 << 2)
#define PHYCTRL_OM_100HALF (0x2 << 2)
@@ -105,13 +117,14 @@ enum phy_chipset_id {
#define SYNOP3504__OUI2 1
/***************** specific reg ICPLUS_IP175C *******************/
-enum {
+enum
+{
ICPLUS_IP175C__BMSR_PHY0 = 2,
ICPLUS_IP175C__BMSR_PHY1,
ICPLUS_IP175C__BMSR_PHY2,
ICPLUS_IP175C__BMSR_PHY3,
ICPLUS_IP175C__BMSR_PHY4,
-
+
ICPLUS_IP175C__PHY29_MII18 = 7,
ICPLUS_IP175C__PHY29_MII19,
ICPLUS_IP175C__PHY29_MII20,
@@ -170,7 +183,8 @@ enum {
};
/***************** specific reg ICPLUS_IP175D *******************/
-enum {
+enum
+{
ICPLUS_IP175D__BMSR_PHY0 = 2,
ICPLUS_IP175D__BMSR_PHY1,
ICPLUS_IP175D__BMSR_PHY2,
@@ -200,7 +214,7 @@ enum {
ICPLUS_IP175D__PHY20_MII21,
ICPLUS_IP175D__PHY20_MII22,
ICPLUS_IP175D__PHY20_MII24,
-
+
ICPLUS_IP175D__PHY21_MII0 = 30,
ICPLUS_IP175D__PHY21_MII1,
ICPLUS_IP175D__PHY21_MII2,