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2012-09-20cesar/hal/phy: always bypass AES on MSE500, refs #3356Cyril Jourdan
2012-09-20cleo/devkit/plcdrv: pass plc system clock to Cesar as boot params, refs #3147NĂ©lio Laranjeiro
2012-09-20cleo/linux/arch/arm/mach-spc300: fix Kconfig indentJean-Philippe SAVE
2012-09-20common/inc/asm/arch/ips: add timer 3 and 4 defines, refs #3318Cyril Jourdan
2012-09-20cleo/devkit/plcdrv: handle AFE config for MSE500, refs #3318Jean-Philippe SAVE
2012-09-20cleo/linux: add a driver for mseafe, refs #3318Jean-Philippe SAVE
2012-09-20common/inc/asm/arch/ips/hw: move DPLL regs to mseafe.h, refs #3318Jean-Philippe SAVE
2012-09-20common/inc/asm/arch/ips/hw: add mseafe.h, refs #3318Jean-Philippe SAVE
2012-09-20cleo/linux/drivers/afe: use 32 bits for read/write functions, refs #3318Jean-Philippe SAVE
2012-09-20cleo/linux/drivers/afe: do not use ad986x afe on mse500, refs #3318Jean-Philippe SAVE
2012-09-20cleo/linux: add IOMUX management for MSE500, refs #3318Jean-Philippe SAVE
2012-09-20cleo/{linux, buildroot}: handle eth clks and rgmii on MSE500, refs #3318Jean-Philippe SAVE
2012-09-20cleo/linux/arch/arm/mach-spc300: handle reset cause on MSE500, refs #3318Cyril Jourdan
2012-09-20{cleo/linux, common/tools/genNVRAM}: handle spi and flash on MSE500, refs #3318Jean-Philippe SAVE
2012-09-20cleo/linux/drivers/spi: extract reset macro from headerJean-Philippe SAVE
2012-09-20cleo/{linux/drivers/mtd/, tools/openocd-r668/}: Support new flashesJulien Lacour
2012-09-20common/inc/asm/arch: handle 64 sources GIC in entry-macro.S, refs #3318Cyril Jourdan
2012-09-20cleo/{buildroot, linux}: create MSE500 machine, refs #3318Jean-Philippe SAVE
Warning: This commit does not compile, but it will be easier to understand.
2012-09-20cleo/linux/arch/arm/mach-spc300: use NVRAM defines, closes #420Jean-Philippe SAVE
2012-09-20cleo/uboot: add a machine type for MSE500, refs #2961Cyril Jourdan
2012-09-20cleo/uboot/board/sdk300: use get_master_clock for SPI speed, refs #2961Cyril Jourdan
2012-09-20cleo/uboot/cpu/spc300: make get_master_clock common, refs #2961Cyril Jourdan
2012-09-20cleo/uboot/drivers: wait for link status up, refs #2961Cyril Jourdan
This loop is made to handle Realtek PHYs, which need time between autoneg and status register update. Moreover, they need at least two reads to update the link status bit.
2012-09-20cleo/uboot/cpu/spc300: handle MSE500 eth clocks config, refs #2961Cyril Jourdan
2012-09-20cleo/uboot/cpu/spc300: change SYNOP3504_FIXED_CLK feature, refs #2961Jean-Philippe SAVE
- change !SYNOP3504_FIXED_CLK feature into SPCETH - rename eth_init.S file into spceth.S
2012-09-20common/inc/asm/arch/ips: manage maria2 regbank, refs #2961Cyril Jourdan
2012-09-20{cleo, common}: change eth prefix in NVRAM fields into eth1, refs #2961Cyril Jourdan
2012-09-20{cleo/uboot, common}: add IOMUX management, refs #2961Cyril Jourdan
2012-09-20common/inc/asm/arch: pack IOMUX & GPIO config in same NVRAM fields, refs #2961Cyril Jourdan
2012-09-20common/include/asm/arch/ips/hw: add iomux defines, refs #2961Cyril Jourdan
2012-09-20cleo/uboot/cpu/spc300: move gpio_pio_init into a specific file, refs #2961Cyril Jourdan
2012-09-20cleo/u-boot/cpu/spc300: add timer clock for MSE500, refs #2961Jean-Philippe SAVE
- With a Xclk at 24MHz we cannot reach a timer_clk at 3,125MHz, so for MSE500 the timer_clk will be 4MHz.
2012-09-20cleo/u-boot/cpu/spc300: use CFG_HZ as timer clock define, refs #2961Jean-Philippe SAVE
2012-09-20cleo/u-boot/include/configs: define refactoringJean-Philippe SAVE
2012-09-20cleo/tools/openocd: create a config for MSE500 chip, refs #2961Cyril Jourdan
2012-09-20common/tools/genNVRAM: add a MIU config for MSE500 simu model, refs #2961Cyril Jourdan
2012-09-20{common,cleo}: remove MIU_ATOP_REG_BASE, refs #2961Cyril Jourdan
As a consequence, MIU_REG_BASE is renamed into MIU_BASE.
2012-09-20cleo/uboot/cpu/spc300: add msepll.S, refs #2961Cyril Jourdan
2012-09-20common/include/asm/arch/ips/hw: add msepll defines, refs #2961Jean-Philippe SAVE
2012-09-20cleo/uboot: create MSE500 chip, refs #2961Cyril Jourdan
2012-09-20cleo/uboot/cpu/spc300: rename pll_init.S into spcpll.S, refs #2961Cyril Jourdan
Change !CONFIG_CHIP_FEATURE_NO_PLL into CONFIG_CHIP_FEATURE_SPCPLL
2012-09-20cleo/uboot/cpu/spc300: move sdram init after PLL init, refs #2961Cyril Jourdan
In the case where you do not need to resync DSP and AFE clocks.
2012-09-20cleopatre: rename SPC300DINI into MSE500DINI_300, refs #3119Cyril Jourdan
2012-09-20common/tools/genNVRAM: correct genNVRAM compilation from bundle, closes #3200Cyril Jourdan
At the same time, add management of the dependency file to have the same Makefile in master and eoc.
2012-09-20{common, cleo}: change spid_img_desc.h defines' names, refs #3119Cyril Jourdan
This is done to avoid conflicts in polux and make this file common between cleo and polux.
2012-09-20cleo/linux/inc/asm/arch: add a file to define IRQ priorities, refs #3119Cyril Jourdan
IRQ priorities are specific to an architecture so this allows to make common/inc/asm/arch/irqs.h common between cleo and polux. What is done by adding polux IRQs defines in the file.
2012-09-20{common, polux}: make nvram.h file common between cleo and polux, refs #3119Cyril Jourdan
Adapt genNVRAM to work with this one nvram header. Suppress nvram_gen headers in SPC2XX architectures in polux, now that those files are not used anymore.
2012-09-20{cleo, common}: rename spc300_nvram into spidcom_nvram, refs #3119Cyril Jourdan
This is done to use common NVRAM structure and variable names with polux.
2012-09-20common/inc/asm/arch: handle a 64 lines version of the GIC, refs #3119Cyril Jourdan
2012-09-20cleo/include: replace includes by symbolic links to common, refs #3119Cyril Jourdan