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authorJean-Philippe SAVE2012-11-22 11:54:11 +0100
committerJean-Philippe SAVE2012-11-22 16:53:40 +0100
commit5cdbd6f6e41759788726c52ec49dd63215b99a3a (patch)
tree845eca43ac566b31c05022822eee9433dde5739f /common/tools
parentc56d1e7ed62a226144c1ee5c1551a4bcb0d89d79 (diff)
common/tools/genNVRAM: port boards and config from eoc-drv branch, closes #3532
Diffstat (limited to 'common/tools')
-rw-r--r--common/tools/genNVRAM/Makefile1
-rw-r--r--common/tools/genNVRAM/genNVRAM.c7
-rw-r--r--common/tools/genNVRAM/iomux_cfg.h124
-rw-r--r--common/tools/genNVRAM/miu_cfg.h65
-rw-r--r--common/tools/genNVRAM/nvram_mcr500-ddr2_200_01.conf25
-rw-r--r--common/tools/genNVRAM/nvram_mcr500-ddr2_300_01.conf25
-rw-r--r--common/tools/genNVRAM/nvram_mcr500-ddr2_500_01.conf25
-rw-r--r--common/tools/genNVRAM/nvram_mcr510-ddr1_200_01.conf22
-rw-r--r--common/tools/genNVRAM/nvram_mcr510-ddr1_300_01.conf22
-rw-r--r--common/tools/genNVRAM/nvram_mcr510-ddr1_500_01.conf22
-rw-r--r--common/tools/genNVRAM/nvram_mcr510-ddr2_200_01.conf22
-rw-r--r--common/tools/genNVRAM/nvram_mcr510-ddr2_300_01.conf16
-rw-r--r--common/tools/genNVRAM/nvram_mcr510-ddr2_500_01.conf16
-rwxr-xr-xcommon/tools/genNVRAM/nvram_range.pl95
-rw-r--r--common/tools/genNVRAM/nvram_scr300_01.conf18
-rw-r--r--common/tools/genNVRAM/nvram_scr310_16M_4M_01.conf18
-rw-r--r--common/tools/genNVRAM/nvram_scr310_16M_8M_01.conf18
-rw-r--r--common/tools/genNVRAM/nvram_scr310_1875_16M_4M_01.conf16
-rw-r--r--common/tools/genNVRAM/nvram_scr310_1875_16M_8M_01.conf18
-rw-r--r--common/tools/genNVRAM/nvram_scr310_1875_32M_4M_01.conf16
-rw-r--r--common/tools/genNVRAM/nvram_scr310_1875_32M_8M_01.conf18
-rw-r--r--common/tools/genNVRAM/nvram_scr310_32M_4M_01.conf18
-rw-r--r--common/tools/genNVRAM/nvram_scr310_32M_8M_01.conf18
23 files changed, 645 insertions, 0 deletions
diff --git a/common/tools/genNVRAM/Makefile b/common/tools/genNVRAM/Makefile
index 638e1cba3c..75d8cea178 100644
--- a/common/tools/genNVRAM/Makefile
+++ b/common/tools/genNVRAM/Makefile
@@ -31,3 +31,4 @@ genNVRAM: genNVRAM.c
clean:
@rm *.o *.d *~ genNVRAM -f
+
diff --git a/common/tools/genNVRAM/genNVRAM.c b/common/tools/genNVRAM/genNVRAM.c
index 8a27b38fe1..8381188f93 100644
--- a/common/tools/genNVRAM/genNVRAM.c
+++ b/common/tools/genNVRAM/genNVRAM.c
@@ -245,6 +245,12 @@ static const struct iomux_config_table_t iomux_config_table[] =
{ "msk500-ddr1_2", iomux_config_msk500_ddr1_2 },
{ "msk501-ddr2_1", iomux_config_msk501_ddr2_1 },
{ "msk501-ddr2_2", iomux_config_msk501_ddr2_2 },
+ { "mcr510-ddr2", iomux_config_mcr510_ddr2 },
+ { "mcr510-ddr2_2", iomux_config_mcr510_ddr2_2 },
+ { "mcr510-ddr1_1", iomux_config_mcr510_ddr1_1 },
+ { "mcr510-ddr1_2", iomux_config_mcr510_ddr1_2 },
+ { "mcr500-ddr2_1", iomux_config_mcr500_ddr2_1 },
+ { "mcr500-ddr2_2", iomux_config_mcr500_ddr2_2 },
NULL
};
@@ -270,6 +276,7 @@ static const struct miu_config_table_t miu_config_table[] =
{ "h5ps1g63jfr-s6c", 128 * 1024 *1024, miu_config_ddr2_16_4x_cl6_800 },
{ "nt5tu64m16gg-ac", 128 * 1024 *1024, miu_config_ddr2_16_4x_cl6_800 },
{ "h5du5162etr-fac", 64 * 1024 * 1024, miu_config_ddr1_h5du5162etr_fac_500},
+ { "h5ps5162gfr-s6c", 64 * 1024 *1024, miu_config_ddr2_16_2x_cl6_800 },
NULL
};
diff --git a/common/tools/genNVRAM/iomux_cfg.h b/common/tools/genNVRAM/iomux_cfg.h
index f6d9d77429..2c7f2ec3b6 100644
--- a/common/tools/genNVRAM/iomux_cfg.h
+++ b/common/tools/genNVRAM/iomux_cfg.h
@@ -203,4 +203,128 @@ uint32_t iomux_config_msk501_ddr2_2[] =
(uint32_t)-1
};
+/*
+ * MCR510-DDR2 ref design with :
+ * - ETH1 RMII mode
+ * - UART1 = ARM uart1
+ * - ARM GPIO = 1,3
+ * - LEON GPIO = 0,2
+ *
+ * This is the default configuration.
+ */
+uint32_t iomux_config_mcr510_ddr2[] =
+{
+ 0x00000000, 0x0000, 0xFFFF,
+ 0x00000050, 0x1022, 0x1677,
+ 0x00000080, 0x0500, 0x0F00,
+ 0x00000084, 0x0002, 0x0002,
+ 0x0000003C, 0x0004, 0x0004,
+ 0x00000048, 0x000F, 0x000F,
+ (uint32_t)-1
+};
+
+/*
+ * MCR510-DDR2 ref design with :
+ * - ETH1 RMII mode
+ * - UART1 = ARM uart1
+ * - ARM GPIO = 1,3
+ * - LEON GPIO = 0,2
+ * - PLC 200 GPO on
+ */
+uint32_t iomux_config_mcr510_ddr2_2[] =
+{
+ 0x00000000, 0x0000, 0xFFFF,
+ 0x00000050, 0x1022, 0x1677,
+ 0x00000080, 0x0501, 0x0F0F,
+ 0x00000084, 0x0002, 0x0002,
+ 0x0000003C, 0x0004, 0x0004,
+ 0x00000048, 0x000F, 0x000F,
+ (uint32_t)-1
+};
+
+/*
+ * MCR510-DDR1 ref design with :
+ * - ETH1 RMII mode
+ * - UART1 = ARM uart1
+ * - ARM GPIO = 1,3
+ * - LEON GPIO = 0,2
+ *
+ * This is the default configuration.
+ */
+uint32_t iomux_config_mcr510_ddr1_1[] =
+{
+ 0x00000000, 0x0000, 0xFFFF,
+ 0x00000050, 0x1022, 0x1677,
+ 0x00000080, 0x0500, 0x0F00,
+ 0x00000084, 0x0002, 0x0002,
+ 0x0000003C, 0x0004, 0x0004,
+ 0x00000048, 0x000F, 0x000F,
+ (uint32_t)-1
+};
+
+/*
+ * MCR510-DDR1 ref design with :
+ * - ETH1 RMII mode
+ * - UART1 = ARM uart1
+ * - ARM GPIO = 1,3
+ * - LEON GPIO = 0,2
+ * - PLC 200 GPO on
+ *
+ */
+uint32_t iomux_config_mcr510_ddr1_2[] =
+{
+ 0x00000000, 0x0000, 0xFFFF,
+ 0x00000050, 0x1022, 0x1677,
+ 0x00000080, 0x0501, 0x0F0F,
+ 0x00000084, 0x0002, 0x0002,
+ 0x0000003C, 0x0004, 0x0004,
+ 0x00000048, 0x000F, 0x000F,
+ (uint32_t)-1
+};
+
+/*
+ * MCR500-DDR2 ref design with :
+ * - ETH1 RGMII mode
+ * - ETH2 RMII mode
+ * - Internal AFE
+ * - UART1 = ARM uart1
+ * - UART2 = ARM uart2
+ * - ARM GPIO = 1,3
+ * - LEON GPIO = 0,2
+ *
+ * This is the default configuration.
+ */
+uint32_t iomux_config_mcr500_ddr2_1[] =
+{
+ 0x00000000, 0x0000, 0xFFFF,
+ 0x00000050, 0x1025, 0x1477,
+ 0x00000080, 0x0500, 0x0F00,
+ 0x00000084, 0x0002, 0x0002,
+ 0x0000003C, 0x0004, 0x0004,
+ 0x00000048, 0x000F, 0x000F,
+ (uint32_t)-1
+};
+
+/*
+ * MCR500-DDR2 ref design with :
+ * - ETH1 RGMII mode
+ * - ETH2 RMII mode
+ * - Internal AFE
+ * - UART1 = ARM uart1
+ * - UART2 = ARM uart2
+ * - ARM GPIO = 1,3
+ * - LEON GPIO = 0,2
+ * - PLC 200 GPO on
+ *
+ */
+uint32_t iomux_config_mcr500_ddr2_2[] =
+{
+ 0x00000000, 0x0000, 0xFFFF,
+ 0x00000050, 0x1025, 0x1477,
+ 0x00000080, 0x0501, 0x0F0F,
+ 0x00000084, 0x0002, 0x0002,
+ 0x0000003C, 0x0004, 0x0004,
+ 0x00000048, 0x000F, 0x000F,
+ (uint32_t)-1
+};
#endif /* __IOMUX_CFG_H */
diff --git a/common/tools/genNVRAM/miu_cfg.h b/common/tools/genNVRAM/miu_cfg.h
index dea61da785..1808be76e9 100644
--- a/common/tools/genNVRAM/miu_cfg.h
+++ b/common/tools/genNVRAM/miu_cfg.h
@@ -251,4 +251,69 @@ uint32_t miu_config_ddr1_h5du5162etr_fac_500[] =
(uint32_t)-1
};
+uint32_t miu_config_ddr2_16_2x_cl6_800[] =
+{
+ 0x0000003c, 0x0c01, 0xFFFF,
+ 0x0000003c, 0x0c00, 0xFFFF,
+ 0x0000008c, 0xFFFE, 0xFFFF,
+ 0x00000090, 0xFFFF, 0xFFFF,
+ 0x00000094, 0xFFFF, 0xFFFF,
+ 0x00000098, 0xFFFF, 0xFFFF,
+ 0x0000008c, 0xFFFE, 0xFFFF,
+ 0x00010060, 0x0690, 0xFFFF,
+ 0x00010064, 0x0029, 0xFFFF,
+ 0x00010068, 0x0100, 0xFFFF,
+ 0x0001006c, 0x4000, 0xFFFF,
+ 0x00010040, 0x0020, 0xFFFF,
+ 0x00010010, 0x70ff, 0xFFFF,
+ NVRAM_WAIT_CODE_OP, 500, 0,
+ 0x00000004, 0x0292, 0xFFFF,
+ 0x00000008, 0x000c, 0xFFFF,
+ 0x0000000c, 0x3420, 0xFFFF,
+ 0x00000010, 0x1666, 0xFFFF,
+ 0x00000014, 0x1c56, 0xFFFF,
+ 0x00000018, 0x6485, 0xFFFF,
+ 0x0000001c, 0x204f, 0xFFFF,
+ 0x00000020, 0x0a62, 0xFFFF,
+ 0x00000024, 0x4004, 0xFFFF,
+ 0x00000028, 0x8000, 0xFFFF,
+ 0x0000002c, 0xc000, 0xFFFF,
+ 0x00010000, 0x0010, 0xFFFF,
+ 0x00010070, 0x0044, 0xFFFF,
+ 0x00010074, 0x4040, 0xFFFF,
+ 0x00010004, 0x0000, 0xFFFF,
+ 0x00010008, 0x0000, 0xFFFF,
+ 0x00010078, 0x0200, 0xFFFF,
+ 0x0001007c, 0x0022, 0xFFFF,
+ 0x0001001c, 0x00a7, 0xFFFF,
+ 0x000100dc, 0x0077, 0xFFFF,
+ 0x000100d0, 0x004f, 0xFFFF,
+ 0x000100d4, 0x004f, 0xFFFF,
+ 0x000100c0, 0x000c, 0xFFFF,
+ 0x000100c0, 0x0008, 0xFFFF,
+ 0x000100c4, 0x007f, 0xFFFF,
+ 0x000100c8, 0xf200, 0xFFFF,
+ 0x000100c0, 0x2378, 0xFFFF,
+ 0x000100a8, 0x0000, 0xFFFF,
+ 0x000100b8, 0x5555, 0xFFFF,
+ 0x000100bc, 0x5555, 0xFFFF,
+ 0x000100e8, 0x7777, 0xFFFF,
+ 0x0000003c, 0x0c01, 0xFFFF,
+ 0x0000003c, 0x0c00, 0xFFFF,
+ 0x000100fc, 0x0000, 0xFFFF,
+ 0x00010000, 0x0000, 0xFFFF,
+ 0x00010004, 0xaaaa, 0xFFFF,
+ NVRAM_WAIT_CODE_OP, 1, 0,
+ 0x00000000, 0x0000, 0xFFFF,
+ 0x00000000, 0x0008, 0xFFFF,
+ 0x00000000, 0x000c, 0xFFFF,
+ NVRAM_WAIT_CODE_OP, 200, 0,
+ 0x00000000, 0x000e, 0xFFFF,
+ NVRAM_WAIT_CODE_OP, 500, 0,
+ 0x00000000, 0x001f, 0xFFFF,
+ NVRAM_MIU_WAIT_INIT_DONE_CODE_OP, 0, 0,
+ 0x0000008c, 0x0000, 0xFFFF,
+ (uint32_t)-1
+};
+
#endif /* __MIU_CFG_H */
diff --git a/common/tools/genNVRAM/nvram_mcr500-ddr2_200_01.conf b/common/tools/genNVRAM/nvram_mcr500-ddr2_200_01.conf
new file mode 100644
index 0000000000..7894d43d96
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_mcr500-ddr2_200_01.conf
@@ -0,0 +1,25 @@
+pkgcfg=0x0000170f
+iomux_config = mcr500-ddr2_2
+gpiodir=0x00000084
+miu_config = h5ps5162gfr-s6c
+forg=0x00000007
+img0off=0x00140000
+imgmaxsize=0x360000
+phy1=0x2
+ethernet1=00:13:D7:15:10:01
+portnb1=1
+phy2=0x1
+ethernet2=00:13:D7:15:20:01
+portnb2=1
+name=MCR500-DDR2
+plc=00:13:D7:15:00:01
+nbimg=2
+dpw=SPIDCOM-MCR500-DDR2-01
+serial=MCR500-DDR2-01
+desc=MCR500-DDR2 reference design
+oem=SPiDCOM
+factory=SPiDCOM
+brddesc=MCR500-DDR2 reference design
+ssize=64
+brdid=1
+brdnb=1
diff --git a/common/tools/genNVRAM/nvram_mcr500-ddr2_300_01.conf b/common/tools/genNVRAM/nvram_mcr500-ddr2_300_01.conf
new file mode 100644
index 0000000000..37640a1167
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_mcr500-ddr2_300_01.conf
@@ -0,0 +1,25 @@
+pkgcfg=0x0000270f
+iomux_config = mcr500-ddr2_1
+gpiodir=0x00000084
+miu_config = h5ps5162gfr-s6c
+forg=0x00000007
+img0off=0x00140000
+imgmaxsize=0x360000
+phy1=0x2
+ethernet1=00:13:D7:15:10:01
+portnb1=1
+phy2=0x1
+ethernet2=00:13:D7:15:20:01
+portnb2=1
+name=MCR500-DDR2
+plc=00:13:D7:15:00:01
+nbimg=2
+dpw=SPIDCOM-MCR500-DDR2-01
+serial=MCR500-DDR2-01
+desc=MCR500-DDR2 reference design
+oem=SPiDCOM
+factory=SPiDCOM
+brddesc=MCR500-DDR2 reference design
+ssize=64
+brdid=1
+brdnb=1
diff --git a/common/tools/genNVRAM/nvram_mcr500-ddr2_500_01.conf b/common/tools/genNVRAM/nvram_mcr500-ddr2_500_01.conf
new file mode 100644
index 0000000000..007d5198fb
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_mcr500-ddr2_500_01.conf
@@ -0,0 +1,25 @@
+pkgcfg=0x0000370f
+iomux_config = mcr500-ddr2_1
+gpiodir=0x00000084
+miu_config = h5ps5162gfr-s6c
+forg=0x00000007
+img0off=0x00140000
+imgmaxsize=0x360000
+phy1=0x2
+ethernet1=00:13:D7:15:10:01
+portnb1=1
+phy2=0x1
+ethernet2=00:13:D7:15:20:01
+portnb2=1
+name=MCR500-DDR2
+plc=00:13:D7:15:00:01
+nbimg=2
+dpw=SPIDCOM-MCR500-DDR2-01
+serial=MCR500-DDR2-01
+desc=MCR500-DDR2 reference design
+oem=SPiDCOM
+factory=SPiDCOM
+brddesc=MCR500-DDR2 reference design
+ssize=64
+brdid=1
+brdnb=1
diff --git a/common/tools/genNVRAM/nvram_mcr510-ddr1_200_01.conf b/common/tools/genNVRAM/nvram_mcr510-ddr1_200_01.conf
new file mode 100644
index 0000000000..e0cd715320
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_mcr510-ddr1_200_01.conf
@@ -0,0 +1,22 @@
+pkgcfg=0x0000150f
+iomux_config = mcr510-ddr1_2
+gpiodir=0x00000084
+miu_config = h5du5162etr-fac
+forg=0x00000006
+img0off=0x000b0000
+imgmaxsize=0x350000
+phy1=0x5
+ethernet1=00:13:D7:16:10:01
+portnb1=2
+name=MCR510-DDR1
+plc=00:13:D7:16:00:01
+nbimg=1
+dpw=SPIDCOM-MCR510-DDR1-01
+serial=MCR510-DDR1-01
+desc=MCR510 DDR1 reference design
+oem=SPiDCOM
+factory=SPiDCOM
+brddesc=MCR510-DDR1 demo board
+ssize=64
+brdid=1
+brdnb=1
diff --git a/common/tools/genNVRAM/nvram_mcr510-ddr1_300_01.conf b/common/tools/genNVRAM/nvram_mcr510-ddr1_300_01.conf
new file mode 100644
index 0000000000..71a45549f7
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_mcr510-ddr1_300_01.conf
@@ -0,0 +1,22 @@
+pkgcfg=0x0000250f
+iomux_config = mcr510-ddr1_1
+gpiodir=0x00000084
+miu_config = h5du5162etr-fac
+forg=0x00000006
+img0off=0x000b0000
+imgmaxsize=0x350000
+phy1=0x5
+ethernet1=00:13:D7:16:10:01
+portnb1=2
+name=MCR510-DDR1
+plc=00:13:D7:16:00:01
+nbimg=1
+dpw=SPIDCOM-MCR510-DDR1-01
+serial=MCR510-DDR1-01
+desc=MCR510 DDR1 reference design
+oem=SPiDCOM
+factory=SPiDCOM
+brddesc=MCR510-DDR1 demo board
+ssize=64
+brdid=1
+brdnb=1
diff --git a/common/tools/genNVRAM/nvram_mcr510-ddr1_500_01.conf b/common/tools/genNVRAM/nvram_mcr510-ddr1_500_01.conf
new file mode 100644
index 0000000000..f95e3b41e9
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_mcr510-ddr1_500_01.conf
@@ -0,0 +1,22 @@
+pkgcfg=0x0000350f
+iomux_config = mcr510-ddr1_1
+gpiodir=0x00000084
+miu_config = h5du5162etr-fac
+forg=0x00000006
+img0off=0x000b0000
+imgmaxsize=0x350000
+phy1=0x5
+ethernet1=00:13:D7:16:10:01
+portnb1=2
+name=MCR510-DDR1
+plc=00:13:D7:16:00:01
+nbimg=1
+dpw=SPIDCOM-MCR510-DDR1-01
+serial=MCR510-DDR1-01
+desc=MCR510 DDR1 reference design
+oem=SPiDCOM
+factory=SPiDCOM
+brddesc=MCR510-DDR1 demo board
+ssize=64
+brdid=1
+brdnb=1
diff --git a/common/tools/genNVRAM/nvram_mcr510-ddr2_200_01.conf b/common/tools/genNVRAM/nvram_mcr510-ddr2_200_01.conf
new file mode 100644
index 0000000000..ab3e8dd725
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_mcr510-ddr2_200_01.conf
@@ -0,0 +1,22 @@
+pkgcfg=0x0000150f
+iomux_config=mcr510-ddr2_2
+gpiodir=0x00000084
+miu_config=h5ps5162gfr-s6c
+forg=0x00000006
+img0off=0x000b0000
+imgmaxsize=0x350000
+phy1=0x5
+ethernet1=00:13:D7:12:10:01
+portnb1=2
+name=MCR510-DDR2
+plc=00:13:D7:12:00:01
+nbimg=1
+dpw=SPIDCOM-MCR510-DDR2-01
+serial=MCR510-DDR2-01
+desc=MCR510 DDR2 reference design
+oem=SPiDCOM
+factory=SPiDCOM
+brddesc=MSK500-DDR2 development board
+ssize=64
+brdid=1
+brdnb=1
diff --git a/common/tools/genNVRAM/nvram_mcr510-ddr2_300_01.conf b/common/tools/genNVRAM/nvram_mcr510-ddr2_300_01.conf
new file mode 100644
index 0000000000..6a1ceaad6f
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_mcr510-ddr2_300_01.conf
@@ -0,0 +1,16 @@
+pkgcfg=0x0000250f
+iomux_config = mcr510-ddr2
+gpiodir=0x00000084
+miu_config = h5ps5162gfr-s6c
+forg=0x00000006
+img0off=0x000b0000
+imgmaxsize=0x350000
+phy1=0x5
+ethernet1=00:13:D7:12:10:01
+portnb1=2
+name=MCR510-DDR2
+plc=00:13:D7:12:00:01
+nbimg=1
+dpw=SPIDCOM-MCR510-DDR2-01
+serial=MCR510-DDR2-01
+desc=MCR510 DDR2 reference design
diff --git a/common/tools/genNVRAM/nvram_mcr510-ddr2_500_01.conf b/common/tools/genNVRAM/nvram_mcr510-ddr2_500_01.conf
new file mode 100644
index 0000000000..7c15941dbe
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_mcr510-ddr2_500_01.conf
@@ -0,0 +1,16 @@
+pkgcfg=0x0000350f
+iomux_config = mcr510-ddr2
+gpiodir=0x00000084
+miu_config = h5ps5162gfr-s6c
+forg=0x00000006
+img0off=0x000b0000
+imgmaxsize=0x350000
+phy1=0x5
+ethernet1=00:13:D7:12:10:01
+portnb1=2
+name=MCR510-DDR2
+plc=00:13:D7:12:00:01
+nbimg=1
+dpw=SPIDCOM-MCR510-DDR2-01
+serial=MCR510-DDR2-01
+desc=MCR510 DDR2 reference design
diff --git a/common/tools/genNVRAM/nvram_range.pl b/common/tools/genNVRAM/nvram_range.pl
new file mode 100755
index 0000000000..de447ca631
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_range.pl
@@ -0,0 +1,95 @@
+#!/usr/bin/perl
+use strict;
+use warnings;
+use Getopt::Long qw(:config no_ignore_case bundling);
+use Pod::Usage;
+use Config;
+
+my $OUI = "00:13:d7";
+
+my $temp_conf = "tmp.conf";
+my @dpw_table = ( 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'J', 'K', 'L', 'M', 'N', 'P', 'Q', 'R', 'S', 'T', 'U', 'V', 'W', 'X', 'Y', 'Z', '2', '3', '4', '5', '6', '7', '8', '9' );
+
+# Argument parsing
+my $help;
+my $start;
+my $end;
+my $conf;
+GetOptions (
+ 'help|h' => \$help,
+ 'start|s=i' => \$start,
+ 'end|e=i' => \$end,
+ 'conf|c=s' => \$conf,
+ ) or pod2usage (2);
+pod2usage (1) if $help;
+
+# check args
+defined $start && defined $end && defined $conf or pod2usage(2);
+
+# check parameters
+if ($start <= 0) {
+ $start = 0;
+}
+
+if($end < $start) {
+ $end = $start;
+}
+
+srand;
+
+sub dpw_generate {
+ my ($i, $dpw);
+ $dpw = "";
+ for $i (0 .. 18) {
+ if($i % 5 == 4) {
+ $dpw = join '', $dpw, "-";
+ }
+ else {
+ $dpw = join '', $dpw, $dpw_table[int(rand 32)];
+ }
+ }
+ return $dpw;
+}
+
+my $index;
+for $index ($start .. $end) {
+# open config file
+ open CONF, $conf or die "Cannot open $conf for read :$!";
+# open temp config file
+ open TEMP_CONF, ">$temp_conf" or die "Cannot open $temp_conf for read :$!";
+
+# fill it with std input conf file
+ while(<CONF>) {
+ print TEMP_CONF "$_";
+ }
+ close CONF;
+
+# add ethernet and plc address
+ print TEMP_CONF "plc=$OUI:", sprintf("%02x", ($index & 0xff0000) >> 16), ":", sprintf("%02x", (($index & 0x00ff00) >> 8) & 0xfe), ":", sprintf("%02x", $index & 0x0000ff), "\n";
+ print TEMP_CONF "ethernet=$OUI:", sprintf("%02x", ($index & 0xff0000) >> 16), ":", sprintf("%02x", (($index & 0x00ff00) >> 8) | 0x01), ":", sprintf("%02x", $index & 0x0000ff), "\n";
+# add DPW
+ print TEMP_CONF "dpw=", &dpw_generate, "\n";
+ close TEMP_CONF;
+
+ system ("./genNVRAM --type spc300 --infile $temp_conf --outfile nvram_".sprintf("%06x", $index).".bin");
+}
+
+system ("rm $temp_conf");
+
+__END__
+
+=head1 NAME
+
+nvram_range.pl - generate a range of SPC300 NVRAM binary files.
+
+=head1 SYNOPSIS
+
+nvram_range.pl Arguments [Options]
+
+Arguments:
+ -h, --help brief help message
+ -s, --start start mac offset
+ -e, --end end mac offset
+ -c, --conf configuration file
+
+=cut
diff --git a/common/tools/genNVRAM/nvram_scr300_01.conf b/common/tools/genNVRAM/nvram_scr300_01.conf
new file mode 100644
index 0000000000..063c78b737
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_scr300_01.conf
@@ -0,0 +1,18 @@
+pkgcfg=0x24e
+gpio07=0x00000133
+gpio815=0x00000000
+gpiodir=0xffffd6a9
+sconr=0x1c3168
+stmg0r=0x22e569a
+stmg1r=0x70008
+srefr=0x410
+forg=0x7
+img0off=0x140000
+imgmaxsize=0x360000
+phy=0x2
+ethernet=00:13:D7:07:10:01
+portnb=1
+name=SCR300
+plc=00:13:D7:07:00:01
+nbimg=2
+dpw=SPIDCOM-SCR300-01
diff --git a/common/tools/genNVRAM/nvram_scr310_16M_4M_01.conf b/common/tools/genNVRAM/nvram_scr310_16M_4M_01.conf
new file mode 100644
index 0000000000..458506df23
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_scr310_16M_4M_01.conf
@@ -0,0 +1,18 @@
+pkgcfg=0x16e
+gpio07=0x00000133
+gpio815=0x00000000
+gpiodir=0xfffff6a9
+sconr=0x1c1168
+stmg0r=0x22e569a
+stmg1r=0x70008
+srefr=0x410
+forg=0x6
+img0off=0x0b0000
+imgmaxsize=0x350000
+phy=0x5
+ethernet=00:13:D7:04:10:01
+portnb=2
+plc=00:13:D7:04:00:01
+nbimg=1
+name=SCR310
+dpw=SPIDCOM-SCR310-01
diff --git a/common/tools/genNVRAM/nvram_scr310_16M_8M_01.conf b/common/tools/genNVRAM/nvram_scr310_16M_8M_01.conf
new file mode 100644
index 0000000000..db99f09061
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_scr310_16M_8M_01.conf
@@ -0,0 +1,18 @@
+pkgcfg=0x16e
+gpio07=0x00000133
+gpio815=0x00000000
+gpiodir=0xfffff6a9
+sconr=0x1c1168
+stmg0r=0x22e569a
+stmg1r=0x70008
+srefr=0x410
+forg=0x7
+img0off=0x140000
+imgmaxsize=0x360000
+phy=0x5
+ethernet=00:13:D7:04:10:01
+portnb=2
+plc=00:13:D7:04:00:01
+nbimg=2
+name=SCR310
+dpw=SPIDCOM-SCR310-01
diff --git a/common/tools/genNVRAM/nvram_scr310_1875_16M_4M_01.conf b/common/tools/genNVRAM/nvram_scr310_1875_16M_4M_01.conf
new file mode 100644
index 0000000000..db824dfff7
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_scr310_1875_16M_4M_01.conf
@@ -0,0 +1,16 @@
+pkgcfg=0x16c
+gpio07=0x00000133
+gpio815=0x00000000
+gpiodir=0xfffff6a9
+sconr=0x1c1168
+stmg0r=0x22e569a
+stmg1r=0x70008
+srefr=0x410
+forg=0x6
+img0off=0x0b0000
+phy=0x5
+ethernet=00:13:D7:00:01:65
+portnb=2
+plc=00:13:D7:00:00:65
+nbimg=1
+dpw=SPIDCOM-SCR310-01
diff --git a/common/tools/genNVRAM/nvram_scr310_1875_16M_8M_01.conf b/common/tools/genNVRAM/nvram_scr310_1875_16M_8M_01.conf
new file mode 100644
index 0000000000..533b5dd360
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_scr310_1875_16M_8M_01.conf
@@ -0,0 +1,18 @@
+pkgcfg=0x16c
+gpio07=0x00000133
+gpio815=0x00000000
+gpiodir=0xfffff6a9
+sconr=0x1c1168
+stmg0r=0x22e569a
+stmg1r=0x70008
+srefr=0x410
+forg=0x7
+img0off=0x140000
+imgmaxsize=0x360000
+phy=0x5
+ethernet=00:13:D7:04:10:01
+portnb=2
+plc=00:13:D7:04:00:01
+nbimg=2
+name=SCR310
+dpw=SPIDCOM-SCR310-01
diff --git a/common/tools/genNVRAM/nvram_scr310_1875_32M_4M_01.conf b/common/tools/genNVRAM/nvram_scr310_1875_32M_4M_01.conf
new file mode 100644
index 0000000000..aebe10e256
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_scr310_1875_32M_4M_01.conf
@@ -0,0 +1,16 @@
+pkgcfg=0x16c
+gpio07=0x00000133
+gpio815=0x00000000
+gpiodir=0xfffff6a9
+sconr=0x1c3168
+stmg0r=0x22e569a
+stmg1r=0x70008
+srefr=0x410
+forg=0x6
+img0off=0x0b0000
+phy=0x5
+ethernet=00:13:D7:00:01:65
+portnb=2
+plc=00:13:D7:00:00:65
+nbimg=1
+dpw=SPIDCOM-SCR310-01
diff --git a/common/tools/genNVRAM/nvram_scr310_1875_32M_8M_01.conf b/common/tools/genNVRAM/nvram_scr310_1875_32M_8M_01.conf
new file mode 100644
index 0000000000..5c7cc382b0
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_scr310_1875_32M_8M_01.conf
@@ -0,0 +1,18 @@
+pkgcfg=0x16c
+gpio07=0x00000133
+gpio815=0x00000000
+gpiodir=0xfffff6a9
+sconr=0x1c3168
+stmg0r=0x22e569a
+stmg1r=0x70008
+srefr=0x410
+forg=0x7
+img0off=0x140000
+imgmaxsize=0x360000
+phy=0x5
+ethernet=00:13:D7:04:10:01
+portnb=2
+plc=00:13:D7:04:00:01
+nbimg=2
+name=SCR310
+dpw=SPIDCOM-SCR310-01
diff --git a/common/tools/genNVRAM/nvram_scr310_32M_4M_01.conf b/common/tools/genNVRAM/nvram_scr310_32M_4M_01.conf
new file mode 100644
index 0000000000..70ca506b0d
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_scr310_32M_4M_01.conf
@@ -0,0 +1,18 @@
+pkgcfg=0x16e
+gpio07=0x00000133
+gpio815=0x00000000
+gpiodir=0xfffff6a9
+sconr=0x1c3168
+stmg0r=0x22e569a
+stmg1r=0x70008
+srefr=0x410
+forg=0x6
+img0off=0x0b0000
+imgmaxsize=0x350000
+phy=0x5
+ethernet=00:13:D7:04:10:01
+portnb=2
+plc=00:13:D7:04:00:01
+nbimg=1
+name=SCR310
+dpw=SPIDCOM-SCR310-01
diff --git a/common/tools/genNVRAM/nvram_scr310_32M_8M_01.conf b/common/tools/genNVRAM/nvram_scr310_32M_8M_01.conf
new file mode 100644
index 0000000000..da73921ddd
--- /dev/null
+++ b/common/tools/genNVRAM/nvram_scr310_32M_8M_01.conf
@@ -0,0 +1,18 @@
+pkgcfg=0x16e
+gpio07=0x00000133
+gpio815=0x00000000
+gpiodir=0xfffff6a9
+sconr=0x1c3168
+stmg0r=0x22e569a
+stmg1r=0x70008
+srefr=0x410
+forg=0x7
+img0off=0x140000
+imgmaxsize=0x360000
+phy=0x5
+ethernet=00:13:D7:04:10:01
+portnb=2
+plc=00:13:D7:04:00:01
+nbimg=2
+name=SCR310
+dpw=SPIDCOM-SCR310-01