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authorOlivier Dufour2012-12-24 11:30:00 +0100
committerOlivier Dufour2013-01-25 13:40:54 +0100
commitcd2ec2fa3ae541d7c6f60de1d22dd16b2e9d6392 (patch)
treeea0cead76c81c58eb75e4d7ec655a0dabf86d447 /cleopatre/u-boot-1.1.6/cpu/spc300/msepll.S
parent819365f32adee29f146e13387f17b686fd3f9150 (diff)
Revert "{cleo/uboot,common}: change system clock speed to 222 MHz", refs #1325
This reverts commit d2f7768afa5bbe4c4a40e9697a8939600a7e4a82.
Diffstat (limited to 'cleopatre/u-boot-1.1.6/cpu/spc300/msepll.S')
-rw-r--r--cleopatre/u-boot-1.1.6/cpu/spc300/msepll.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/cleopatre/u-boot-1.1.6/cpu/spc300/msepll.S b/cleopatre/u-boot-1.1.6/cpu/spc300/msepll.S
index 92f7a37e49..63d02dd9ba 100644
--- a/cleopatre/u-boot-1.1.6/cpu/spc300/msepll.S
+++ b/cleopatre/u-boot-1.1.6/cpu/spc300/msepll.S
@@ -160,7 +160,7 @@ pll_init:
ldr r1, =MSEPLL_SPLL_BASE
regbitset r1, MSEPLL_SPPLL_CTRL_OFFSET, MSEPLL_SPPLL_CTRL_VCO_DIV2_DIS_SHIFT, \
MSEPLL_SPPLL_CTRL_VCO_DIV2_DIS_MASK, r2, r3
- /* Config to have an ouptut clock at 444 MHz */
+ /* Config to have an ouptut clock at 492 MHz */
mov r2, #0
mov r3, #MSEPLL_SPLL_CONF_INPUT_DIV_FIRST_4
add r2, r2, r3, lsl #MSEPLL_SPPLL_CONF_INPUT_DIV_FIRST_SHIFT
@@ -169,7 +169,7 @@ pll_init:
add r2, r2, r3, lsl #MSEPLL_SPPLL_CONF_OUTPUT_DIV_FIRST_SHIFT
mov r3, #MSEPLL_SPLL_CONF_LOOP_DIV_FIRST_2
add r2, r2, r3, lsl #MSEPLL_SPPLL_CONF_LOOP_DIV_FIRST_SHIFT
- mov r3, #37
+ mov r3, #41
add r2, r2, r3, lsl #MSEPLL_SPPLL_CONF_LOOP_DIV_SECOND_SHIFT
str r2, [r1, #MSEPLL_SPPLL_CONF_OFFSET]