summaryrefslogtreecommitdiff
path: root/2004/n/fpga/src/portserie/rxserie.vhd
blob: d53f129e90fd82a2403c9a936452ca5f8da1ab6e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
-- -------------------------------------------
-- Adaptateur de bus isa pour le fpga robot
-- -------------------------------------------

library ieee;
library ieee.std_logic_1164.all;


entity adaptisa is
    port (
	bus_address_in : in T_ADDRESS_ISA;
	cs: std_logic_vector(NB_ADDRESS_REG-1 downto 0);
	csbank: std_logic_vector(NB_ADDRESS_BANK-1 downto 0);
    );
end adaptisa;

architecture rtl of adaptisa is

begin

process()
begin
	
end process;

end rtl;