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authorgalmes2004-02-28 21:34:21 +0000
committergalmes2004-02-28 21:34:21 +0000
commit49a1716c3967e8c62b55359c9250d8c29e0acff7 (patch)
tree7acf42aac268bff5e8ec045535a9d921205c8a42 /2004/n/fpga/src
parent6926a945f5ffe7c996676e9557fee7e22e03a696 (diff)
Modification du fichiers de décodage
Diffstat (limited to '2004/n/fpga/src')
-rw-r--r--2004/n/fpga/src/gpio/decodeur.vhd10
1 files changed, 2 insertions, 8 deletions
diff --git a/2004/n/fpga/src/gpio/decodeur.vhd b/2004/n/fpga/src/gpio/decodeur.vhd
index 37848ac..ed9232e 100644
--- a/2004/n/fpga/src/gpio/decodeur.vhd
+++ b/2004/n/fpga/src/gpio/decodeur.vhd
@@ -14,7 +14,7 @@ use ieee.std_logic_1164.all;
use work.nono_const.all;
-entity decodeur is
+entity decodeur4 is
generic (
-- adresses des différents registres du module.
A_REG0 : T_ADDRESS;
@@ -34,15 +34,9 @@ entity decodeur is
);
end entity;
-architecture RTL of decodeur is
+architecture RTL of decodeur4 is
begin
--- process (clk)
--- begin
--- if (clk'event and clk = '1') then
--- end if;
--- end process;
-
-- process combinatoire.
enable0 <= '1' when (bus_address = A_REG0) else '0';
enable1 <= '1' when (bus_address = A_REG1) else '0';