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authorGareth McMullin2015-03-08 15:02:38 -0700
committerGareth McMullin2015-03-19 21:49:09 -0700
commit8ddb186b35267e90832deb2db4b0c58f77de4b87 (patch)
tree58f6cf40b653374df7086cf6a4cff236a9eacd2c /src
parent437aedda11a112407af7b3f7884090023944faef (diff)
Allow stub to return an error code.
Diffstat (limited to 'src')
-rw-r--r--src/cortexm.c9
-rw-r--r--src/stm32f1.c15
2 files changed, 13 insertions, 11 deletions
diff --git a/src/cortexm.c b/src/cortexm.c
index 0327edc..a129a3c 100644
--- a/src/cortexm.c
+++ b/src/cortexm.c
@@ -60,6 +60,7 @@ const struct command_s cortexm_cmd_list[] = {
static int cortexm_regs_read(struct target_s *target, void *data);
static int cortexm_regs_write(struct target_s *target, const void *data);
static int cortexm_pc_write(struct target_s *target, const uint32_t val);
+static uint32_t cortexm_pc_read(struct target_s *target);
static void cortexm_reset(struct target_s *target);
static int cortexm_halt_wait(struct target_s *target);
@@ -216,6 +217,7 @@ cortexm_probe(struct target_s *target)
target->regs_read = cortexm_regs_read;
target->regs_write = cortexm_regs_write;
target->pc_write = cortexm_pc_write;
+ target->pc_read = cortexm_pc_read;
target->reset = cortexm_reset;
target->halt_request = cortexm_halt_request;
@@ -629,7 +631,12 @@ int cortexm_run_stub(struct target_s *target, uint32_t loadaddr,
while (!cortexm_halt_wait(target))
;
- return 0;
+ uint32_t pc = cortexm_pc_read(target);
+ uint16_t bkpt_instr = target_mem_read16(target, pc);
+ if (bkpt_instr >> 8 != 0xbe)
+ return -2;
+
+ return bkpt_instr & 0xff;
}
/* The following routines implement hardware breakpoints.
diff --git a/src/stm32f1.c b/src/stm32f1.c
index 96faf1f..8f7a7d7 100644
--- a/src/stm32f1.c
+++ b/src/stm32f1.c
@@ -256,16 +256,11 @@ static int stm32f1_flash_write(struct target_s *target, uint32_t dest,
memcpy((uint8_t *)data + offset, src, len);
/* Write stub and data to target ram and set PC */
- target_mem_write(target, STUB_BUFFER_BASE, data, sizeof(data));
- cortexm_run_stub(target, SRAM_BASE, stm32f1_flash_write_stub,
- sizeof(stm32f1_flash_write_stub),
- dest - offset, STUB_BUFFER_BASE, sizeof(data), 0);
-
- /* Check for error */
- if (target_mem_read32(target, FLASH_SR) & SR_ERROR_MASK)
- return -1;
-
- return 0;
+ target_mem_write(target, STUB_BUFFER_BASE, (void*)data, sizeof(data));
+ return cortexm_run_stub(target, SRAM_BASE, stm32f1_flash_write_stub,
+ sizeof(stm32f1_flash_write_stub),
+ dest - offset, STUB_BUFFER_BASE, sizeof(data),
+ 0);
}
static bool stm32f1_cmd_erase_mass(target *t)