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authorGareth McMullin2011-03-05 23:43:03 +1300
committerGareth McMullin2011-03-05 23:43:03 +1300
commit91815f2d236608f0d12d64b3e20994674088d217 (patch)
treecb6e1ea5711a3db1b4639f260cea7e4d865921b3 /src/include/adiv5.h
parenta139aae4792d994d4f49678aa425e62d3b84662c (diff)
Cleaned up some magic numbers in adiv5*
Diffstat (limited to 'src/include/adiv5.h')
-rw-r--r--src/include/adiv5.h67
1 files changed, 63 insertions, 4 deletions
diff --git a/src/include/adiv5.h b/src/include/adiv5.h
index a9cacf1..f510f84 100644
--- a/src/include/adiv5.h
+++ b/src/include/adiv5.h
@@ -25,10 +25,69 @@
#include "jtag_scan.h"
#include "target.h"
-#define DP_ABORT 0x0
-#define DP_CTRLSTAT 0x4
-#define DP_SELECT 0x8
-#define DP_RDBUFF 0xC
+/* ADIv5 DP Register addresses */
+#define ADIV5_DP_IDCODE 0x0
+#define ADIV5_DP_ABORT 0x0
+#define ADIV5_DP_CTRLSTAT 0x4
+#define ADIV5_DP_SELECT 0x8
+#define ADIV5_DP_RDBUFF 0xC
+
+/* AP Abort Register (ABORT) */
+/* Bits 31:5 - Reserved */
+#define ADIV5_DP_ABORT_ORUNERRCLR (1 << 4)
+#define ADIV5_DP_ABORT_WDERRCLR (1 << 3)
+#define ADIV5_DP_ABORT_STKERRCLR (1 << 2)
+#define ADIV5_DP_ABORT_STKCMPCLR (1 << 1)
+/* Bits 5:1 - SW-DP only, reserved in JTAG-DP */
+#define ADIV5_DP_ABORT_DAPABORT (1 << 0)
+
+/* Control/Status Register (CTRLSTAT) */
+#define ADIV5_DP_CTRLSTAT_CSYSPWRUPACK (1u << 31)
+#define ADIV5_DP_CTRLSTAT_CSYSPWRUPREQ (1u << 30)
+#define ADIV5_DP_CTRLSTAT_CDBGPWRUPACK (1u << 29)
+#define ADIV5_DP_CTRLSTAT_CDBGPWRUPREQ (1u << 28)
+#define ADIV5_DP_CTRLSTAT_CDBGRSTACK (1u << 27)
+#define ADIV5_DP_CTRLSTAT_CDBGRSTREQ (1u << 26)
+/* Bits 25:24 - Reserved */
+/* Bits 23:12 - TRNCNT */
+#define ADIV5_DP_CTRLSTAT_TRNCNT
+/* Bits 11:8 - MASKLANE */
+#define ADIV5_DP_CTRLSTAT_MASKLANE
+/* Bits 7:6 - Reserved in JTAG-DP */
+#define ADIV5_DP_CTRLSTAT_WDATAERR (1u << 7)
+#define ADIV5_DP_CTRLSTAT_READOK (1u << 6)
+#define ADIV5_DP_CTRLSTAT_STICKYERR (1u << 5)
+#define ADIV5_DP_CTRLSTAT_STICKYCMP (1u << 4)
+#define ADIV5_DP_CTRLSTAT_TRNMODE_MASK (3u << 2)
+#define ADIV5_DP_CTRLSTAT_STICKYORUN (1u << 1)
+#define ADIV5_DP_CTRLSTAT_ORUNDETECT (1u << 0)
+
+
+/* ADIv5 MEM-AP Registers */
+#define ADIV5_AP_CSW 0x00
+#define ADIV5_AP_TAR 0x04
+/* 0x08 - Reserved */
+#define ADIV5_AP_DRW 0x0C
+#define ADIV5_AP_DB(x) (0x10 + (4*(x)))
+/* 0x20:0xF0 - Reserved */
+#define ADIV5_AP_CFG 0xF4
+#define ADIV5_AP_BASE 0xF8
+#define ADIV5_AP_IDR 0xFC
+
+/* AP Control and Status Word (CSW) */
+#define ADIV5_AP_CSW_DBGSWENABLE (1u << 31)
+/* Bits 30:24 - Prot (Implementation defined) */
+#define ADIV5_AP_CSW_SPIDEN (1u << 23)
+/* Bits 22:12 - Reserved */
+/* Bits 11:8 - Mode, must be zero */
+#define ADIV5_AP_CSW_TRINPROG (1u << 7)
+#define ADIV5_AP_CSW_DEVICEEN (1u << 6)
+#define ADIV5_AP_CSW_ADDRINC_SINGLE (1u << 4)
+/* Bit 3 - Reserved */
+#define ADIV5_AP_CSW_SIZE_BYTE (0u << 0)
+#define ADIV5_AP_CSW_SIZE_HALFWORD (1u << 0)
+#define ADIV5_AP_CSW_SIZE_WORD (2u << 0)
+#define ADIV5_AP_CSW_SIZE_MASK (7u << 0)
/* Try to keep this somewhat absract for later adding SW-DP */