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authorGareth McMullin2011-02-04 20:25:12 +1300
committerGareth McMullin2011-02-04 20:25:12 +1300
commit69d790fcf6f2a1c62ad1898031b4c8c0571bad05 (patch)
treec5802a5fc0374dfa0a2144d68cf7d46d26b19a1c /scripts/stubs
parent406617a2a470021d9412e9280feda0d28bdb653b (diff)
Added programming scripts.
Diffstat (limited to 'scripts/stubs')
-rw-r--r--scripts/stubs/Makefile12
-rw-r--r--scripts/stubs/stm32_opterase.S53
-rw-r--r--scripts/stubs/stm32_optprog.S52
3 files changed, 117 insertions, 0 deletions
diff --git a/scripts/stubs/Makefile b/scripts/stubs/Makefile
new file mode 100644
index 0000000..eb588d8
--- /dev/null
+++ b/scripts/stubs/Makefile
@@ -0,0 +1,12 @@
+CROSS_COMPILE = stm32-
+CC = $(CROSS_COMPILE)gcc
+OBJCOPY = $(CROSS_COMPILE)objcopy
+
+all: stm32_opterase.bin stm32_optprog.bin
+
+%.bin: %.S
+ $(CC) -nostdlib -Wl,-Ttext,0x20000000 $<
+ $(OBJCOPY) -O binary a.out $@
+
+clean:
+ -rm *.bin
diff --git a/scripts/stubs/stm32_opterase.S b/scripts/stubs/stm32_opterase.S
new file mode 100644
index 0000000..aea83e7
--- /dev/null
+++ b/scripts/stubs/stm32_opterase.S
@@ -0,0 +1,53 @@
+@; Assembler sequence to erase option bytes on STM32
+@; Takes no parameters, ends with BKPT instruction
+.global _start
+
+.equ FLASHBASE, 0x40022000
+
+.equ KEY1, 0x45670123
+.equ KEY2, 0xCDEF89AB
+
+.equ FLASH_KEY, 0x04
+.equ FLASH_OPTKEY, 0x08
+.equ FLASH_CR, 0x10
+.equ FLASH_SR, 0x0C
+
+.equ OPTER, 0x20
+.equ STRT, 0x40
+
+.equ BSY, 0x01
+
+.syntax unified
+
+_start:
+ @; Load FLASH controller base address
+ ldr r0, =FLASHBASE
+
+ @; Do unlocking sequence
+ ldr r1, =KEY1
+ str r1, [r0, #FLASH_KEY]
+ ldr r1, =KEY2
+ str r1, [r0, #FLASH_KEY]
+
+ @; Same for option bytes
+ ldr r1, =KEY1
+ str r1, [r0, #FLASH_OPTKEY]
+ ldr r1, =KEY2
+ str r1, [r0, #FLASH_OPTKEY]
+
+ @; Set OPTER bit in FLASH_CR
+ ldr r1, [r0, #FLASH_CR]
+ orr r1, r1, #OPTER
+ str r1, [r0, #FLASH_CR]
+ @; Set STRT bit in FLASH_CR
+ orr r1, r1, #STRT
+ str r1, [r0, #FLASH_CR]
+
+_wait: @; Wait for BSY bit to clear
+ ldr r4, [r0, #FLASH_SR]
+ mov r6, #BSY
+ tst r4, r6
+ bne _wait
+
+ bkpt
+
diff --git a/scripts/stubs/stm32_optprog.S b/scripts/stubs/stm32_optprog.S
new file mode 100644
index 0000000..cc97cd6
--- /dev/null
+++ b/scripts/stubs/stm32_optprog.S
@@ -0,0 +1,52 @@
+@; Assembler sequence to program option bytes on STM32
+@; Takes option address in r0 and value in r1.
+@; Ends with BKPT instruction
+.global _start
+
+.equ FLASHBASE, 0x40022000
+
+.equ KEY1, 0x45670123
+.equ KEY2, 0xCDEF89AB
+
+.equ FLASH_KEY, 0x04
+.equ FLASH_OPTKEY, 0x08
+.equ FLASH_CR, 0x10
+.equ FLASH_SR, 0x0C
+
+.equ OPTPG, 0x10
+
+.equ BSY, 0x01
+
+.syntax unified
+
+_start:
+ @; Load FLASH controller base address
+ ldr r2, =FLASHBASE
+
+ @; Do unlocking sequence
+ ldr r3, =KEY1
+ str r3, [r2, #FLASH_KEY]
+ ldr r3, =KEY2
+ str r3, [r2, #FLASH_KEY]
+
+ @; Same for option bytes
+ ldr r3, =KEY1
+ str r3, [r2, #FLASH_OPTKEY]
+ ldr r3, =KEY2
+ str r3, [r2, #FLASH_OPTKEY]
+
+ @; Set OPTPG bit in FLASH_CR
+ ldr r3, [r2, #FLASH_CR]
+ orr r3, r3, #OPTPG
+ str r3, [r2, #FLASH_CR]
+ @; Write data at address
+ strh r1, [r0]
+
+_wait: @; Wait for BSY bit to clear
+ ldr r4, [r2, #FLASH_SR]
+ mov r6, #BSY
+ tst r4, r6
+ bne _wait
+
+ bkpt
+