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authorGareth McMullin2012-11-03 23:51:53 +1300
committerGareth McMullin2012-11-03 23:53:25 +1300
commit2637f072a1e973826ea4b374125621ef1a0dc901 (patch)
tree5dc228f1e9256ab4e26ae3e0c2ac15cc4d33098b
parente1c1162a1a666387133780efa31935e5b6dcc5c7 (diff)
Probe function return bool, true if device identified.
Correctly identify LM3S3748.
-rw-r--r--src/cortexm.c7
-rw-r--r--src/include/target.h18
-rw-r--r--src/lmi.c20
-rw-r--r--src/lpc43xx.c6
-rw-r--r--src/nxp_tgt.c9
-rw-r--r--src/sam3x.c6
-rw-r--r--src/stm32f1.c14
-rw-r--r--src/stm32f4.c12
-rw-r--r--src/stm32l1.c6
9 files changed, 50 insertions, 48 deletions
diff --git a/src/cortexm.c b/src/cortexm.c
index 167fce8..4430e6e 100644
--- a/src/cortexm.c
+++ b/src/cortexm.c
@@ -315,7 +315,7 @@ static const char tdesc_cortex_mf[] =
" </feature>"
"</target>";
-int
+bool
cortexm_probe(struct target_s *target)
{
target->driver = cortexm_driver_str;
@@ -357,7 +357,7 @@ cortexm_probe(struct target_s *target)
CORTEXM_DEMCR_VC_CORERESET;
#define PROBE(x) \
- do { if (!(x)(target)) return 0; else target_check_error(target); } while (0)
+ do { if ((x)(target)) return true; else target_check_error(target); } while (0)
PROBE(stm32f1_probe);
PROBE(stm32f4_probe);
@@ -365,11 +365,10 @@ cortexm_probe(struct target_s *target)
PROBE(lpc11xx_probe);
PROBE(lpc43xx_probe);
PROBE(sam3x_probe);
- /* Try LMI last, as it doesn't fail. */
PROBE(lmi_probe);
#undef PROBE
- return 0;
+ return true;
}
static bool
diff --git a/src/include/target.h b/src/include/target.h
index 9be0e18..31501f6 100644
--- a/src/include/target.h
+++ b/src/include/target.h
@@ -25,6 +25,8 @@
#ifndef __TARGET_H
#define __TARGET_H
+#include "general.h"
+
typedef struct target_s target;
/* The destroy callback function will be called by target_list_free() just
@@ -194,14 +196,14 @@ void target_add_commands(target *t, const struct command_s *cmds, const char *na
/* Probe for various targets.
* Actual functions implemented in their respective drivers.
*/
-int cortexm_probe(struct target_s *target);
-int stm32f1_probe(struct target_s *target);
-int stm32f4_probe(struct target_s *target);
-int stm32l1_probe(struct target_s *target);
-int lmi_probe(struct target_s *target);
-int lpc11xx_probe(struct target_s *target);
-int lpc43xx_probe(struct target_s *target);
-int sam3x_probe(struct target_s *target);
+bool cortexm_probe(struct target_s *target);
+bool stm32f1_probe(struct target_s *target);
+bool stm32f4_probe(struct target_s *target);
+bool stm32l1_probe(struct target_s *target);
+bool lmi_probe(struct target_s *target);
+bool lpc11xx_probe(struct target_s *target);
+bool lpc43xx_probe(struct target_s *target);
+bool sam3x_probe(struct target_s *target);
#endif
diff --git a/src/lmi.c b/src/lmi.c
index a4ae1f7..09a9dd5 100644
--- a/src/lmi.c
+++ b/src/lmi.c
@@ -89,15 +89,19 @@ uint16_t lmi_flash_write_stub[] = {
// _data:
// ...
};
-
-int lmi_probe(struct target_s *target)
+
+bool lmi_probe(struct target_s *target)
{
- /* How do we really probe the LMI device??? */
- target->driver = lmi_driver_str;
- target->xml_mem_map = lmi_xml_memory_map;
- target->flash_erase = lmi_flash_erase;
- target->flash_write = lmi_flash_write;
- return 0;
+ uint32_t did1 = adiv5_ap_mem_read(adiv5_target_ap(target), 0x400FE004);
+ switch (did1 >> 16) {
+ case 0x1049: /* LM3S3748 */
+ target->driver = lmi_driver_str;
+ target->xml_mem_map = lmi_xml_memory_map;
+ target->flash_erase = lmi_flash_erase;
+ target->flash_write = lmi_flash_write;
+ return true;
+ }
+ return false;
}
int lmi_flash_erase(struct target_s *target, uint32_t addr, int len)
diff --git a/src/lpc43xx.c b/src/lpc43xx.c
index 2652b42..ca1b351 100644
--- a/src/lpc43xx.c
+++ b/src/lpc43xx.c
@@ -24,7 +24,7 @@
#define LPC43XX_CHIPID 0x40043200
#define ARM_CPUID 0xE000ED00
-int lpc43xx_probe(struct target_s *target)
+bool lpc43xx_probe(struct target_s *target)
{
uint32_t chipid, cpuid;
@@ -45,9 +45,9 @@ int lpc43xx_probe(struct target_s *target)
default:
target->driver = "LPC43xx <Unknown>";
}
- return 0;
+ return true;
}
- return -1;
+ return false;
}
diff --git a/src/nxp_tgt.c b/src/nxp_tgt.c
index 4636e39..ca6a81f 100644
--- a/src/nxp_tgt.c
+++ b/src/nxp_tgt.c
@@ -67,7 +67,7 @@ static const char lpc11xx_xml_memory_map[] = "<?xml version=\"1.0\"?>"
"</memory-map>";
-int
+bool
lpc11xx_probe(struct target_s *target)
{
uint32_t idcode;
@@ -101,13 +101,10 @@ lpc11xx_probe(struct target_s *target)
target->flash_erase = lpc11xx_flash_erase;
target->flash_write = lpc11xx_flash_write;
- return 0;
-
- default:
- break;
+ return true;
}
- return -1;
+ return false;
}
static void
diff --git a/src/sam3x.c b/src/sam3x.c
index 87ce020..d348701 100644
--- a/src/sam3x.c
+++ b/src/sam3x.c
@@ -109,7 +109,7 @@ static const char sam3x_xml_memory_map[] = "<?xml version=\"1.0\"?>"
#define PAGE_SIZE 256
-int sam3x_probe(struct target_s *target)
+bool sam3x_probe(struct target_s *target)
{
ADIv5_AP_t *ap = adiv5_target_ap(target);
@@ -125,9 +125,9 @@ int sam3x_probe(struct target_s *target)
target->flash_erase = sam3x_flash_erase;
target->flash_write = sam3x_flash_write;
target_add_commands(target, sam3x_cmd_list, sam3x_driver_str);
- return 0;
+ return true;
}
- return -1;
+ return false;
}
static int
diff --git a/src/stm32f1.c b/src/stm32f1.c
index 95ac543..2a523b7 100644
--- a/src/stm32f1.c
+++ b/src/stm32f1.c
@@ -151,7 +151,7 @@ uint16_t stm32f1_flash_write_stub[] = {
// ...
};
-int stm32f1_probe(struct target_s *target)
+bool stm32f1_probe(struct target_s *target)
{
uint32_t idcode;
@@ -165,7 +165,7 @@ int stm32f1_probe(struct target_s *target)
target->flash_erase = stm32md_flash_erase;
target->flash_write = stm32f1_flash_write;
target_add_commands(target, stm32f1_cmd_list, "STM32");
- return 0;
+ return true;
case 0x414: /* High density */
case 0x418: /* Connectivity Line */
case 0x428: /* Value Line, High Density */
@@ -174,14 +174,14 @@ int stm32f1_probe(struct target_s *target)
target->flash_erase = stm32hd_flash_erase;
target->flash_write = stm32f1_flash_write;
target_add_commands(target, stm32f1_cmd_list, "STM32");
- return 0;
+ return true;
case 0x422: /* STM32F3 */
target->driver = stm32f3_driver_str;
target->xml_mem_map = stm32hd_xml_memory_map;
target->flash_erase = stm32hd_flash_erase;
target->flash_write = stm32f1_flash_write;
target_add_commands(target, stm32f1_cmd_list, "STM32");
- return 0;
+ return true;
}
idcode = adiv5_ap_mem_read(adiv5_target_ap(target), DBGMCU_IDCODE_F0);
@@ -192,10 +192,10 @@ int stm32f1_probe(struct target_s *target)
target->flash_erase = stm32md_flash_erase;
target->flash_write = stm32f1_flash_write;
target_add_commands(target, stm32f1_cmd_list, "STM32");
- return 0;
+ return true;
}
-
- return -1;
+
+ return false;
}
static void stm32f1_flash_unlock(ADIv5_AP_t *ap)
diff --git a/src/stm32f4.c b/src/stm32f4.c
index b483510..ecf99e1 100644
--- a/src/stm32f4.c
+++ b/src/stm32f4.c
@@ -133,24 +133,24 @@ uint16_t stm32f4_flash_write_stub[] = {
// ...
};
-int stm32f4_probe(struct target_s *target)
+bool stm32f4_probe(struct target_s *target)
{
uint32_t idcode;
idcode = adiv5_ap_mem_read(adiv5_target_ap(target), DBGMCU_IDCODE);
switch(idcode & 0xFFF) {
case 0x411: /* Documented to be 0x413! This is what I read... */
- case 0x413:
+ case 0x413:
target->driver = stm32f4_driver_str;
target->xml_mem_map = stm32f4_xml_memory_map;
target->flash_erase = stm32f4_flash_erase;
target->flash_write = stm32f4_flash_write;
- return 0;
- }
- return -1;
+ return true;
+ }
+ return false;
}
-
+
static int stm32f4_flash_erase(struct target_s *target, uint32_t addr, int len)
{
ADIv5_AP_t *ap = adiv5_target_ap(target);
diff --git a/src/stm32l1.c b/src/stm32l1.c
index 44d9d32..8fd25f7 100644
--- a/src/stm32l1.c
+++ b/src/stm32l1.c
@@ -85,7 +85,7 @@ static const char stm32l1_xml_memory_map[] = "<?xml version=\"1.0\"?>"
#define DBGMCU_IDCODE 0xE0042000
-int stm32l1_probe(struct target_s *target)
+bool stm32l1_probe(struct target_s *target)
{
uint32_t idcode;
@@ -97,10 +97,10 @@ int stm32l1_probe(struct target_s *target)
target->xml_mem_map = stm32l1_xml_memory_map;
target->flash_erase = stm32l1_flash_erase;
target->flash_write = stm32l1_flash_write;
- return 0;
+ return true;
}
- return -1;
+ return false;
}
static void stm32l1_flash_unlock(ADIv5_AP_t *ap)