aboutsummaryrefslogtreecommitdiff
path: root/src/cortexm.c
diff options
context:
space:
mode:
authorGareth McMullin2013-06-19 21:05:53 +1200
committerGareth McMullin2013-06-19 21:05:53 +1200
commitd8f737fc53fa27bb13a934f94e39157748401ce4 (patch)
tree82c8b008e1eceafe240f8e394266be818c9d7aa0 /src/cortexm.c
parentd90e10cdbaa05509d1ee78f982d3aa0a2c94e972 (diff)
Disable ADIv5 timeout while target is running.
Diffstat (limited to 'src/cortexm.c')
-rw-r--r--src/cortexm.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cortexm.c b/src/cortexm.c
index 7819598..a8bb34b 100644
--- a/src/cortexm.c
+++ b/src/cortexm.c
@@ -584,6 +584,7 @@ cortexm_halt_request(struct target_s *target)
{
ADIv5_AP_t *ap = adiv5_target_ap(target);
+ ap->dp->allow_timeout = false;
adiv5_ap_mem_write(ap, CORTEXM_DHCSR,
CORTEXM_DHCSR_DBGKEY | CORTEXM_DHCSR_C_HALT | CORTEXM_DHCSR_C_DEBUGEN);
}
@@ -596,6 +597,8 @@ cortexm_halt_wait(struct target_s *target)
if (!(adiv5_ap_mem_read(ap, CORTEXM_DHCSR) & CORTEXM_DHCSR_S_HALT))
return 0;
+ ap->dp->allow_timeout = false;
+
/* We've halted. Let's find out why. */
uint32_t dfsr = adiv5_ap_mem_read(ap, CORTEXM_DFSR);
adiv5_ap_mem_write(ap, CORTEXM_DFSR, dfsr); /* write back to reset */
@@ -654,6 +657,7 @@ cortexm_halt_resume(struct target_s *target, bool step)
}
adiv5_ap_mem_write(ap, CORTEXM_DHCSR, dhcsr);
+ ap->dp->allow_timeout = true;
}
static int cortexm_fault_unwind(struct target_s *target)