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2012-09-05updated arm function label declarations to use .type directive for interworkingTat-Chee Wan (USM)
Newer binutils (>2.21) does not handle interworking correctly if the .type directive is not used for ARM functions. The fix is to add a private copy of the arm_interwork macro to the debugger stub to avoid this issue when calling ARM routines from Thumb (used by NIF).
2012-09-03clean up doxygen warningsTat-Chee Wan (USM)
2012-04-02Fixed Doxygen comment syntaxTat-Chee Wan (USM)
2011-07-20disable setting of fpscr dummy registerTC Wan
Updated comments related to register manipulatuion
2011-07-20updated comments for fp reg processing, set one reg logicTat-Chee Wan (USM)
Updated comments related to set one register, fixed logic for updating dummy FP registers
2011-07-20revised get register logicTat-Chee Wan (USM)
GDB will query for CPSR register value explicitly. Return dummy values for FP0-FP7, FPSCR
2011-07-20fix register usage clobbered by revised output macrosTat-Chee Wan (USM)
R3 was clobbered by buffer output macros. Don't use R3 to store important data.
2011-07-20refactoring of message copying macrosTat-Chee Wan (USM)
Cleaned up macros used to copy debug messages to output buffers
2011-07-20fix register corruption when using setstate macroTat-Chee Wan (USM)
We must preserve R0 and R1 which are destroyed by the setstate macro.
2011-07-20implement query current thread supportTat-Chee Wan (USM)
2011-07-13remote autobreakpoint code from master branchTat-Chee Wan (USM)
Autobreakpoint support is not robust. It is removed from the master branch. The autobreakpoint_stub branch contains the old autobreakpoint code.
2011-07-12conditionally exclude dead code from breakpoint handling logicTat-Chee Wan (USM)
2011-07-12fix register corruption in __dbg__iterate_breakpoint_arrayTat-Chee Wan (USM)
Handler routine corrupts register used by __dbg__iterate_breakpoint_array. Added comments to indicate entry and exit register state for breakpoint related routines.
2011-07-12return lowecase hex chars to avoid conflict with gdb error responseTat-Chee Wan (USM)
GDB error response starts with E NN, which can be triggered if the hex value starts with an E digit. Use lowercase hex digits to avoid this conflict.
2011-07-12avoid endless loop in test_arm_2 routineTat-Chee Wan (USM)
2011-07-12use r3 in test_arm_3 to avoid clobbering r2Tat-Chee Wan (USM)
2011-07-12more logic bugs in arm loop branch testTat-Chee Wan (USM)
2011-07-12fix branch logic in arm test caseTat-Chee Wan (USM)
2011-07-12more fixes to arm test routineTat-Chee Wan (USM)
2011-07-12fix loop logic in arm test routineTat-Chee Wan (USM)
2011-07-12added bx pc support for arm instruction decoding, updated commentsTat-Chee Wan (USM)
BX PC for ARM mode does not account for PC relative offsets. Updated comments regarding instruction parsing.
2011-07-12fix thumb mode bx pc target address calculationTat-Chee Wan (USM)
BX PC is used to call ARM subroutines from Thumb mode. The address returned by BX PC should be 2 instructions after the current PC value (PC+4).
2011-07-12arm subroutines called from thumb mode must be declared globalTat-Chee Wan (USM)
2011-07-12revised loop constants againTat-Chee Wan (USM)
2011-07-12fix syntax error for hex constantTat-Chee Wan (USM)
2011-07-12updated thumb test case compare limits to shorten single stepping durationTat-Chee Wan (USM)
2011-07-12fix thumb target address missing thumb flag for bx instructionTat-Chee Wan (USM)
2011-07-12modified debug test case for shorter loops to enable single steppingTat-Chee Wan (USM)
2011-07-11fix thumb instruction parser for pop pcTat-Chee Wan (USM)
SP was not incremented correctly for the Thumb instruction POP PC opcode.
2011-07-11most set thumb flag for non-matching thumb instruction decode caseTat-Chee Wan (USM)
Thumb bit was not set if there was no matching Thumb instruction found
2011-07-11do not set thumb flag before calling thumb instruction handler routinesTat-Chee Wan (USM)
Pass valid (even) addresses to thumb instruction handler routines. Set Thumb bit (b0) only on return from the handlers.
2011-07-11fix comment textTat-Chee Wan (USM)
2011-07-11fix data abort error due to thumb bit set in instruction addressTat-Chee Wan (USM)
Need to clear thumb flag in _dbg__install_one_breakpoint before accessing memory location, otherwise a Data Abort will be triggered for thumb instructions
2011-07-11updated gdb signal numbers based on ecos headerTat-Chee Wan (USM)
Use actual ECoS header signal definitions
2011-07-11fix invalid values for abort signalsTat-Chee Wan (USM)
Use correct enum defintion macros to define abort signal values
2011-07-11update signal output to handle prefetch and data abortsTat-Chee Wan (USM)
Implement Prefetch and Data Abort Signal enum output
2011-07-11revert b9bb70c16dba4c945b75f1a4b929e2ec304d2874, revise fixTat-Chee Wan (USM)
We need to adjust SP to store SPSR and Aborted Next Instruction Address Revised fix to not update SP for storing Aborted PC to R15 slot, but to copy the adjusted SP value for the R14 slot to R3 instead.
2011-07-11fix incorrect stack pointer offset for debug stack save of abort stateTat-Chee Wan (USM)
SP was not updated after storing Aborted instruction PC to debug stack
2011-07-11test pc relative loads to pcTat-Chee Wan (USM)
2011-07-11export dbg__display_abort_info symbolTat-Chee Wan (USM)
2011-07-09cleanup abort handler to armdebug interfaceTat-Chee Wan (USM)
2011-07-09preliminary abort exception handlerTat-Chee Wan (USM)
2011-07-09added preliminary abort mode supportTat-Chee Wan (USM)
Interface to platform specific LCD Display routines
2011-07-09added preliminary abort exception supportTat-Chee Wan (USM)
2011-07-09comments and code alignment cleanupsTat-Chee Wan (USM)
2011-07-09thumb mode tests, modified arm mode test for signed comparesTat-Chee Wan (USM)
Thumb mode test routine using Unsigned compares Implement Signed Compares for ARM Mode
2011-07-08code cleanup, fix breakpoint handling logic on entry to debuggerTat-Chee Wan (USM)
When any Breakpoint is triggered, we must restore all active breakpoints. Otherwise, in the case where Normal Breakpoints are active and we encounter a Manual Breakpoint, the Normal Breakpoint will be left dangling (and eventually the breakpoint will be cleared by GDB, destroying the original instruction opcode).
2011-07-06fix syntax errorsTat-Chee Wan (USM)
2011-07-06updated arm condtion code check algorithmTC Wan
The previous ARM Condition Code checking algorithm was incorrect due to an error in the LS condition requirements. Revised algorithm with some code optimization
2011-07-06update comment on nak message processingTat-Chee Wan (USM)