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authorTat-Chee Wan (USM)2011-07-20 13:07:26 +0800
committerTat-Chee Wan (USM)2011-07-20 13:07:26 +0800
commit7d8a7f48a367091ab99a9e075205478fa3edb8c3 (patch)
treeff10b6b121c4bf6f30b013a8ce745e7b488bd991 /Debugger
parent2b908b104aa9be49c77627dfa3a57833e75cdc20 (diff)
updated comments for fp reg processing, set one reg logic
Updated comments related to set one register, fixed logic for updating dummy FP registers
Diffstat (limited to 'Debugger')
-rw-r--r--Debugger/debug_stub.S12
1 files changed, 8 insertions, 4 deletions
diff --git a/Debugger/debug_stub.S b/Debugger/debug_stub.S
index 90bc9ce..404eb4d 100644
--- a/Debugger/debug_stub.S
+++ b/Debugger/debug_stub.S
@@ -72,7 +72,7 @@
* px get the value of one register (x) hex data or ENN
* Px=rrrr set the value of one register (x) to OK or ENN
* 32-bit hex value rrrr.
- * x = ['0','F'] for R0-R15,
+ * x = ['0','F'] for R0-R15, ['10','17'] for F0-F7 (dummy)
* '18' for FPSCR (dummy), '19' for User CPSR
*
* mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN
@@ -835,9 +835,9 @@ _dbg_outputOneRegValue:
#endif
_output_dummy_regval:
- /* Output Dummy Register value (for FP0-FP7, FPSR) */
+ /* Output Dummy Register value (for F0-F7, FPSR) */
mov r1, #0
- b _output2buffer /* Output all zeros for FPSCR */
+ b _output2buffer /* Output all zeros for F0-F7, FPSCR */
_retrieve_RegVal:
_getdbgregisterfromindex r2, r1 /* Retrieve Register contents into R1 */
@@ -906,11 +906,15 @@ _dbg_setOneRegValue:
moveq r2, #DBGSTACK_USERCPSR_INDEX /* convert register enum to Debug Stack index */
beq _store_RegVal
+ bhi _exit_dbg_setOneRegValue /* No match (reg enum > REG_CPSR), skip */
+
+#if 0
cmp r1, #REG_FPSCR
bne _exit_dbg_setOneRegValue /* No match, skip */
/* FIXME: If we get SetAllRegs with FP reg values, this will not skip pass the FP regs! */
+#endif
-_set_dummy_fpscr:
+_set_dummy_regval:
/* Set dummy FPSCR value (ignored) */
add r1, r0, #CMD_REG_REGPARAMLEN /* Just increment the pointer */
b _done_store_RegVal