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authortmk2010-11-06 01:58:47 +0900
committertmk2010-11-07 20:45:04 +0900
commit2ca3ab18a2120a4320912547031a48b0dd1f1bad (patch)
tree76b0255282b77d54a4655f2fb0b3abee498ee47c /hhkb
parent89feab2301725263326154de6b946969be30c0be (diff)
output previous key state on TP1684 when scaning matrix.
Diffstat (limited to 'hhkb')
-rw-r--r--hhkb/doc/HHKB.txt17
-rw-r--r--hhkb/matrix.c28
2 files changed, 31 insertions, 14 deletions
diff --git a/hhkb/doc/HHKB.txt b/hhkb/doc/HHKB.txt
index 3ca272c80..e9f41adab 100644
--- a/hhkb/doc/HHKB.txt
+++ b/hhkb/doc/HHKB.txt
@@ -84,7 +84,7 @@ Two PCBs are connected by 15 lines. Vcc and GND use 3 lines each, other 9 lines
2 Vcc(5V)
3 Vcc(5V)
4 TP1684 KEY: Low(0) when key pressed PE6 input(with pullup)
- 5 TP1684 unknown:how to use PE7 input(with pullup)
+ 5 TP1684 KEY_PREV: assert previous key state??? PE7 output
6 HC4051 A(bit0) select 8 rows(0 to 7) PB0 output
7 HC4051 B(bit1) PB1 output
8 HC4051 C(bit2) PB2 output
@@ -148,9 +148,11 @@ Signals charts:
(HHKB_chart1.jpg)
- Space bar locate at ROW:3 COL:7. Key are selected by HC4051(C,B,A) and LS145(C,B,A).
+ Space bar locate at ROW:3 COL:7. A key is selected by HC4051(C,B,A) and LS145(C,B,A).
Key state can be read on TP1684(4/KEY) while asserting low on LS145(D).
- Usage of TP1684(5) is unknown. Key state can be read without using this signal.
+
+ Usage of TP1684(5) is not clear. Controller seemed to output previous key state on this line.
+ However key state can be read without using this signal.
(HHKB_chart2.jpg)
@@ -162,7 +164,13 @@ Matrix scan pseudo code:
for (col: 0-7) {
SELECT_COL(col); // set LS145(A,B,C)
- _delay_us(50);
+ _delay_us(40);
+
+ if (prev_key_state(row, col)) {
+ KEY_PREV_ON;
+ }
+
+ _delay_us(7);
ENALBLE_COL(); // set LS145(D) to low
@@ -174,6 +182,7 @@ Matrix scan pseudo code:
// not pressed
}
+ KEY_PREV_OFF;
UNALBLE_COL(); // set LS145(D) to high
_delay_us(150);
diff --git a/hhkb/matrix.c b/hhkb/matrix.c
index cf5e8a0ef..a6e0bf633 100644
--- a/hhkb/matrix.c
+++ b/hhkb/matrix.c
@@ -19,13 +19,15 @@
// PB3, PB4, PB5, PB6(A, B, C, D)
// use D as ENABLE: (enable: 0/unenable: 1)
// key: KEY: (on: 0/ off:1)
-// UNKNOWN: unknown whether input or output
-// PE6,PE7(KEY, UNKNOWN)
+// KEY_PREV: (on: 1/ off: 0)
+// PE6,PE7(KEY, KEY_PREV)
#define COL_ENABLE (1<<6)
#define KEY_SELELCT(ROW, COL) (PORTB = COL_ENABLE|(((COL)&0x07)<<3)|((ROW)&0x07))
#define KEY_ENABLE (PORTB &= ~COL_ENABLE)
#define KEY_UNABLE (PORTB |= COL_ENABLE)
-#define KEY_ON ((PINE&(1<<6)) ? false : true)
+#define KEY_STATE (PINE&(1<<6))
+#define KEY_PREV_ON (PORTE |= (1<<7))
+#define KEY_PREV_OFF (PORTE &= ~(1<<7))
// matrix state buffer
static uint8_t *matrix;
@@ -52,9 +54,10 @@ void matrix_init(void)
// row & col output(PB0-6)
DDRB = 0xFF;
PORTB = KEY_SELELCT(0, 0);
- // KEY & VALID input with pullup(PE6,7)
- DDRE = 0x3F;
- PORTE = 0xC0;
+ // KEY: input with pullup(PE6)
+ // KEY_PREV: output(PE7)
+ DDRE = 0xBF;
+ PORTE = 0x40;
// initialize matrix state: all keys off
for (int i=0; i < MATRIX_ROWS; i++) _matrix0[i] = 0x00;
@@ -74,14 +77,19 @@ int matrix_scan(void)
for (int row = 0; row < MATRIX_ROWS; row++) {
for (int col = 0; col < MATRIX_COLS; col++) {
KEY_SELELCT(row, col);
- _delay_us(50); // from logic analyzer chart
+ _delay_us(40); // from logic analyzer chart
+ if (matrix_prev[row] & (1<<col)) {
+ KEY_PREV_ON;
+ }
+ _delay_us(7); // from logic analyzer chart
KEY_ENABLE;
_delay_us(10); // from logic analyzer chart
- if (KEY_ON) {
- matrix[row] |= (1<<col);
- } else {
+ if (KEY_STATE) {
matrix[row] &= ~(1<<col);
+ } else {
+ matrix[row] |= (1<<col);
}
+ KEY_PREV_OFF;
KEY_UNABLE;
_delay_us(150); // from logic analyzer chart
}