summaryrefslogtreecommitdiff
path: root/polux/include/sfk-win32/flip_defs.h
blob: befa892de117fa94117508695bd07c087b757da3 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
#ifndef FLIP_DEFS_H_INCLUDED
#define FLIP_DEFS_H_INCLUDED

#define VD_CR_DPRD_OFF_RAW      	 0x0
#define VD_CR_DPRD_OFF          	 0x0
#define VD_CR_DPRD_ON_RAW       	 0x1
#define VD_CR_DPRD_ON           	 0x2
#define VD_CR_START_OFF_RAW     	 0x0
#define VD_CR_START_OFF         	 0x0
#define VD_CR_START_ON_RAW      	 0x1
#define VD_CR_START_ON          	 0x1
#define VD_CR_TV1_OFF_RAW       	 0x0
#define VD_CR_TV1_OFF           	 0x0
#define VD_CR_TV1_ON_RAW        	 0x1
#define VD_CR_TV1_ON            	 0x100
#define VD_CR_TV2_OFF_RAW       	 0x0
#define VD_CR_TV2_OFF           	 0x0
#define VD_CR_TV2_ON_RAW        	 0x1
#define VD_CR_TV2_ON            	 0x200
#define VD_SR_DONEV1_GOT_RAW    	 0x1
#define VD_SR_DONEV1_GOT        	 0x100
#define VD_SR_DONEV1_NO_RAW     	 0x0
#define VD_SR_DONEV1_NO         	 0x0
#define VD_SR_DONEV2_GOT_RAW    	 0x1
#define VD_SR_DONEV2_GOT        	 0x200
#define VD_SR_DONEV2_NO_RAW     	 0x0
#define VD_SR_DONEV2_NO         	 0x0
#define VD_SR_DPAEF_GOT_RAW     	 0x1
#define VD_SR_DPAEF_GOT         	 0x4
#define VD_SR_DPAEF_NO_RAW      	 0x0
#define VD_SR_DPAEF_NO          	 0x0
#define VD_SR_DPEF_GOT_RAW      	 0x1
#define VD_SR_DPEF_GOT          	 0x2
#define VD_SR_DPEF_NO_RAW       	 0x0
#define VD_SR_DPEF_NO           	 0x0
#define VD_SR_RDY_NOTYET_RAW    	 0x0
#define VD_SR_RDY_NOTYET        	 0x0
#define VD_SR_RDY_OK_RAW        	 0x1
#define VD_SR_RDY_OK            	 0x1
#define VD_SR_TXERR_GOT_RAW     	 0x1
#define VD_SR_TXERR_GOT         	 0x8
#define VD_SR_TXERR_NO_RAW      	 0x0
#define VD_SR_TXERR_NO          	 0x0
#define VD_CR                   	 0x21020001
#define VD_CR_OFFSET            	 0x2
#define VD_CR_UMASK             	 0x303
#define VD_CR_CMASK             	 0x0
#define VD_CR_MMASK             	 0x0
#define VD_CR_RMASK             	 0x303
#define VD_CR_WMASK             	 0x303
#define VD_CR_CSTVAL            	 0x0
#define VD_CR_RSTVAL            	 0x0
#define VD_SR                   	 0x21020000
#define VD_SR_OFFSET            	 0x0
#define VD_SR_UMASK             	 0x30F
#define VD_SR_CMASK             	 0x0
#define VD_SR_MMASK             	 0x0
#define VD_SR_RMASK             	 0x30F
#define VD_SR_WMASK             	 0x0
#define VD_SR_CSTVAL            	 0x0
#define VD_SR_RSTVAL            	 0x0
#define VD_CR_DPRD              	 0x2
#define VD_CR_DPRD_MSB          	 0x1
#define VD_CR_DPRD_LSB          	 0x1
#define VD_CR_DPRD_SIZE         	 0x1
#define VD_CR_DPRD_RSTVAL       	 0x0
#define VD_CR_START             	 0x1
#define VD_CR_START_MSB         	 0x0
#define VD_CR_START_LSB         	 0x0
#define VD_CR_START_SIZE        	 0x1
#define VD_CR_START_RSTVAL      	 0x0
#define VD_CR_TV1               	 0x100
#define VD_CR_TV1_MSB           	 0x8
#define VD_CR_TV1_LSB           	 0x8
#define VD_CR_TV1_SIZE          	 0x1
#define VD_CR_TV1_RSTVAL        	 0x0
#define VD_CR_TV2               	 0x200
#define VD_CR_TV2_MSB           	 0x9
#define VD_CR_TV2_LSB           	 0x9
#define VD_CR_TV2_SIZE          	 0x1
#define VD_CR_TV2_RSTVAL        	 0x0
#define VD_SR_DONEV1            	 0x100
#define VD_SR_DONEV1_MSB        	 0x8
#define VD_SR_DONEV1_LSB        	 0x8
#define VD_SR_DONEV1_SIZE       	 0x1
#define VD_SR_DONEV1_RSTVAL     	 0x0
#define VD_SR_DONEV2            	 0x200
#define VD_SR_DONEV2_MSB        	 0x9
#define VD_SR_DONEV2_LSB        	 0x9
#define VD_SR_DONEV2_SIZE       	 0x1
#define VD_SR_DONEV2_RSTVAL     	 0x0
#define VD_SR_DPAEF             	 0x4
#define VD_SR_DPAEF_MSB         	 0x2
#define VD_SR_DPAEF_LSB         	 0x2
#define VD_SR_DPAEF_SIZE        	 0x1
#define VD_SR_DPAEF_RSTVAL      	 0x0
#define VD_SR_DPEF              	 0x2
#define VD_SR_DPEF_MSB          	 0x1
#define VD_SR_DPEF_LSB          	 0x1
#define VD_SR_DPEF_SIZE         	 0x1
#define VD_SR_DPEF_RSTVAL       	 0x0
#define VD_SR_RDY               	 0x1
#define VD_SR_RDY_MSB           	 0x0
#define VD_SR_RDY_LSB           	 0x0
#define VD_SR_RDY_SIZE          	 0x1
#define VD_SR_RDY_RSTVAL        	 0x0
#define VD_SR_STATE             	 0x0
#define VD_SR_STATE_MSB         	 0x9
#define VD_SR_STATE_LSB         	 0xA
#define VD_SR_STATE_SIZE        	 0x0
#define VD_SR_STATE_RSTVAL      	 0x0
#define VD_SR_TXERR             	 0x8
#define VD_SR_TXERR_MSB         	 0x3
#define VD_SR_TXERR_LSB         	 0x3
#define VD_SR_TXERR_SIZE        	 0x1
#define VD_SR_TXERR_RSTVAL      	 0x0

#define PLD_EX_SIZE	0x100
#define PLD_V1_SIZE	0x1000000
#define PLD_V2_SIZE 0x1000000

extern uint16_t	PLD_EX[PLD_EX_SIZE/2];
extern uint16_t	PLD_V1[PLD_V1_SIZE/2];
extern uint16_t PLD_V2[PLD_V2_SIZE/2];

#define PLC_BASE        (&PLD_EX[0])
#define PLC_EX_BASE     (&PLD_EX[0])
#define PMD_V1_BASE     (&PLD_V1[0])
#define PMD_V2_BASE     (&PLD_V2[0])

#define PLC_DMA_BASE	0
#define PLC_DMA_SIZE	0

#endif /* !FLIP_DEFS_H_INCLUDED */