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/* Cesar project {{{
 *
 * Copyright (C) 2008 Spidcom
 *
 * <<<Licence>>>
 *
 * }}} */
/**
 * \file    src/test_itc2.c
 * \brief   Test the secondary interrupt controller.
 * \ingroup hal_leon
 */
#include "common/std.h"

#include "hal/leon/itc2.h"

#include "lib/test.h"

#include <cyg/hal/drv_api.h>

/** Test context. */
struct itc2_test_t
{
    /** Interrupt handle. */
    cyg_handle_t interrupt_handle;
    /** Interrupt context. */
    cyg_interrupt interrupt_context;
    /** Event semaphore. */
    cyg_sem_t sem;
    /** Number of interrupt run. */
    uint count;
    /** Acknowledge all pending at once. */
    bool ack_all;
    /** Acknowledged IT. */
    u32 acked;
    /** First occurring interrupt. */
    int first;
};
typedef struct itc2_test_t itc2_test_t;

static cyg_uint32
itc2_test_isr (cyg_vector_t vector, cyg_addrword_t data)
{
    itc2_test_t *ctx = (itc2_test_t *) data;
    dbg_assert (vector == LEON_ITC2_LOW_PRIORITY_ITC1_IT);
    if (ctx->ack_all)
    {
        u32 to_ack = LEON_ITC2_PENDING & LEON_ITC2_MASK;
        LEON_ITC2_CLEAR = to_ack;
        ctx->acked |= to_ack;
    }
    else
    {
        u32 status = LEON_ITC2_STATUS;
        dbg_assert (status & BF_MASK (LEON_ITC2_STATUS__IP));
        uint it = BF_GET (LEON_ITC2_STATUS__IRL, status);
        LEON_ITC2_CLEAR = 1u << it;
        ctx->acked |= 1u << it;
        if (ctx->first == -1)
            ctx->first = it;
    }
    ctx->count++;
    return CYG_ISR_CALL_DSR;
}

static void
itc2_test_dsr (cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
{
    itc2_test_t *ctx = (itc2_test_t *) data;
    dbg_assert (vector == LEON_ITC2_LOW_PRIORITY_ITC1_IT);
    cyg_semaphore_post (&ctx->sem);
}

void
itc2_test_init (itc2_test_t *ctx)
{
    /* Init context. */
    cyg_semaphore_init (&ctx->sem, 0);
    ctx->count = 0;
    ctx->ack_all = false;
    ctx->acked = 0;
    ctx->first = -1;
    /* Init itc2. */
    leon_itc2_init ();
    /* Attach interrupt. */
    cyg_drv_interrupt_create (LEON_ITC2_LOW_PRIORITY_ITC1_IT,
                              0,
                              (cyg_addrword_t) ctx,
                              itc2_test_isr,
                              itc2_test_dsr,
                              &ctx->interrupt_handle,
                              &ctx->interrupt_context);
    cyg_drv_interrupt_attach (ctx->interrupt_handle);
    cyg_drv_interrupt_unmask (LEON_ITC2_LOW_PRIORITY_ITC1_IT);
}

void
itc2_test_uninit (itc2_test_t *ctx)
{
    leon_itc2_uninit ();
    /* Detach interrupt. */
    cyg_drv_interrupt_unmask (LEON_ITC2_LOW_PRIORITY_ITC1_IT);
    cyg_drv_interrupt_detach (ctx->interrupt_handle);
    cyg_drv_interrupt_delete (ctx->interrupt_handle);
    /* Uninit context. */
    cyg_semaphore_destroy (&ctx->sem);
}

void
itc2_test_suite (test_t t)
{
    itc2_test_t ctx_;
    itc2_test_t *ctx = &ctx_;
    test_suite_begin (t, "itc2");
    test_case_begin (t, "basic");
    itc2_test_init (ctx);
    test_begin (t, "seq")
    {
        ctx->count = 0;
        ctx->ack_all = false;
        ctx->acked = 0;
        ctx->first = -1;
        const u32 its = 1u << LEON_ITC2_IT__RESYS
            | 1u << LEON_ITC2_IT__PB_DMA_END;
        LEON_ITC2_MASK = its;
        LEON_ITC2_PENDING = its;
        while ((ctx->acked & its) != its)
            dbg_check (cyg_semaphore_wait (&ctx->sem));
        LEON_ITC2_MASK = 0;
        test_fail_unless (ctx->first == LEON_ITC2_IT__RESYS
                          && ctx->acked == its && ctx->count == 2);
    } test_end;
    test_begin (t, "para")
    {
        ctx->count = 0;
        ctx->ack_all = true;
        ctx->acked = 0;
        const u32 its = 1u << LEON_ITC2_IT__RESYS
            | 1u << LEON_ITC2_IT__PB_DMA_END;
        LEON_ITC2_MASK = its;
        LEON_ITC2_PENDING = its;
        dbg_check (cyg_semaphore_wait (&ctx->sem));
        LEON_ITC2_MASK = 0;
        test_fail_unless (ctx->acked == its && ctx->count == 1);
    } test_end;
    test_begin (t, "mask")
    {
        ctx->count = 0;
        ctx->ack_all = false;
        ctx->acked = 0;
        ctx->first = -1;
        const u32 its = 1u << LEON_ITC2_IT__RESYS
            | 1u << LEON_ITC2_IT__PB_DMA_END;
        const u32 ite = 1u << LEON_ITC2_IT__PB_DMA_END;
        LEON_ITC2_MASK = ite;
        LEON_ITC2_PENDING = its;
        dbg_check (cyg_semaphore_wait (&ctx->sem));
        LEON_ITC2_MASK = 0;
        test_fail_unless (ctx->first == LEON_ITC2_IT__PB_DMA_END
                          && ctx->acked == ite && ctx->count == 1);
    } test_end;
    itc2_test_uninit (ctx);
}

int
main (int argc, char **argv)
{
    test_t t;
    test_init (t, argc, argv);
    itc2_test_suite (t);
    test_result (t);
    return test_nb_failed (t) == 0 ? 0 : 1;
}