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/*
 *  include/asm/arch/platform.h
 *
 *  Copyright (C) 2012 MStar Semiconductor.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software Foundation,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
 */
#ifndef __ASM_ARCH_PLATFORM_H
#define __ASM_ARCH_PLATFORM_H

#include <asm/sizes.h>
#include <asm/arch/hardware.h>

#ifndef __ASSEMBLY__

#include <linux/types.h>

/** Physical address of the start of the memory dedicated to PLC. */
extern uint32_t spc300_plc_mem_start;
/** Size of the memory dedicated to PLC. */
extern uint32_t spc300_plc_mem_size;

#endif /* !__ASSEMBLY__ */

#ifdef CONFIG_CHIP_SPC300ARIZONA
#include <asm/arch/ips/arizona.h>
#endif

/*
 * Memory definitions
 */
#if defined (CONFIG_CHIP_SPC300ARIZONA)

#define SDRAM_BASE      0x40000000
#define SDRAM_SIZE      SZ_32M

#define PLCCODE_MAX_SIZE  SZ_16M /* 0xF0000000 - 0xEF000000  which is VIRT_IO_ADDR_BASE - VIRT_PLCCODE_BASE */
#define VIRT_PLCCODE_BASE (0xEF000000)

#define CLK_ARM         (33000000)
#define CLK_AHB         (CLK_ARM/1)
#define PCLK            (CLK_ARM/1)
#define TIMER_CLK       (PCLK/200)
#define UART_CLK        (PCLK)
#define PLC_SYSCLOCK_MHZ (PCLK/1000000)
#define PLC_UARTCLOCK_MHZ (PLC_SYSCLOCK_MHZ)

#elif defined (CONFIG_CHIP_SPC300)

#define SDRAM_BASE      0x40000000
#define SDRAM_SIZE      SZ_32M

#define PLCCODE_MAX_SIZE  SZ_16M /* 0xF0000000 - 0xEF000000  which is VIRT_IO_ADDR_BASE - VIRT_PLCCODE_BASE */
#define VIRT_PLCCODE_BASE (0xEF000000)

#define CLK_AHB         (147000000)
#define CLK_ARM         (CLK_AHB*2)
#define PCLK            (CLK_AHB/1)
#define TIMER_CLK       (3125000)
#define UART_CLK        (PCLK)
#define PLC_SYSCLOCK_MHZ (PCLK/1000000)
#define PLC_UARTCLOCK_MHZ (PLC_SYSCLOCK_MHZ)

#elif defined (CONFIG_CHIP_MSE500)

#define SDRAM_BASE      0x40000000

#define PLCCODE_MAX_SIZE  SZ_16M /* 0xF0000000 - 0xEF000000  which is VIRT_IO_ADDR_BASE - VIRT_PLCCODE_BASE */
#define VIRT_PLCCODE_BASE (0xEF000000)

#define CLK_AHB         (246000000)
#define CLK_ARM         (CLK_AHB*2)
#define PCLK            (CLK_AHB)
#define TIMER_CLK       (4000000)
#define UART_CLK        (PCLK)
#define PLC_SYSCLOCK_MHZ (CLK_AHB/1000000)
#define PLC_UARTCLOCK_MHZ (PLC_SYSCLOCK_MHZ)

#elif defined (CONFIG_CHIP_MSE500DINI_300)

#define SDRAM_BASE      0x40000000
#define SDRAM_SIZE      SZ_32M

#define PLCCODE_MAX_SIZE  SZ_16M /* 0xF0000000 - 0xEF000000  which is VIRT_IO_ADDR_BASE - VIRT_PLCCODE_BASE */
#define VIRT_PLCCODE_BASE (0xEF000000)

#define CLK_AHB         (147000000)
#define CLK_ARM         (CLK_AHB)
#define PCLK            (CLK_AHB/1)
#define TIMER_CLK       (3125000)
#define UART_CLK        (47000000)
#define PLC_SYSCLOCK_MHZ (150)
#define PLC_UARTCLOCK_MHZ (47)

#elif defined (CONFIG_CHIP_MSE500DINI_200) || defined (CONFIG_CHIP_MSE500_200)
/* polux/linux/asm/arch/platform.h uses polux/include/platform.h...
 * It is dirty, but make this clean would imply many changes and impact SPC200
 * specific code. So we keep it this way for MSE500. */
#include <platform.h>
#else

#error "No SPC300 chip defined !"

#endif

#endif  /* __ASM_ARCH_PLATFORM_H */