summaryrefslogtreecommitdiff
path: root/common/include/asm/arch/ips/wdt.h
blob: d3eb59bd573949d8e3a75b551240f2ffc51b4707 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
/*
 *  include/asm/arch/ips/wdt.h
 *
 *  Copyright (C) 2012 MStar Semiconductor.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software Foundation,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
 */
#ifndef __ASM_ARCH_IPS_WDT_H
#define __ASM_ARCH_IPS_WDT_H

#include <asm/arch/ips/ips_access.h>

#ifndef __ASSEMBLY__
/** Virtual Address for watchdog timer */
#define WDT_CR_VA                (*((volatile uint32_t *)(IO_ADDRESS(ARM_WDT_BASE) + WDTControlReg_Offset)))
#define WDT_TORR_VA              (*((volatile uint32_t *)(IO_ADDRESS(ARM_WDT_BASE) + WDTTimeoutRangeReg_Offset)))
#define WDT_CCVR_VA              (*((volatile uint32_t *)(IO_ADDRESS(ARM_WDT_BASE) + WDTCurrentCounterValueReg_Offset)))
#define WDT_CRR_VA               (*((volatile uint32_t *)(IO_ADDRESS(ARM_WDT_BASE) + WDTCounterResetReg_Offset)))
#define WDT_STAT_VA              (*((volatile uint32_t *)(IO_ADDRESS(ARM_WDT_BASE) + WDTStatReg_Offset)))
#define WDT_EOI_VA               (*((volatile uint32_t *)(IO_ADDRESS(ARM_WDT_BASE) + WDTEOIReg_Offset)))
#define WDT_VID_VA               (*((volatile uint32_t *)(IO_ADDRESS(ARM_WDT_BASE) + WDTVIDReg_Offset)))
#define WDT_COMP_PARAMS_5_VA     (*((volatile uint32_t *)(IO_ADDRESS(ARM_WDT_BASE) + WDTCOMP_PARAMS_5_Offset)))
#define WDT_COMP_PARAMS_4_VA     (*((volatile uint32_t *)(IO_ADDRESS(ARM_WDT_BASE) + WDTCOMP_PARAMS_4_Offset)))
#define WDT_COMP_PARAMS_3_VA     (*((volatile uint32_t *)(IO_ADDRESS(ARM_WDT_BASE) + WDTCOMP_PARAMS_3_Offset)))
#define WDT_COMP_PARAMS_2_VA     (*((volatile uint32_t *)(IO_ADDRESS(ARM_WDT_BASE) + WDTCOMP_PARAMS_2_Offset)))
#define WDT_COMP_PARAMS_1_VA     (*((volatile uint32_t *)(IO_ADDRESS(ARM_WDT_BASE) + WDTCOMP_PARAMS_1_Offset)))
#define WDT_COMP_VERSION_VA      (*((volatile uint32_t *)(IO_ADDRESS(ARM_WDT_BASE) + WDTCOMP_VERSION_Offset)))
#define WDT_COMP_TYPE_VA         (*((volatile uint32_t *)(IO_ADDRESS(ARM_WDT_BASE) + WDTCOMP_TYPE_Offset)))

#define WDT_CRR_PA               (*((volatile uint32_t *)(ARM_WDT_BASE + WDTCounterResetReg_Offset)))
#endif /* __ASSEMBLY__ */

// Bitfields in Control Register
#define WDT_EN_SHIFT            0
#define WDT_EN_SIZE             1
#define WDT_RMOD_SHIFT          1
#define WDT_RMOD_SIZE           1
#define WDT_RPL_SHIFT           2
#define WDT_RPL_SIZE            3

// Bitfields in Timeout Range Register
#define WDT_TOP_SHIFT           0
#define WDT_TOP_SIZE            4
#define WDT_TOP_INIT_SHIFT      4
#define WDT_TOP_INIT_SIZE       4

// Bitfields in Current Counter Register
#define WDT_CCV_SHIFT           0
#define WDT_CCV_SIZE           32

// Bitfields in Counter Restart Register
#define WDT_CR_SHIFT            0
#define WDT_CR_SIZE             8
#define WDT_CR_VAL           0x76

// Bitfields in Interrupt Status Register
#define WDT_IT_STAT_SHIFT       0
#define WDT_IT_STAT_SIZE        1

// Bitfields in Clear Interrupt Register
#define WDT_IT_CLEAR_SHIFT      0
#define WDT_IT_CLEAR_SIZE       1

// Bit manipulation macros
#define WDT_BIT(name) \
	(1 << WDT_##name##_SHIFT)
#define WDT_BF(name,value) \
	(((value) & ((1 << WDT_##name##_SIZE) - 1)) << WDT_##name##_SHIFT)
#define WDT_BFEXT(name,value) \
	(((value) >> WDT_##name##_SHIFT) & ((1 << WDT_##name##_SIZE) - 1))
#define WDT_BFINS(name,value,old) \
	( ((old) & ~(((1 << WDT_##name##_SIZE) - 1) << WDT_##name##_SHIFT)) \
	  | WDT_BF(name,value))

#define WDT_DEFAULT_TIME        5 //seconds
#define WDT_MAX_TIME           21 //seconds

#endif /* __ASM_ARCH_IPS_WDT_H */