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/*
 *  include/asm/arch/ips/hardware/bus_sys.h
 *
 *  Copyright (C) 2012 MStar Semiconductor.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software Foundation,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
 */
#ifndef __ASM_ARCH_IPS_HW_BUS_SYS_H
#define __ASM_ARCH_IPS_HW_BUS_SYS_H

#define SYS_APB_BASE	(0xc8000000)
#include "sys_apb.h"

#define SPI_BASE	(0xf0000000)
#include "spi.h"

#define SPI_BASE_DIR	(0x30000000)

#define ARM_APB_BASE	(0xc0000000)
#include "arm_apb.h"

#define GPDMA_BASE	(0xf8000000)
#include "gpdma.h"

#ifdef CONFIG_CHIP_FEATURE_PCM
#define PCM_BASE	(0xE8000000)
#include "pcm.h"
#endif

#define TCU_BASE	(0x20000000)

#if defined (CONFIG_CHIP_FEATURE_SDRAM_CTRL)
#define SDRAM_CTRL_BASE	(0xE0000000)
#include "sdram.h"
#endif

#if defined (CONFIG_CHIP_FEATURE_MIU_CTRL)
#define MIU_BASE    (0xC8050000)
#include "miu.h"
#endif

#define ETHERNET_CTRL_BASE (0xD0000000)
#include "ethernet_ctrl.h"

#define DSP_BASE (0xA0000000)
#include "dsp.h"

#define EXT_REG_BANK_BASE (0xEC000000)

#if defined (CONFIG_AFE_MSEAFE)
#define MSEAFE_OFFSET           (0x3800)
#define MSEAFE_BASE             (EXT_REG_BANK_BASE + MSEAFE_OFFSET)
#include "mseafe.h"
#endif

#if defined (CONFIG_CHIP_FEATURE_MSEPLL)
#define MSEPLL_SPLL_OFFSET      (0x400)
#define MSEPLL_PPLL_OFFSET      (0x600)
#define MSEPLL_SPLL_BASE        (EXT_REG_BANK_BASE + MSEPLL_SPLL_OFFSET)
#define MSEPLL_PPLL_BASE        (EXT_REG_BANK_BASE + MSEPLL_PPLL_OFFSET)
#include "msepll.h"
#endif

#if defined (CONFIG_CHIP_FEATURE_IOMUX)
#define IOMUX_OFFSET  (0x1C00)
#define IOMUX_BASE    (EXT_REG_BANK_BASE + IOMUX_OFFSET)
#include "iomux.h"
#endif

#ifdef CONFIG_CHIP_FEATURE_SRAM
#define SRAM_BASE (0x20000000)
#endif

#endif /* __ASM_ARCH_IPS_HW_BUS_SYS_H */