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/*
 *  include/asm/arch/ips/hardware/arm_uart1.h
 *
 *  Copyright (C) 2012 MStar Semiconductor.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software Foundation,
 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
 */
#ifndef __ASM_ARCH_IPS_HW_ARM_UART1_H
#define __ASM_ARCH_IPS_HW_ARM_UART1_H

#ifndef ARM_UART1_BASE
  #error "ARM_UART1_BASE macro needs to be defined before including file arm_uart1.h"
#endif

#define UARTReceiveBufferReg_Offset_1               0x00
#define UARTTransmitHoldingReg_Offset_1             0x00
#define UARTDivisorLatchLow_Offset_1                0x00
#define UARTInterruptEnableReg_Offset_1             0x04
#define UARTDivisorLatchHigh_Offset_1               0x04
#define UARTInterruptIdentificationReg_Offset_1     0x08
#define UARTFIFOControlReg_Offset_1                 0x08
#define UARTLineControlReg_Offset_1                 0x0C
#define UARTModemControlReg_Offset_1                0x10
#define UARTLineStatusReg_Offset_1                  0x14
#define UARTModemStatusReg_Offset_1                 0x18

#define UARTScratchpadReg_Offset_1                  0x1C

#define UARTShadowReceiveBufferRegLow_Offset_1      0x30

#define UARTShadowReceiveBufferRegHigh_Offset_1     0x6C

#define UARTShadowTransmitHoldingRegLow_Offset_1    0x30

#define UARTShadowTransmitHoldingRegHigh_Offset_1   0x6C

#define UARTFIFOAccessReg_Offset_1                  0x70

#define UARTTransmitFIFOReadReg_Offset_1            0x74

#define UARTReceiveFIFOWriteReg_Offset_1            0x78

#define UARTUARTStatusReg_Offset_1                  0x7C

#define UARTTransmitFIFOLevelReg_Offset_1           0x80

#define UARTReceiveFIFOLevelReg_Offset_1            0x84

#define UARTSoftwareResetReg_Offset_1               0x88

#define UARTShadowRequestToSendReg_Offset_1         0x8C

#define UARTShadowBreakControlReg_Offset_1          0x90

#define UARTShadowDMAModeReg_Offset_1               0x94

#define UARTShadowFIFOEnableReg_Offset_1            0x98

#define UARTShadowRCVRTriggerReg_Offset_1           0x9C

#define UARTShadowTXEmptyTriggerReg_Offset_1        0xA0

#define UARTHaltTXReg_Offset_1                      0xA4

#define UARTDMASAReg_Offset_1                       0xA8

#define UARTCIDReg_Offset_1                         0xF4

#define UARTCVReg_Offset_1                          0xF8

#define UARTPIDReg_Offset_1                         0xFC

#define UARTReceiveBufferReg_1             (ARM_UART1_BASE + UARTReceiveBufferReg_Offset_1            )
#define UARTTransmitHoldingReg_1           (ARM_UART1_BASE + UARTTransmitHoldingReg_Offset_1          )
#define UARTDivisorLatchLow_1              (ARM_UART1_BASE + UARTDivisorLatchLow_Offset_1             )
#define UARTInterruptEnableReg_1           (ARM_UART1_BASE + UARTInterruptEnableReg_Offset_1          )
#define UARTDivisorLatchHigh_1             (ARM_UART1_BASE + UARTDivisorLatchHigh_Offset_1            )
#define UARTInterruptIdentificationReg_1   (ARM_UART1_BASE + UARTInterruptIdentificationReg_Offset_1  )
#define UARTFIFOControlReg_1               (ARM_UART1_BASE + UARTFIFOControlReg_Offset_1              )
#define UARTLineControlReg_1               (ARM_UART1_BASE + UARTLineControlReg_Offset_1              )
#define UARTModemControlReg_1              (ARM_UART1_BASE + UARTModemControlReg_Offset_1             )
#define UARTLineStatusReg_1                (ARM_UART1_BASE + UARTLineStatusReg_Offset_1               )
#define UARTModemStatusReg_1               (ARM_UART1_BASE + UARTModemStatusReg_Offset_1              )
#define UARTScratchpadReg_1                (ARM_UART1_BASE + UARTScratchpadReg_Offset_1               )
#define UARTShadowReceiveBufferRegLow_1    (ARM_UART1_BASE + UARTShadowReceiveBufferRegLow_Offset_1   )
#define UARTShadowReceiveBufferRegHigh_1   (ARM_UART1_BASE + UARTShadowReceiveBufferRegHigh_Offset_1  )
#define UARTShadowTransmitHoldingRegLow_1  (ARM_UART1_BASE + UARTShadowTransmitHoldingRegLow_Offset_1 )
#define UARTShadowTransmitHoldingRegHigh_1 (ARM_UART1_BASE + UARTShadowTransmitHoldingRegHigh_Offset_1)
#define UARTFIFOAccessReg_1                (ARM_UART1_BASE + UARTFIFOAccessReg_Offset_1               )
#define UARTTransmitFIFOReadReg_1          (ARM_UART1_BASE + UARTTransmitFIFOReadReg_Offset_1         )
#define UARTReceiveFIFOWriteReg_1          (ARM_UART1_BASE + UARTReceiveFIFOWriteReg_Offset_1         )
#define UARTUARTStatusReg_1                (ARM_UART1_BASE + UARTUARTStatusReg_Offset_1               )
#define UARTTransmitFIFOLevelReg_1         (ARM_UART1_BASE + UARTTransmitFIFOLevelReg_Offset_1        )
#define UARTReceiveFIFOLevelReg_1          (ARM_UART1_BASE + UARTReceiveFIFOLevelReg_Offset_1         )
#define UARTSoftwareResetReg_1             (ARM_UART1_BASE + UARTSoftwareResetReg_Offset_1            )
#define UARTShadowRequestToSendReg_1       (ARM_UART1_BASE + UARTShadowRequestToSendReg_Offset_1      )
#define UARTShadowBreakControlReg_1        (ARM_UART1_BASE + UARTShadowBreakControlReg_Offset_1       )
#define UARTShadowDMAModeReg_1             (ARM_UART1_BASE + UARTShadowDMAModeReg_Offset_1            )
#define UARTShadowFIFOEnableReg_1          (ARM_UART1_BASE + UARTShadowFIFOEnableReg_Offset_1         )
#define UARTShadowRCVRTriggerReg_1         (ARM_UART1_BASE + UARTShadowRCVRTriggerReg_Offset_1        )
#define UARTShadowTXEmptyTriggerReg_1      (ARM_UART1_BASE + UARTShadowTXEmptyTriggerReg_Offset_1     )
#define UARTHaltTXReg_1                    (ARM_UART1_BASE + UARTHaltTXReg_Offset_1                   )
#define UARTDMASAReg_1                     (ARM_UART1_BASE + UARTDMASAReg_Offset_1                    )
#define UARTCIDReg_1                       (ARM_UART1_BASE + UARTCIDReg_Offset_1                      )
#define UARTCVReg_1                        (ARM_UART1_BASE + UARTCVReg_Offset_1                       )
#define UARTPIDReg_1                       (ARM_UART1_BASE + UARTPIDReg_Offset_1                      )

#define UART_RBR_1             	       (ARM_UART1_BASE + UARTReceiveBufferReg_Offset_1            )
#define UART_THR_1           	       (ARM_UART1_BASE + UARTTransmitHoldingReg_Offset_1          )
#define UART_DLL_1                     (ARM_UART1_BASE + UARTDivisorLatchLow_Offset_1             )
#define UART_IER_1           	       (ARM_UART1_BASE + UARTInterruptEnableReg_Offset_1          )
#define UART_DLH_1             	       (ARM_UART1_BASE + UARTDivisorLatchHigh_Offset_1            )
#define UART_IIR_1   		       (ARM_UART1_BASE + UARTInterruptIdentificationReg_Offset_1  )
#define UART_FCR_1               	       (ARM_UART1_BASE + UARTFIFOControlReg_Offset_1              )
#define UART_LCR_1               	       (ARM_UART1_BASE + UARTLineControlReg_Offset_1              )
#define UART_MCR_1              	       (ARM_UART1_BASE + UARTModemControlReg_Offset_1             )
#define UART_LSR_1                	       (ARM_UART1_BASE + UARTLineStatusReg_Offset_1               )
#define UART_MSR_1               	       (ARM_UART1_BASE + UARTModemStatusReg_Offset_1              )
#define UART_SCR_1                	       (ARM_UART1_BASE + UARTScratchpadReg_Offset_1               )
#define UARTPING_1BIT_WR_1 (UART_LCR_1)
#define CC_UART_APB_DATA_WIDTH_1        32
#define CC_UART_MAX_APB_DATA_WIDTH_1    32
#define CC_UART_FIFO_MODE_1             16
#define CC_UART_MEM_SELECT_1            1
#define CC_UART_MEM_MODE_1              0
#define CC_UART_CLOCK_MODE_1            1
#define CC_UART_AFCE_MODE_1             1
#define CC_UART_THRE_MODE_1             1
#define CC_UART_SIR_MODE_1              0
#define CC_UART_CLK_GATE_EN_1           1
#define CC_UART_FIFO_ACCESS_1           1
#define CC_UART_DMA_EXTRA_1             0
#define CC_UART_DMA_POL_1               1
#define CC_UART_SIR_LP_MODE_1           0
#define CC_UART_DEBUG_1                 0
#define CC_UART_BAUD_CLK_1              0
#define CC_UART_ADDITIONAL_FEATURES_1   1
#define CC_UART_FIFO_STAT_1             1
#define CC_UART_SHADOW_1                1
#define CC_UART_ADD_ENCODED_PARAMS_1    0
#define CC_UART_LATCH_MODE_1            0
#define CC_UART_ADDR_SLICE_LHS_1        8
#define CC_UART_COMP_VERSION_1          0x3330362a

#endif /* __ASM_ARCH_IPS_HW_ARM_UART1_H */