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path: root/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/arm_uart2.h
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/*
 * include/asm-arm/arch-spc300/arm_uart2.h
 *
 * Copyright (C) 2009 SPiDCOM Technologies
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __ASM_ARCH_ARM_UART2_H
#define __ASM_ARCH_ARM_UART2_H

#ifndef ARM_UART2_BASE
  #error "ARM_UART2_BASE macro needs to be defined before including file arm_uart2.h"
#endif

#define UARTReceiveBufferReg_Offset_2               0x00
#define UARTTransmitHoldingReg_Offset_2             0x00
#define UARTDivisorLatchLow_Offset_2                0x00
#define UARTInterruptEnableReg_Offset_2             0x04
#define UARTDivisorLatchHigh_Offset_2               0x04
#define UARTInterruptIdentificationReg_Offset_2     0x08
#define UARTFIFOControlReg_Offset_2                 0x08
#define UARTLineControlReg_Offset_2                 0x0C
#define UARTModemControlReg_Offset_2                0x10
#define UARTLineStatusReg_Offset_2                  0x14
#define UARTModemStatusReg_Offset_2                 0x18

#define UARTScratchpadReg_Offset_2                  0x1C

#define UARTShadowReceiveBufferRegLow_Offset_2      0x30

#define UARTShadowReceiveBufferRegHigh_Offset_2     0x6C

#define UARTShadowTransmitHoldingRegLow_Offset_2    0x30

#define UARTShadowTransmitHoldingRegHigh_Offset_2   0x6C

#define UARTFIFOAccessReg_Offset_2                  0x70

#define UARTTransmitFIFOReadReg_Offset_2            0x74

#define UARTReceiveFIFOWriteReg_Offset_2            0x78

#define UARTUARTStatusReg_Offset_2                  0x7C

#define UARTTransmitFIFOLevelReg_Offset_2           0x80

#define UARTReceiveFIFOLevelReg_Offset_2            0x84

#define UARTSoftwareResetReg_Offset_2               0x88

#define UARTShadowRequestToSendReg_Offset_2         0x8C

#define UARTShadowBreakControlReg_Offset_2          0x90

#define UARTShadowDMAModeReg_Offset_2               0x94

#define UARTShadowFIFOEnableReg_Offset_2            0x98

#define UARTShadowRCVRTriggerReg_Offset_2           0x9C

#define UARTShadowTXEmptyTriggerReg_Offset_2        0xA0

#define UARTHaltTXReg_Offset_2                      0xA4

#define UARTDMASAReg_Offset_2                       0xA8

#define UARTCIDReg_Offset_2                         0xF4

#define UARTCVReg_Offset_2                          0xF8

#define UARTPIDReg_Offset_2                         0xFC

#define UARTReceiveBufferReg_2             (ARM_UART2_BASE + UARTReceiveBufferReg_Offset_2            )
#define UARTTransmitHoldingReg_2           (ARM_UART2_BASE + UARTTransmitHoldingReg_Offset_2          )
#define UARTDivisorLatchLow_2              (ARM_UART2_BASE + UARTDivisorLatchLow_Offset_2             )
#define UARTInterruptEnableReg_2           (ARM_UART2_BASE + UARTInterruptEnableReg_Offset_2          )
#define UARTDivisorLatchHigh_2             (ARM_UART2_BASE + UARTDivisorLatchHigh_Offset_2            )
#define UARTInterruptIdentificationReg_2   (ARM_UART2_BASE + UARTInterruptIdentificationReg_Offset_2  )
#define UARTFIFOControlReg_2               (ARM_UART2_BASE + UARTFIFOControlReg_Offset_2              )
#define UARTLineControlReg_2               (ARM_UART2_BASE + UARTLineControlReg_Offset_2              )
#define UARTModemControlReg_2              (ARM_UART2_BASE + UARTModemControlReg_Offset_2             )
#define UARTLineStatusReg_2                (ARM_UART2_BASE + UARTLineStatusReg_Offset_2               )
#define UARTModemStatusReg_2               (ARM_UART2_BASE + UARTModemStatusReg_Offset_2              )
#define UARTScratchpadReg_2                (ARM_UART2_BASE + UARTScratchpadReg_Offset_2               )
#define UARTShadowReceiveBufferRegLow_2    (ARM_UART2_BASE + UARTShadowReceiveBufferRegLow_Offset_2   )
#define UARTShadowReceiveBufferRegHigh_2   (ARM_UART2_BASE + UARTShadowReceiveBufferRegHigh_Offset_2  )
#define UARTShadowTransmitHoldingRegLow_2  (ARM_UART2_BASE + UARTShadowTransmitHoldingRegLow_Offset_2 )
#define UARTShadowTransmitHoldingRegHigh_2 (ARM_UART2_BASE + UARTShadowTransmitHoldingRegHigh_Offset_2)
#define UARTFIFOAccessReg_2                (ARM_UART2_BASE + UARTFIFOAccessReg_Offset_2               )
#define UARTTransmitFIFOReadReg_2          (ARM_UART2_BASE + UARTTransmitFIFOReadReg_Offset_2         )
#define UARTReceiveFIFOWriteReg_2          (ARM_UART2_BASE + UARTReceiveFIFOWriteReg_Offset_2         )
#define UARTUARTStatusReg_2                (ARM_UART2_BASE + UARTUARTStatusReg_Offset_2               )
#define UARTTransmitFIFOLevelReg_2         (ARM_UART2_BASE + UARTTransmitFIFOLevelReg_Offset_2        )
#define UARTReceiveFIFOLevelReg_2          (ARM_UART2_BASE + UARTReceiveFIFOLevelReg_Offset_2         )
#define UARTSoftwareResetReg_2             (ARM_UART2_BASE + UARTSoftwareResetReg_Offset_2            )
#define UARTShadowRequestToSendReg_2       (ARM_UART2_BASE + UARTShadowRequestToSendReg_Offset_2      )
#define UARTShadowBreakControlReg_2        (ARM_UART2_BASE + UARTShadowBreakControlReg_Offset_2       )
#define UARTShadowDMAModeReg_2             (ARM_UART2_BASE + UARTShadowDMAModeReg_Offset_2            )
#define UARTShadowFIFOEnableReg_2          (ARM_UART2_BASE + UARTShadowFIFOEnableReg_Offset_2         )
#define UARTShadowRCVRTriggerReg_2         (ARM_UART2_BASE + UARTShadowRCVRTriggerReg_Offset_2        )
#define UARTShadowTXEmptyTriggerReg_2      (ARM_UART2_BASE + UARTShadowTXEmptyTriggerReg_Offset_2     )
#define UARTHaltTXReg_2                    (ARM_UART2_BASE + UARTHaltTXReg_Offset_2                   )
#define UARTDMASAReg_2                     (ARM_UART2_BASE + UARTDMASAReg_Offset_2                    )
#define UARTCIDReg_2                       (ARM_UART2_BASE + UARTCIDReg_Offset_2                      )
#define UARTCVReg_2                        (ARM_UART2_BASE + UARTCVReg_Offset_2                       )
#define UARTPIDReg_2                       (ARM_UART2_BASE + UARTPIDReg_Offset_2                      )

#define UART_RBR_2                         (ARM_UART2_BASE + UARTReceiveBufferReg_Offset_2            )
#define UART_THR_2                         (ARM_UART2_BASE + UARTTransmitHoldingReg_Offset_2          )
#define UART_DLL_2                         (ARM_UART2_BASE + UARTDivisorLatchLow_Offset_2             )
#define UART_IER_2                         (ARM_UART2_BASE + UARTInterruptEnableReg_Offset_2          )
#define UART_DLH_2                         (ARM_UART2_BASE + UARTDivisorLatchHigh_Offset_2            )
#define UART_IIR_2                         (ARM_UART2_BASE + UARTInterruptIdentificationReg_Offset_2  )
#define UART_FCR_2                         (ARM_UART2_BASE + UARTFIFOControlReg_Offset_2              )
#define UART_LCR_2                         (ARM_UART2_BASE + UARTLineControlReg_Offset_2              )
#define UART_MCR_2                         (ARM_UART2_BASE + UARTModemControlReg_Offset_2             )
#define UART_LSR_2                         (ARM_UART2_BASE + UARTLineStatusReg_Offset_2               )
#define UART_MSR_2                         (ARM_UART2_BASE + UARTModemStatusReg_Offset_2              )
#define UART_SCR_2                         (ARM_UART2_BASE + UARTScratchpadReg_Offset_2               )
#define UARTPING_1BIT_WR_2                 (UART_LCR_2)
#define CC_UART_APB_DATA_WIDTH_2        32
#define CC_UART_MAX_APB_DATA_WIDTH_2    32
#define CC_UART_FIFO_MODE_2             16
#define CC_UART_MEM_SELECT_2            1
#define CC_UART_MEM_MODE_2              0
#define CC_UART_CLOCK_MODE_2            1
#define CC_UART_AFCE_MODE_2             1
#define CC_UART_THRE_MODE_2             1
#define CC_UART_SIR_MODE_2              0
#define CC_UART_CLK_GATE_EN_2           1
#define CC_UART_FIFO_ACCESS_2           1
#define CC_UART_DMA_EXTRA_2             0
#define CC_UART_DMA_POL_2               1
#define CC_UART_SIR_LP_MODE_2           0
#define CC_UART_DEBUG_2                 0
#define CC_UART_BAUD_CLK_2              0
#define CC_UART_ADDITIONAL_FEATURES_2   1
#define CC_UART_FIFO_STAT_2             1
#define CC_UART_SHADOW_2                1
#define CC_UART_ADD_ENCODED_PARAMS_2    0
#define CC_UART_LATCH_MODE_2            0
#define CC_UART_ADDR_SLICE_LHS_2        8
#define CC_UART_COMP_VERSION_2          0x3330362a

#endif /* __ASM_ARCH_ARM_UART2_H */