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/*
 * cpu/spc300/miu.S
 *
 * Copyright (C) 2012 SPiDCOM Technologies
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <config.h>
#include <asm/arch/hardware.h>
#include <asm/arch/nvram.h>

/* Skip file if not using MIU controller. */
#ifdef CONFIG_CHIP_FEATURE_MIU_CTRL

#include "nvram_dyn_cfg.S"

    .file       "miu.S"

    .text
    .arm                        @ This is ARM code; performs the same action as .code 32
    .align      2               @ Align to word boundary; "2" means the number of bits that must be zero
    .globl      sdram_init
    .type       sdram_init, %function


sdram_init:
    /* Load MIU config from NVRAM. */
    read_dyn_cfg r10, MIU_BASE, NVRAM_MIU_CONFIG_OFFSET, \
                 r0, r1, r2, r3, r4, r5, r6

    /* Back to my caller. */
    mov pc, lr

#endif /* CONFIG_CHIP_FEATURE_MIU_CTRL */