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/* Cleopatre project {{{
 *
 * Copyright (C) 2008 Spidcom
 *
 * <<<Licence>>>
 *
 * }}} */
/**
 * \file    hal.c
 * \brief   HAL Layer.
 * \ingroup Cleopatre - PlcDrv
 *
 * this layer provide all Hardware Abstraction:
 * registers, interrupts.
 */

#ifndef __UTESTS__
# include <linux/delay.h>
#else
# include <linux/delay.h>
# include <linux/bitops.h>
# include <linux/kernel.h>
#endif
#include "mailbox.h"
#include "hal.h"
#include "registers.h"
#include "common.h"

/** Define Debug/Trace Level */
#define TRACE(...)      if(test_bit(TRACE_HAL, (const volatile unsigned long*)&trace)) printk(KERN_INFO "SPC300: HAL : " __VA_ARGS__)

/** Time Out for leon start */
#define TOUT_LEON_START         2000 //in ms
/** Step Time Out for leon start */
#define TOUT_LEON_START_STEP    20   //in ms

/** Our global context */
static struct halctx glbctx;

/**
 * Initialize the hal layer.
 *
 * \param  init  user information.
 * \return  hal context.
 */
struct halctx* halmbx_init(struct init_info *info)
{
    uint32_t timeout=0;

    //Check arguments
    if(info == NULL)
        return NULL;

    //Initialise context structure
    memset (&glbctx, '\0', sizeof(glbctx));
    glbctx.A2L_ptr = (volatile uint32_t*)info->ring_base_addr;
    glbctx.L2A_ptr = (volatile uint32_t*)(info->ring_base_addr+A2L_RING_SIZE);
    glbctx.A2L_head = (volatile uint32_t*)(info->mbx_reg_base_addr+MBX_A2L_HEAD_OFFSET);
    glbctx.A2L_tail = (volatile uint32_t*)(info->mbx_reg_base_addr+MBX_A2L_TAIL_OFFSET);
    glbctx.L2A_head = (volatile uint32_t*)(info->mbx_reg_base_addr+MBX_L2A_HEAD_OFFSET);
    glbctx.L2A_tail = (volatile uint32_t*)(info->mbx_reg_base_addr+MBX_L2A_TAIL_OFFSET);
    glbctx.A2L_it = (volatile uint32_t*)(info->mbx_reg_base_addr+MBX_A2L_IT_OFFSET);
    glbctx.L2A_it = (volatile uint32_t*)(info->mbx_reg_base_addr+MBX_L2A_IT_OFFSET);
    glbctx.L2A_it_mask = (volatile uint32_t*)(info->mbx_reg_base_addr+MBX_L2A_IT_MASK_OFFSET);

    //Initialise head and tail offset pointers for arm access
    *glbctx.A2L_tail = info->phys_ring_base_addr;
    *glbctx.L2A_head = (info->phys_ring_base_addr + A2L_RING_SIZE);

    //If we are here Leon code was already downloaded so,
    //we need to start the Leon processor.
    //it must be done after ARM head and tail pointers initialization
    //because LEON use it to set the rings base addresses
    if(!info->debug_mode && (info->launch_leon != NULL))
        (*info->launch_leon)();

    //Now the Leon is started we have to wait leon mailbox initialization
    //before continuing
    while((*glbctx.A2L_head != *glbctx.A2L_tail) &&
          (*glbctx.L2A_head != *glbctx.L2A_tail))
    {
        msleep_interruptible(TOUT_LEON_START_STEP);
        if(!info->debug_mode)
        {
            timeout += TOUT_LEON_START_STEP;
            if(timeout >= TOUT_LEON_START)
                return NULL;
        }
    }

    return &glbctx;
}// halmbx_init

/**
 * UnInitialize the hal layer.
 *
 * \param  ctx  hal context.
 * \return  error code.
 */
int halmbx_uninit(struct halctx *ctx)
{
    //Check arguments
    if(ctx == NULL)
        return -1;
    else
        return 0;
    //TODO:Stop Leon
}// hal_uninit

/**
 * Set the Arm to Leon Interrupt.
 *
 * \param  ctx  hal context.
 */
void set_A2Lt_interrupt(struct halctx *ctx)
{
    if(ctx == NULL)
        return;
    else
        *ctx->A2L_it |= A2L_IT;
}// set_A2Lt_interrupt

/**
 * Set the Arm to Leon acknowledge Interrupt.
 *
 * \param  ctx  hal context.
 */
void set_L2Aa_interrupt(struct halctx *ctx)
{
    if(ctx == NULL)
        return;
    else
        *ctx->A2L_it |= A2L_IT_ACK;
}// set_L2Aa_interrupt

/**
 * Clear the Leon to Arm Interrupt.
 *
 * \param  ctx  hal context.
 */
 void clr_L2At_interrupt(struct halctx *ctx)
{
    if(ctx == NULL)
        return;
    else
        *ctx->L2A_it = L2A_IT;
}// clr_L2At_interrupt

/**
 * Clear the Leon to Arm acknowledge Interrupt.
 *
 * \param  ctx  hal context.
 */
void clr_A2La_interrupt(struct halctx *ctx)
{
    if(ctx == NULL)
        return;
    else
        *ctx->L2A_it = L2A_IT_ACK;
}//clr_A2La_interrupt

/**
 * Clear the Leon to Arm watchdog Interrupt.
 *
 * \param  ctx  hal context.
 */
void clr_L2Awd_interrupt(struct halctx *ctx)
{
    if(ctx == NULL)
        return;
    else
        *ctx->L2A_it = L2A_IT_WD;
}//clr_L2Awd_interrupt

/**
 * Enable the Arm to Leon Acknowledge Interrupt.
 *
 * \param  ctx  hal context.
 */
void A2La_it_enable(struct halctx *ctx)
{
    if(ctx == NULL)
        return;
    else
        *ctx->L2A_it_mask &= ~L2A_IT_ACK;
}// A2La_it_enable

/**
 * Enable the Leon to Arm Trigger Interrupt.
 *
 * \param  ctx  hal context.
 */
void L2At_it_enable(struct halctx *ctx)
{
    if(ctx == NULL)
        return;
    else
        *ctx->L2A_it_mask &= ~L2A_IT;
}// L2At_it_enable

/**
 * Enable the Leon to Arm Watchdog Interrupt.
 *
 * \param  ctx  hal context.
 */
void L2Awd_it_enable(struct halctx *ctx)
{
    if(ctx == NULL)
        return;
    else
        *ctx->L2A_it_mask &= ~L2A_IT_WD;
}// L2Awd_it_enable

/**
 * Disable the Arm to Leon Acknowledge Interrupt.
 *
 * \param  ctx  hal context.
 */
void A2La_it_disable(struct halctx *ctx)
{
    if(ctx == NULL)
        return;
    else
        *ctx->L2A_it_mask |= L2A_IT_ACK;
}// A2La_it_disable

/**
 * Disable the Leon to Arm Trigger Interrupt.
 *
 * \param  ctx  hal context.
 */
void L2At_it_disable(struct halctx *ctx)
{
    if(ctx == NULL)
        return;
    else
        *ctx->L2A_it_mask |= L2A_IT;
}// L2At_it_disable

/**
 * Disable the Leon to Arm Watchdog Interrupt.
 *
 * \param  ctx  hal context.
 */
void L2Awd_it_disable(struct halctx *ctx)
{
    if(ctx == NULL)
        return;
    else
        *ctx->L2A_it_mask |= L2A_IT_WD;
}// L2Awd_it_disable

/**
 * Check if Leon to Arm mailbox queue is empty.
 *
 * \param  ctx  hal context.
 * \return  0 if the queue is empty.
 */
int halmbx_L2Amail_not_empty_queue(struct halctx *ctx)
{
    int result;

    //Check arguments
    if(ctx == NULL)
        return -1;

    result = (int)((*ctx->L2A_head - *ctx->L2A_tail) & L2A_RING_MASK);
    if(result > ctx->L2A_max_length)
        ctx->L2A_max_length = result;
    TRACE("Q empty:%x  ;  L2A_head=%x  ;  L2A_tail=%x\n", result, *ctx->L2A_head, *ctx->L2A_tail);
    return result;
}// halmbx_L2Amail_not_empty_queue

/**
 * Check Arm to Leon mailbox queue status.
 *
 * \param  ctx  hal context.
 * \return  queue state.
 */
int halmbx_A2Lmail_status_queue(struct halctx *ctx)
{
    uint32_t space;

    //Check arguments
    if(ctx == NULL)
        return -1;

    space = ((*ctx->A2L_head - *ctx->A2L_tail) & A2L_RING_MASK);

    TRACE("A2L_status=%x\n",space);

    if((space != 0) && (space <= MAX_MSG_SIZE))
        return FULL;
    else if ((space != 0) && (space <= (MAX_MSG_SIZE*2)))
        return NEARLY_FULL;
    else
        return NOT_FULL;
}// halmbx_A2Lmail_status_queue

/**
 * Check Leon to Arm mailbox queue status.
 *
 * \param  ctx  hal context.
 * \return  queue state.
 */
int halmbx_L2Amail_status_queue(struct halctx *ctx)
{
    uint32_t space;

    //Check arguments
    if(ctx == NULL)
        return -1;

    space = ((*ctx->L2A_head - *ctx->L2A_tail) & L2A_RING_MASK);

    TRACE("L2A_status=%x\n",space);

    if((space != 0) && (space <= MAX_MSG_SIZE))
        return FULL;
    else if ((space != 0) && (space <= (MAX_MSG_SIZE*2)))
        return NEARLY_FULL;
    else
        return NOT_FULL;
}// halmbx_L2Amail_status_queue

/**
 * Copy message to the ring buffer.
 *
 * \param  ctx  hal context.
 * \param  message  pointer to the message align on 32bits.
 * \param  size  message size in bytes and align on 32bits.
 * \return  error code.
 */
int halmbx_copy_to_ring(struct halctx *ctx, uint32_t *message, int size)
{
    int i;
    uint32_t tail;
    uint32_t *our_msg;

    //Check arguments
    if(ctx == NULL)
        return -1;

    //Check size range and alignment on 32bits
    if(size > MAX_MSG_SIZE || size == 0 || size & 0x3)
        return -1;
    //Check pointer and alignment on 32bits
    if(message == NULL || ((uint32_t)message & 0x3))
        return -1;
    else
        our_msg = message;

    //Check space in ring just to be sure
    if(halmbx_A2Lmail_status_queue(ctx) == FULL)
        return FULL;

    //Convert size for 32bits
    size = (size / sizeof(uint32_t));

    //Calculate offset and convert for 32bits
    tail = (*ctx->A2L_tail & A2L_RING_MASK);
    tail = (tail / sizeof(uint32_t));

    //Copy the message into the mailbox ring
    for(i=0 ; i<size ; i++)
    {
        *(ctx->A2L_ptr + tail) = *our_msg++;
        tail = ((tail+1) & (A2L_RING_MASK / sizeof(uint32_t)));
    }
    TRACE("Copy to ring= %x, %x\n",*(ctx->A2L_ptr+tail-2), *(ctx->A2L_ptr+tail-1));
    return 0;
}// halmbx_copy_to_ring

/**
 * Copy message from the ring buffer.
 *
 * \param  ctx  hal context.
 * \param  message  pointer to the message align on 32bits.
 * \param  size  max message size in bytes and align on 32bits.
 * \return  error code.
 */
int halmbx_copy_from_ring(struct halctx *ctx, uint32_t *message, int size)
{
    int i;
    uint32_t head;
    uint32_t *our_msg;

    //Check arguments
    if(ctx == NULL)
        return -1;

    //Check size range and alignment on 32bits
    if(size > MAX_MSG_SIZE || size == 0 || size & 0x3)
        return -1;
    //Check pointer and alignment on 32bits
    if(message == NULL || ((uint32_t)message & 0x3))
        return -1;
    else
        our_msg = message;

    //Align and convert size for 32bits
    size = (size / sizeof(uint32_t));

    //Calculate offset and convert for 32bits
    head = (*ctx->L2A_head  & L2A_RING_MASK);
    head = (head / sizeof(uint32_t));

    //Copy the message into the mailbox ring
    for(i=0 ; i<size ; i++)
    {
        *our_msg++ = *(ctx->L2A_ptr + head);
        head = ((head+1) & (L2A_RING_MASK / sizeof(uint32_t)));
    }
    TRACE("Copy from ring= %x, %x\n",*(ctx->L2A_ptr+head-2), *(ctx->L2A_ptr+head-1));
    return 0;
}// halmbx_copy_from_ring

/**
 * Update the ring management for Arm to Leon mailbox (TX).
 *
 * \param  ctx  hal context.
 * \param  size  real size in bytes of the last proceed message.
 * \return  error code.
 */
int halmbx_A2Lmail_update(struct halctx *ctx, int size)
{
    TRACE("halmbx_A2L_update\n");

    //Check arguments
    if(ctx == NULL)
        return -1;

    //Check size
    if(size == 0)
        return -1;

    //Update the TAIL pointer
    *ctx->A2L_tail = ((*ctx->A2L_tail + size) & A2L_RING_MASK) + (*ctx->A2L_tail & ~A2L_RING_MASK);

    //Start interrupt
    set_A2Lt_interrupt(ctx);

    return 0;
}// halmbx_A2Lmail_update

/**
 * Update the ring management for Leon to Arm mailbox (RX).
 *
 * \param  ctx  hal context.
 * \param  size  real size in bytes of the last proceed message.
 * \return  error code.
 */
int halmbx_L2Amail_update(struct halctx *ctx, int size)
{
    TRACE("halmbx_L2A_update\n");

    //Check arguments
    if(ctx == NULL)
        return -1;

    //Check size
    if(size == 0)
        return -1;

    //Update the TAIL pointer
    *ctx->L2A_head = ((*ctx->L2A_head + size) & L2A_RING_MASK) + (*ctx->L2A_head & ~L2A_RING_MASK);

    //Acknowledge the interrupt
    set_L2Aa_interrupt(ctx);

    return 0;
}// halmbx_L2Amail_update