summaryrefslogtreecommitdiff
path: root/cesar/hal/phy/src/vsr.S
blob: 9e32e7517c9a0406968be48c404c0891ec97ec8f (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
/* Cesar project {{{
 *
 * Copyright (C) 2008 Spidcom
 *
 * <<<Licence>>>
 *
 * }}} */
/**
 * \file    hal/phy/src/vsr.S
 * \brief   HAL Phy vector service routine.
 * \ingroup hal_phy
 */

#include <pkgconf/system.h>
#include <pkgconf/hal.h>

#include <pkgconf/hal_sparc.h>
#include CYGBLD_HAL_PLATFORM_H		// Platform config file

#ifdef CYGPKG_KERNEL
#  include <pkgconf/kernel.h>
#else
#  undef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
#  undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
#endif

#include <cyg/hal/arch.inc>

#include "hal/trace/trace_cpu.h"
#include "hal/leon/itc2.h"

#include <cyg/hal/vectors.h>

#define DELAYS_AFTER_WRPSR_SAME_WINDOW
#define DELAYS_AFTER_WRWIM


#if defined (CYGHWR_HAL_SPARC_FPU)
#  error "No support for FPU"
#endif

#if (__WINSIZE != 2) || !defined (CYGHWR_HAL_SPARC_FLAT)
#  error "Only support flat"
#endif

#ifndef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
#  error "Only support save minimum context"
#endif



! PHY interrupt stack & data.

        .section ".dlram_bss"

        .global phy_interrupt_data
phy_interrupt_data:
        .long 0
        .size phy_interrupt_data, . - phy_interrupt_data

        .balign 16
        .global phy_interrupt_stack_base
phy_interrupt_stack_base:
        .rept 3 * 1024
        .byte 0
        .endr
        .size phy_interrupt_stack_base, . - phy_interrupt_stack_base
        .global phy_interrupt_stack
phy_interrupt_stack:
        .long   0,0,0,0,0,0,0,0
        .size phy_interrupt_stack, . - phy_interrupt_stack



! PHY VSR.

        .section ".ilram"

        .global phy_vsr
phy_vsr:
	! here, locals have been set up as follows:
	! %l0 = psr (with this CWP/window-level in it)
	! %l1 = pc
	! %l2 = npc
	! %l3 = vector number (1-15 for interrupts)
	! and we are in our own register window, though it is likely that
	! the next one will need to be saved before we can use it:
	! ie. this one is the invalid register window.

        restore
	std	%l0, [%sp + 0 * 4]	! save L & I registers
	std	%l2, [%sp + 2 * 4]
	std	%l4, [%sp + 4 * 4]
	std	%l6, [%sp + 6 * 4]

	std	%i0, [%sp + 8 * 4]
	std	%i2, [%sp + 10 * 4]
	std	%i4, [%sp + 12 * 4]
	std	%i6, [%sp + 14 * 4]
        save

	! now save away the regs we must preserve
	sub	%fp, SAVE_REGS_SIZE, %sp
	std	%g0, [%sp + 16 * 4]	! save G registers
	std	%g2, [%sp + 18 * 4]	! (set %g0 place to 0 to flag special context)
	std	%g4, [%sp + 20 * 4]
	std	%g6, [%sp + 22 * 4]

	sub	%sp, 24 * 4, %sp	! fresh frame including
					! arg spill area for callees

	set	phy_interrupt_stack, %g1

        ! switch to the interrupt stack
	st	%sp, [ %g1 ]		! there is spare above stack
	sub	%g1, 24 * 4, %sp	! fresh frame including
					! arg spill area for callees

#if defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT)
	! Lock the scheduler
	.extern	SCHED_LOCK_MANGLED_NAME
	sethi	%hi(SCHED_LOCK_MANGLED_NAME), %l7
	ld	[ %l7 + %lo(SCHED_LOCK_MANGLED_NAME) ], %l6
	add	%l6, 1, %l6
	st	%l6, [ %l7 + %lo(SCHED_LOCK_MANGLED_NAME) ]
#endif

	! HELP_GDB_WITH_BACKTRACE
	mov	%i7, %l5		! preserve it in l5
	mov	%l1, %i7		! bogus return link here

	! and we must preserve the Y register (multiply/divide auxiliary)
	! over these calls; we will keep it in %l4 which is otherwise unused.
	rd	%y, %l4

#if	HAL_TRACE_CPU
	! Trace.
	! load bare->data_tail and bare->data_end
	sethi	%hi(hal_trace_cpu_bare_buffer), %o1
	ldd	[ %o1 + %lo(hal_trace_cpu_bare_buffer) ], %o2
	set	HAL_TRACE_CPU_PHY_ID, %o4
	sethi	%hi(HAL_TRACE_CPU_DATE_ADDR), %o5
	ld	[ %o5 + %lo(HAL_TRACE_CPU_DATE_ADDR) ], %o5	! load date
	std	%o4, [ %o2 ]		! store them
	set	0, %o4			! nothing
	sethi	%hi(LEON_ITC2_STATUS_HIGH_ADDR), %o5
	ld	[ %o5 + %lo(LEON_ITC2_STATUS_HIGH_ADDR) ], %o5
	and	%o5, 31, %o5		! interrupt level
	std	%o4, [ %o2 + 8 ]	! store them
	add	%o2, 16, %o2		! increment bare->data_tail
	cmp	%o2, %o3		! if same as bare->data_end
	be,a	1f
	 ! set to bare->data, thanks to 16 byte alignment
	 ld	[ %o1 + %lo(hal_trace_cpu_bare_buffer + 8) ], %o2
	! store modified bare->data_tail
1:	st	%o2, [ %o1 + %lo(hal_trace_cpu_bare_buffer) ]
#endif

	! now call the ISR and so on with the appropriate args:
	! ie.
	! isr_retcode = phy_isr (vector, phy_interrupt_data);

	mov	%l3, %o0
	sethi	%hi(phy_interrupt_data), %l7
	or	%l7, %lo(phy_interrupt_data), %l7
	ld	[ %l7 ], %o1

	call	phy_isr
	nop

#if	HAL_TRACE_CPU
	! Trace.
	! load bare->data_tail and bare->data_end
	sethi	%hi(hal_trace_cpu_bare_buffer), %o1
	ldd	[ %o1 + %lo(hal_trace_cpu_bare_buffer) ], %o2
	set	HAL_TRACE_CPU_PHY_EXIT_ID, %o4
	sethi	%hi(HAL_TRACE_CPU_DATE_ADDR), %o5
	ld	[ %o5 + %lo(HAL_TRACE_CPU_DATE_ADDR) ], %o5	! load date
	std	%o4, [ %o2 ]		! store them
	set	0, %o4			! nothing
	set	0, %o5			! nothing
	std	%o4, [ %o2 + 8 ]	! store them
	add	%o2, 16, %o2		! increment bare->data_tail
	cmp	%o2, %o3		! if same as bare->data_end
	be,a	1f
	 ! set to bare->data, thanks to 16 byte alignment
	 ld	[ %o1 + %lo(hal_trace_cpu_bare_buffer + 8) ], %o2
	! store modified bare->data_tail
1:	st	%o2, [ %o1 + %lo(hal_trace_cpu_bare_buffer) ]
#endif

	! switch to the thread stack
	set	phy_interrupt_stack - (24 * 4), %g1
	ld	[ %g1 + (24 * 4) ], %sp		! there is spare above stack

#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
	! We only need to call _interrupt_end() when there is a kernel
	! present to do any tidying up.

	! First restore the processor interrupt level to that interrupted
	! (otherwise a task-switch runs at the current PIL) on the assumption
	! that the ISR dealt with the interrupt source per se, so it is safe
	! to unmask it, effectively:
	or	%l0, 0x0e0, %l7		! original PSR and ET (+S,PS)
	wr	%l7, %psr		! and enable!
#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW
	nop
	nop
	nop
#endif

	! then call interrupt_end( isr_retcode, &intr_object, &regsave )
	! to unlock the scheduler and do any rescheduling that~s needed.
	! argument 0 (isr_retcode) is already in place in %o0
	sethi	%hi(hal_interrupt_objects), %l7
	or	%l7, %lo(hal_interrupt_objects), %l7
	sll	%l3, 2, %l3		! %l3 to a word offset
	ld	[ %l7 + %l3 ], %o1
	add	%sp, 24 * 4, %o2	! saved regset (maybe tiny)

	.extern interrupt_end
	call	interrupt_end
	nop

	! disable traps (using the saved psr is fastest way)
	wr	%l0, %psr	! restores flags, disables traps, and old PIL
#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW
	nop
	nop
	nop
#endif

#endif

	! restore the Y register having done our callouts to C
	wr	%l4, %y

	! HELP_GDB_WITH_BACKTRACE
	mov	%l5, %i7	! restore (unused) return link

	! and restore other saved regs
	! (see CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT)
	add	%sp, 24 * 4, %sp	! undo fresh frame

	ld	[%sp + 17 * 4], %g1	! restore G registers
	ldd	[%sp + 18 * 4], %g2
	ldd	[%sp + 20 * 4], %g4
	ldd	[%sp + 22 * 4], %g6

	restore				! Interruptee~s window
	ldd	[%sp + 0 * 4], %l0	! restore L & I registers
	ldd	[%sp + 2 * 4], %l2
	ldd	[%sp + 4 * 4], %l4
	ldd	[%sp + 6 * 4], %l6

	ldd	[%sp + 8 * 4], %i0
	ldd	[%sp + 10 * 4], %i2
	ldd	[%sp + 12 * 4], %i4
	ldd	[%sp + 14 * 4], %i6
	save				! Back to trap window

	! restore the condition codes, PSR and PIL and return from trap.
	wr	%l0, %psr	! restores flags, disables traps, and old PIL
#ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW
	nop
	nop
	nop
#endif
	jmpl	%l1,  %g0
	rett	%l2