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path: root/cesar/hal/phy/src/rx.c
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/* Cesar project {{{
 *
 * Copyright (C) 2008 Spidcom
 *
 * <<<Licence>>>
 *
 * }}} */
/**
 * \file    hal/phy/src/rx.c
 * \brief   HAL Phy RX functions.
 * \ingroup hal_phy
 */
#include "common/std.h"

#include "inc/context.h"
#include "inc/regs.h"

#include "hal/arch/arch.h"

void ARCH_ILRAM
phy_rx_param (phy_t *ctx, phy_fc_mode_t fc_mode)
{
    dbg_claim (ctx);
    dbg_claim (fc_mode < PHY_FC_MODE_NB);
    PHY_TRACE (RX_PARAM, fc_mode);
    PHY_DSPSS_RX_PARAM = BF_FILL (PHY_DSPSS_RX_PARAM, (FC_MODE, fc_mode))
        | PHY_DSPSS_RX_PARAM__DEFAULT;
    ctx->rx_fc_mode = fc_mode;
}

void ARCH_ILRAM
phy_rx_activate (phy_t *ctx, bool now, u32 date, bool flag)
{
    dbg_claim (ctx);
    /* Cancel previous programed action. */
    PHY_PRATIC_TIMER_3_CTRL = 0;
    PHY_PRATIC_TIMER_4_CTRL = 0;
    /* Program new action. */
    if (now)
    {
        PHY_TRACE (RX_ACTIVATE_NOW, phy_date (ctx), flag);
        if (flag)
            PHY_PRATIC_IMMEDIATE_ACTION = PHY_PRATIC_ACTION__SEARCH_PRE;
        else
            PHY_PRATIC_IMMEDIATE_ACTION = PHY_PRATIC_ACTION__STOP_MAFADESE;
    }
    else
    {
        PHY_TRACE (RX_ACTIVATE, date, flag);
        PHY_PRATIC_TIMER_4_DATE = date;
        if (flag)
        {
            PHY_PRATIC_TIMER_3_DATE = date - PHY_START_MAFADESE_DELAY_TCK;
            PHY_PRATIC_TIMER_3_CTRL =
                BF_SHIFT (PHY_PRATIC_TIMER_X_CTRL__ACTION,
                          PHY_PRATIC_ACTION__START_MAFADESE)
                | BF_MASK (PHY_PRATIC_TIMER_X_CTRL__VALID);
            PHY_PRATIC_TIMER_4_CTRL =
                BF_SHIFT (PHY_PRATIC_TIMER_X_CTRL__ACTION,
                          PHY_PRATIC_ACTION__SEARCH_PRE)
                | BF_MASK (PHY_PRATIC_TIMER_X_CTRL__VALID);
        }
        else
        {
            PHY_PRATIC_TIMER_4_CTRL =
                BF_SHIFT (PHY_PRATIC_TIMER_X_CTRL__ACTION,
                          PHY_PRATIC_ACTION__STOP_MAFADESE)
                | BF_MASK (PHY_PRATIC_TIMER_X_CTRL__VALID);
        }
    }
}

extern inline void
phy_rx_prepare_common (phy_t *ctx, bool short_ppdu, bool sound,
                       phy_mod_t mod, phy_fecrate_t fecrate,
                       phy_pb_size_t pb_size, phy_gil_t gil,
                       uint tonemap_index, uint symbol_nb)
{
    dbg_claim (ctx);
    dbg_claim (ctx->rx_fc_mode < PHY_FC_MODE_NB);
    dbg_claim (!sound || (sound && !short_ppdu));
    dbg_claim ((short_ppdu && symbol_nb == 0)
               || (!short_ppdu
                   && mod < PHY_MOD_NONE
                   && fecrate < PHY_FEC_RATE_NONE
                   && pb_size < PHY_PB_SIZE_NONE
                   && gil < PHY_GIL_NB
                   && BF_CHECK (PHY_DSPSS_RX_PARAM__TMBI, tonemap_index)
                   && BF_CHECK (PHY_DSPSS_RESYS_PARAM__LAST_SYMB_INDEX,
                                symbol_nb)));
    /* Set RX parameters. */
    if (short_ppdu)
    {
        PHY_DSPSS_RX_PARAM = BF_FILL (PHY_DSPSS_RX_PARAM,
                                      (FC_MODE, ctx->rx_fc_mode),
                                      (LONG_PPDU, 0))
            | PHY_DSPSS_RX_PARAM__DEFAULT;
    }
    else
    {
        PHY_DSPSS_RX_PARAM =
            BF_FILL (PHY_DSPSS_RX_PARAM,
                     (PB_SIZE, pb_size),
                     (PB_RATE, fecrate),
                     (PB_MOD, mod),
                     (FC_MODE, ctx->rx_fc_mode),
                     (LONG_PPDU, 1),
                     (TMBI, tonemap_index),
                     (SOUND_FRAME, sound ? 1 : 0),
                     (SOUND_ENABLE, sound ? 1 : 0))
            | PHY_DSPSS_RX_PARAM__DEFAULT;
    }
    /* Freeze RESYS to write offset table. */
    PHY_DSPSS_RESYS_PARAM = BF_FILL (PHY_DSPSS_RESYS_PARAM,
                                     (RESYS_ON, 1),
                                     (RESYS_FREEZE, 1));
    /* Write offset table for GIL. */
    (&PHY_BASE_ADDR_RESYS_OFFSET)[PHY_RESYS_GIL_OFFSET] =
        ctx->resys_gil_table[gil];
    /* Unlock RESYS. */
    PHY_DSPSS_RESYS_PARAM =
        BF_FILL (PHY_DSPSS_RESYS_PARAM,
                 (RESYS_ON, 1),
                 (RESYS_COND, 1),
                 (LAST_SYMB_INDEX,
                  ctx->fc_symbol_nb[ctx->rx_fc_mode] + symbol_nb));
}

void ARCH_ILRAM
phy_rx_prepare (phy_t *ctx, bool short_ppdu, phy_mod_t mod,
                phy_fecrate_t fecrate, phy_pb_size_t pb_size, phy_gil_t gil,
                uint tonemap_index, uint symbol_nb)
{
    dbg_claim (ctx);
    /* Prepare. */
    phy_rx_prepare_common (ctx, short_ppdu, false, mod, fecrate, pb_size, gil,
                           tonemap_index, symbol_nb);
    /* Trace when done. */
    PHY_TRACE (RX_PREPARE, phy_date (ctx), short_ppdu, mod, fecrate, pb_size,
               gil, tonemap_index, symbol_nb);
}

void ARCH_ILRAM
phy_rx_prepare_sound (phy_t *ctx, uint nb_pb, phy_mod_t mod,
                      phy_fecrate_t fecrate, phy_pb_size_t pb_size,
                      phy_gil_t gil, uint symbol_nb)
{
    dbg_claim (ctx);
    /* Prepare. */
    phy_tx_param_sound (ctx, ctx->rx_fc_mode, nb_pb, mod, fecrate, pb_size,
                        gil);
    phy_rx_prepare_common (ctx, false, true, mod, fecrate, pb_size, gil, 0,
                           symbol_nb);
    /* Need to start PBDMA. */
    ctx->pbdma_start_on_resys_it = true;
    /* Trace when done. */
    PHY_TRACE (RX_PREPARE_SOUND, phy_date (ctx), nb_pb, mod, fecrate, pb_size,
               gil, symbol_nb);
}

u32 ARCH_ILRAM
phy_rx_fc10 (phy_t *ctx)
{
    dbg_claim (ctx);
    u32 fc10 = PHY_DSPSS_RX_FC_10;
    if ((fc10 & PHY_DSPSS_RX_FC_10__OK_MASK) == PHY_DSPSS_RX_FC_10__OK_MASK)
    {
        return BF_GET (PHY_DSPSS_RX_FC_10__FC, PHY_DSPSS_RX_FC_10);
    }
    else
    {
        return (u32) -1;
    }
}

u32 ARCH_ILRAM
phy_rx_sysdate (phy_t *ctx)
{
    dbg_claim (ctx);
    return PHY_PRATIC_SYS_LAST_RECEIVED_FRAME_DATE
        - BF_GET (PHY_DSPSS_RESYS_DETECT_OFFSET__PREAMBLE,
                  PHY_DSPSS_RESYS_DETECT_OFFSET);
}