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#ifndef hal_phy_inc_bridgedma_h
#define hal_phy_inc_bridgedma_h
/* Cesar project {{{
 *
 * Copyright (C) 2007 Spidcom
 *
 * <<<Licence>>>
 *
 * }}} */
/**
 * \file    hal/phy/inc/bridgedma.h
 * \brief   Bridge DMA private header.
 * \ingroup hal_phy
 */
#include "hal/phy/bridgedma.h"
#include "hal/phy/inc/bridgedma_it_mgr.h"

#include "config/bridgedma/soft.h"

/** Bridge DMA control and configuration. */
struct phy_bridgedma_ctrl_t
{
    BITFIELDS_WORD(
    /** Host set start bit and Bridge DMA reset it when finished. */
    u32 start:1;,
    /** Ethernet buffer endianness : TBD if 0, little endian. */
    u32 eth_endian:1;,
    /** Segment endianness : TBD if 0, little endian. */
    u32 pb_endian:1;,
    u32 :1;,
    /** Hprot, see hardware specification. */
    u32 hprot:4;,
    u32 :24;)
};
typedef struct phy_bridgedma_ctrl_t phy_bridgedma_ctrl_t;

/** Bridge DMA context. */
struct phy_bridgedma_t
{
    /** User data passed to any callback. */
    void *user_data;
    /** Bridge DMA interrupt callback. */
    phy_bridgedma_cb_t bridgedma_cb;
    /** DSR callback. */
    phy_deferred_cb_t deferred_cb;
    /** Bridgedma last job. */
    phy_bridgedma_job_t *job_last;

    /** Interruption manager. */
    phy_bridgedma_it_mgr_t it_mgr;
};

#endif /* hal_phy_inc_bridgedma_h */