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path: root/cesar/hal/ipmbox/test/src/ipmbox.c
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/* Cesar project {{{
 *
 * Copyright (C) 2007 Spidcom
 *
 * <<<Licence>>>
 *
 * }}} */
/**
 * \file    hal/ipmbox/test/src/ipmbox.c
 * \brief   HAL HLE unit test to test the ipmbox mechanisms.
 * \ingroup hal_ipmbox
 *
 * This file will tests all ipmbox functions
 */
#include "common/std.h"

#include <stdlib.h>
#include <string.h>
#include <stdio.h>

#include "lib/test.h"
#include "lib/blk.h"

#include "hal/ipmbox/ipmbox.h"
#include "hal/ipmbox/inc/ipmbox.h"
#include "hal/ipmbox/inc/regs.h"

#include "common/ipmbox/protocol.h"

bool dsr_posted;
bool data_cb_called;
bool mbx_cb_called;
bool empty_buf_cb_called;

/* Shared memory size (in 32 bits words). */
#define SHARED_MEM_SIZE (IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_MBX \
                         + IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_DATA \
                         + IPMBOX_PROTOCOL_QUEUE_SIZE_L2A_EMPTY_BUF \
                         + IPMBOX_PROTOCOL_QUEUE_SIZE_L2A_MBX \
                         + IPMBOX_PROTOCOL_QUEUE_SIZE_L2A_DATA \
                         + IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_EMPTY_BUF \
                         + 8)

/* Shared memory offsets. */
#define SHMEM_PTR_ZONE 0
#define SHMEM_A2L_MBX_QUEUE_BASE (SHMEM_PTR_ZONE + 8)
#define SHMEM_L2A_MBX_QUEUE_BASE (SHMEM_A2L_MBX_QUEUE_BASE \
        + IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_MBX)
#define SHMEM_A2L_EMPTY_BUF_QUEUE_BASE (SHMEM_L2A_MBX_QUEUE_BASE \
        + IPMBOX_PROTOCOL_QUEUE_SIZE_L2A_MBX)
#define SHMEM_L2A_EMPTY_BUF_QUEUE_BASE (SHMEM_A2L_EMPTY_BUF_QUEUE_BASE \
        + IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_EMPTY_BUF)
#define SHMEM_A2L_DATA_QUEUE_BASE (SHMEM_L2A_EMPTY_BUF_QUEUE_BASE \
        + IPMBOX_PROTOCOL_QUEUE_SIZE_L2A_EMPTY_BUF)
#define SHMEM_L2A_DATA_QUEUE_BASE (SHMEM_A2L_DATA_QUEUE_BASE \
        + IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_DATA)

uint qsize [][IPMBOX_QUEUE_DIRECTION_NB] = {
    {IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_MBX, IPMBOX_PROTOCOL_QUEUE_SIZE_L2A_MBX},
     {IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_EMPTY_BUF,
         IPMBOX_PROTOCOL_QUEUE_SIZE_L2A_EMPTY_BUF},
     {IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_DATA,
         IPMBOX_PROTOCOL_QUEUE_SIZE_L2A_DATA}
    };

/* Fake hardware registers. */
ipmbox_registers_t regs;

/* Fake shared memory between LEON and ARM. */
u32 shared_mem[SHARED_MEM_SIZE];

/* Prototype declarations. */
void
ipmbox_rx_dsr (cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);

void
ipmbox_empty_buf_dsr (cyg_vector_t vector, cyg_ucount32 count,
                      cyg_addrword_t data);

/* Callbacks test stub. */
void
ipmbox_test_data_cb (void *user_data, u32 *first_msg, uint length)
{
    data_cb_called = true;
}

void
ipmbox_test_mbx_cb (void *user_data, u32 *first_msg, uint length)
{
    mbx_cb_called = true;
}

void
ipmbox_test_empty_buf_cb (void *user_data)
{
    empty_buf_cb_called = true;
}

ipmbox_t *
ipmbox_test_init (void)
{
    /* Init fake regs. */
    regs.a2l_tail = (u32) &shared_mem[SHMEM_A2L_DATA_QUEUE_BASE
                  + qsize[IPMBOX_QUEUE_DATA][IPMBOX_A2L] - 1];
    regs.a2l_head = (u32) INVALID_PTR;
    regs.l2a_head = (u32) &shared_mem[SHMEM_L2A_DATA_QUEUE_BASE];
    regs.l2a_tail = (u32) INVALID_PTR;
    regs.a2l_it = 0;
    regs.a2l_it_mask = 0;
    regs.l2a_it = 0;
    regs.l2a_it_mask = 0;
    /* Init pointer in the shared memory ptr zone. */
    u32 shmem_queue_base [] = {
        SHMEM_A2L_MBX_QUEUE_BASE,
        SHMEM_L2A_MBX_QUEUE_BASE,
        SHMEM_A2L_EMPTY_BUF_QUEUE_BASE,
        SHMEM_L2A_EMPTY_BUF_QUEUE_BASE,
    };
    ipmbox_queue_ptr_t *queue =
        (ipmbox_queue_ptr_t*) &shared_mem[SHMEM_PTR_ZONE];
    uint i;
    for (i = 0; i < COUNT (shmem_queue_base); i++)
    {
        queue->head = (u32) &shared_mem[shmem_queue_base[i]];
        queue->tail = (u32) INVALID_PTR;
        queue++;
    }
    /* Initialise init info zone inside DATA L2A. */
    ipmbox_protocol_init_t *init = (ipmbox_protocol_init_t*) regs.l2a_head;
    init->version = IPMBOX_PROTOCOL_VERSION;
    init->shared_mem = (ipmbox_queue_ptr_t*) shared_mem;
    uint j;
    for (i = 0; i < COUNT (qsize); i++)
        for (j = 0; j < COUNT (qsize[i]); j++)
            init->queue_size[i][j] = qsize[i][j];
    ipmbox_t *ctx = ipmbox_init ();
    /* Initialise callbacks. */
    ipmbox_register_rx_data_cb (ctx, INVALID_PTR, ipmbox_test_data_cb);
    ipmbox_register_rx_mbx_cb (ctx, INVALID_PTR, ipmbox_test_mbx_cb);
    ipmbox_register_empty_buf_cb (ctx, INVALID_PTR, ipmbox_test_empty_buf_cb);
    return ctx;
}

void
ipmbox_init_test_case (test_t t)
{
    ipmbox_t *ctx = ipmbox_test_init ();
    test_case_begin (t, "init/uninit/(de)activate");
    test_begin (t, "init")
    {
        test_fail_unless (ctx->regs == IPMBOX_REG_BASE_ADDR);
        /* Check mapping of queues' pointers. */
        test_fail_unless (ctx->queue[IPMBOX_QUEUE_DATA][IPMBOX_A2L].ptr
                          == (ipmbox_queue_ptr_t*) &ctx->regs->a2l_tail);
        test_fail_unless (ctx->queue[IPMBOX_QUEUE_DATA][IPMBOX_L2A].ptr
                          == (ipmbox_queue_ptr_t*) &ctx->regs->l2a_tail);
        test_fail_unless (
            ctx->queue[IPMBOX_QUEUE_MBX][IPMBOX_A2L].ptr
                == (ipmbox_queue_ptr_t*) &shared_mem[SHMEM_PTR_ZONE]);
        test_fail_unless (
            ctx->queue[IPMBOX_QUEUE_MBX][IPMBOX_L2A].ptr
                == (ipmbox_queue_ptr_t*) &shared_mem[SHMEM_PTR_ZONE + 2]);
        test_fail_unless (
            ctx->queue[IPMBOX_QUEUE_EMPTY_BUF][IPMBOX_A2L].ptr
                == (ipmbox_queue_ptr_t*) &shared_mem[SHMEM_PTR_ZONE + 4]);
        test_fail_unless (
            ctx->queue[IPMBOX_QUEUE_EMPTY_BUF][IPMBOX_L2A].ptr
                == (ipmbox_queue_ptr_t*) &shared_mem[SHMEM_PTR_ZONE + 6]);

        u32 shmem_queue_base [][IPMBOX_QUEUE_DIRECTION_NB] = {
            {SHMEM_A2L_MBX_QUEUE_BASE, SHMEM_L2A_MBX_QUEUE_BASE},
            {SHMEM_A2L_EMPTY_BUF_QUEUE_BASE, SHMEM_L2A_EMPTY_BUF_QUEUE_BASE},
            {SHMEM_A2L_DATA_QUEUE_BASE, SHMEM_L2A_DATA_QUEUE_BASE}
        };
        uint i, j;
        for (i = 0; i < COUNT (shmem_queue_base); i++)
        {
            for (j = 0; j < COUNT (shmem_queue_base[i]); j++)
            {
                test_fail_unless (ctx->queue[i][j].ptr->head
                                  == ctx->queue[i][j].ptr->tail);
                test_fail_unless (ctx->queue[i][j].base_ptr
                                  == &shared_mem[shmem_queue_base[i][j]]);
                test_fail_unless (ctx->queue[i][j].size == qsize[i][j]);
                test_fail_unless (ctx->queue[i][j].end_ptr
                                  == ctx->queue[i][j].base_ptr + qsize[i][j]);
            }
        }
        /* Check registers. */
        test_fail_unless (ctx->regs->a2l_it == 0);
        test_fail_unless (ctx->regs->l2a_it == 0);
        test_fail_unless (ctx->regs->a2l_it_mask
                          == (IPMBOX_A2L_IT | IPMBOX_A2L_IT_ACK));
        test_fail_unless (ctx->regs->l2a_it_mask == 0);
    }
    test_end;
    test_begin (t, "(de)activate")
    {
        ipmbox_activate (ctx, true);
        test_fail_unless (ctx->regs->a2l_it_mask == IPMBOX_A2L_IT_ACK);
        ipmbox_activate (ctx, false);
        test_fail_unless (ctx->regs->a2l_it_mask
                          == (IPMBOX_A2L_IT | IPMBOX_A2L_IT_ACK));
    }
    test_end;
    test_begin (t, "uninit")
    {
        ctx->regs->a2l_it_mask = 0;
        ipmbox_uninit (ctx);
        test_fail_unless (ctx->regs->a2l_it_mask
                          == (IPMBOX_A2L_IT | IPMBOX_A2L_IT_ACK));
    }
    test_end;
}

void
ipmbox_callback_register_test_case (test_t t)
{
    test_case_begin (t, "Register callbacks");
    test_begin (t, "all")
    {
        ipmbox_t *ctx = ipmbox_test_init ();
        ipmbox_register_rx_data_cb (ctx, INVALID_PTR, ipmbox_test_data_cb);
        ipmbox_register_rx_mbx_cb (ctx, INVALID_PTR, ipmbox_test_mbx_cb);
        ipmbox_register_empty_buf_cb (
            ctx, INVALID_PTR + 1, ipmbox_test_empty_buf_cb);
        test_fail_unless (ctx->rx_cb_data_user_data == INVALID_PTR);
        test_fail_unless (ctx->rx_cb_mbx_user_data == INVALID_PTR);
        test_fail_unless (ctx->rx_cb_data == ipmbox_test_data_cb);
        test_fail_unless (ctx->rx_cb_mbx == ipmbox_test_mbx_cb);
        test_fail_unless (ctx->empty_buf_cb_user_data == INVALID_PTR + 1);
        test_fail_unless (ctx->empty_buf_cb == ipmbox_test_empty_buf_cb);
        ipmbox_uninit (ctx);
    }
    test_end;
}

void
ipmbox_tx_test_case (test_t t)
{
    test_case_begin (t, "Tx to Arm");
    test_begin (t, "DATA/MBX/EMPTY_BUF")
    {
        ipmbox_t *ctx = ipmbox_test_init ();
        u32 msg[2];
        /* First call each tx function and check after each call the IT is
         * raised. */
        ctx->regs->l2a_it = 0;
        msg[0] = 0x42;
        msg[1] = 0x43;
        ipmbox_tx_data (ctx, msg, 2);
        test_fail_unless (ctx->regs->l2a_it == IPMBOX_L2A_IT);
        ctx->regs->l2a_it = 0;
        msg[0] = 0x44;
        msg[1] = 0x45;
        ipmbox_tx_mbx (ctx, msg, 2);
        test_fail_unless (ctx->regs->l2a_it == IPMBOX_L2A_IT);
        ctx->regs->l2a_it = 0;
        msg[0] = 0x46;
        msg[1] = 0x47;
        ipmbox_tx_empty_buf (ctx, msg, 2);
        test_fail_unless (ctx->regs->l2a_it == IPMBOX_L2A_IT);
        ctx->regs->l2a_it = 0;
        /* Check the message is stored in each queue. */
        test_fail_unless (shared_mem[SHMEM_L2A_DATA_QUEUE_BASE] == 0x42);
        test_fail_unless (shared_mem[SHMEM_L2A_DATA_QUEUE_BASE + 1] == 0x43);
        test_fail_unless (shared_mem[SHMEM_L2A_MBX_QUEUE_BASE] == 0x44);
        test_fail_unless (shared_mem[SHMEM_L2A_MBX_QUEUE_BASE + 1] == 0x45);
        test_fail_unless (shared_mem[SHMEM_L2A_EMPTY_BUF_QUEUE_BASE] == 0x46);
        test_fail_unless (shared_mem[SHMEM_L2A_EMPTY_BUF_QUEUE_BASE + 1] == 0x47);
        /* Test the assert. */
        dbg_fatal_try_begin
        {
            ipmbox_tx_data (
                ctx, msg, IPMBOX_PROTOCOL_QUEUE_SIZE_L2A_DATA + 1);
            test_fail_unless (false);
        }
        dbg_fatal_try_catch (const char *fatal_message)
        {
            test_verbose_print (fatal_message);
            test_fail_unless (true);
        }
        dbg_fatal_try_end;
        ipmbox_uninit (ctx);
    }
    test_end;
}

void
ipmbox_empty_buf_get_test_case (test_t t)
{
    ipmbox_t *ctx = ipmbox_test_init ();
    u32 buffs[10];
    ipmbox_queue_copy_to (&ctx->queue[IPMBOX_QUEUE_EMPTY_BUF][IPMBOX_A2L],
                          buffs, 10);
    ctx->regs->a2l_it = 0;
    test_case_begin (t, "Empty buf get");
    test_begin (t, "buffers available")
    {
        uint nb_got;
        nb_got = ipmbox_empty_buf_get (ctx, buffs, 5);
        test_fail_unless (ctx->regs->a2l_it == IPMBOX_A2L_IT_ACK);
        test_fail_unless (nb_got == 5);
        test_fail_unless (ctx->regs->a2l_it_mask & IPMBOX_A2L_IT_ACK);
    }
    test_end;
    test_begin (t, "not enough buffers")
    {
        uint nb_got;
        nb_got = ipmbox_empty_buf_get (ctx, buffs, 6);
        test_fail_unless (nb_got == 5);
        test_fail_unless ((ctx->regs->a2l_it_mask & IPMBOX_A2L_IT_ACK) == 0);
    }
    test_end;
    test_begin (t, "no buffers")
    {
        uint nb_got;
        ctx->regs->a2l_it_mask = IPMBOX_A2L_IT_ACK;
        nb_got = ipmbox_empty_buf_get (ctx, buffs, 6);
        test_fail_unless (nb_got == 0);
        test_fail_unless ((ctx->regs->a2l_it_mask & IPMBOX_A2L_IT_ACK) == 0);
    }
    test_end;
    test_begin (t, "just enough buffers")
    {
        uint nb_got;
        ipmbox_queue_copy_to (&ctx->queue[IPMBOX_QUEUE_EMPTY_BUF][IPMBOX_A2L],
                              buffs, 10);
        ctx->regs->a2l_it_mask = IPMBOX_A2L_IT_ACK;
        nb_got = ipmbox_empty_buf_get (ctx, buffs, 10);
        test_fail_unless (nb_got == 10);
        test_fail_unless ((ctx->regs->a2l_it_mask & IPMBOX_A2L_IT_ACK));
    }
    test_end;
    ipmbox_uninit (ctx);
}

void
ipmbox_rx_sync_test_case (test_t t)
{
    ipmbox_t *ctx = ipmbox_test_init ();
    test_case_begin (t, "RX sync");
    test_begin (t, "Nothing to do")
    {
        u32 *first_msg = NULL;
        uint nb_msg;
        /* IT not set. */
        ctx->regs->a2l_it = 0;
        nb_msg = ipmbox_rx_sync (ctx, (const u32**) &first_msg);
        test_fail_unless (!nb_msg);
        test_fail_unless (!first_msg);
        /* IT set. */
        ctx->regs->a2l_it = -1;
        nb_msg = ipmbox_rx_sync (ctx, (const u32**) &first_msg);
        test_fail_unless (ctx->regs->a2l_it == IPMBOX_A2L_IT);
        test_fail_unless (!nb_msg);
        test_fail_unless (!first_msg);
    }
    test_end;
    test_begin (t, "Messages to process")
    {
        ipmbox_queue_copy_to (&ctx->queue[IPMBOX_QUEUE_MBX][IPMBOX_A2L],
                              &shared_mem[SHMEM_A2L_EMPTY_BUF_QUEUE_BASE],
                              10);
        u32 *first_msg = NULL;
        uint nb_msg;
        ctx->regs->a2l_it = IPMBOX_A2L_IT;
        nb_msg = ipmbox_rx_sync (ctx, (const u32**) &first_msg);
        test_fail_unless (ctx->regs->a2l_it == IPMBOX_A2L_IT);
        test_fail_unless (nb_msg == 10);
        test_fail_unless (first_msg);
    }
    test_end;
    ipmbox_uninit (ctx);
}

void
ipmbox_rx_irq_test_case (test_t t)
{
    ipmbox_t *ctx = ipmbox_test_init ();
    test_case_begin (t, "RX IRQ");
    test_begin (t, "Really no work (data/mbx)")
    {
        data_cb_called = false;
        mbx_cb_called = false;
        dsr_posted = false;
        ctx->regs->l2a_it = 0;
        ctx->regs->a2l_it = 0;
        ctx->regs->a2l_it_mask = IPMBOX_A2L_IT;
        ipmbox_rx_dsr (0, 0, (cyg_addrword_t) ctx);
        test_fail_unless (!ctx->regs->l2a_it);
        test_fail_unless (!data_cb_called);
        test_fail_unless (!mbx_cb_called);
        test_fail_unless (!dsr_posted);
        test_fail_unless ((ctx->regs->a2l_it_mask & IPMBOX_A2L_IT) == 0);
    }
    test_end;
    test_begin (t, "Only MBX")
    {
        /* store some MBX messages. */
        ipmbox_queue_copy_to (&ctx->queue[IPMBOX_QUEUE_MBX][IPMBOX_A2L],
                              &shared_mem[SHMEM_A2L_EMPTY_BUF_QUEUE_BASE],
                              IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_MBX / 2);
        data_cb_called = false;
        mbx_cb_called = false;
        dsr_posted = false;
        ctx->regs->l2a_it = 0;
        ctx->regs->a2l_it = 0;
        ctx->regs->a2l_it_mask = IPMBOX_A2L_IT;
        ipmbox_rx_dsr (0, 0, (cyg_addrword_t) ctx);
        test_fail_unless (!ctx->regs->l2a_it);
        test_fail_unless (!data_cb_called);
        test_fail_unless (mbx_cb_called);
        test_fail_unless (!dsr_posted);
        test_fail_unless ((ctx->regs->a2l_it_mask & IPMBOX_A2L_IT) == 0);
    }
    test_end;
    test_begin (t, "DATA <= BUDGET")
    {
        /* store some DATA messages. */
        ipmbox_queue_copy_to (&ctx->queue[IPMBOX_QUEUE_DATA][IPMBOX_A2L],
                              &shared_mem[SHMEM_A2L_EMPTY_BUF_QUEUE_BASE],
                              IPMBOX_RX_DATA_BUDGET);
        data_cb_called = false;
        mbx_cb_called = false;
        dsr_posted = false;
        ctx->regs->l2a_it = 0;
        ctx->regs->a2l_it = 0;
        ctx->regs->a2l_it_mask = IPMBOX_A2L_IT;
        ipmbox_rx_dsr (0, 0, (cyg_addrword_t) ctx);
        test_fail_unless (ctx->regs->l2a_it == 0);
        test_fail_unless (data_cb_called);
        test_fail_unless (!mbx_cb_called);
        test_fail_unless (!dsr_posted);
        test_fail_unless ((ctx->regs->a2l_it_mask & IPMBOX_A2L_IT) == 0);
    }
    test_end;
    test_begin (t, "DATA > BUDGET")
    {
        /* store some DATA messages. */
        ipmbox_queue_copy_to (&ctx->queue[IPMBOX_QUEUE_DATA][IPMBOX_A2L],
                              &shared_mem[SHMEM_A2L_EMPTY_BUF_QUEUE_BASE],
                              IPMBOX_RX_DATA_BUDGET + 1);
        data_cb_called = false;
        mbx_cb_called = false;
        dsr_posted = false;
        ctx->regs->l2a_it = 0;
        ctx->regs->a2l_it = 0;
        ctx->regs->a2l_it_mask = IPMBOX_A2L_IT;
        ipmbox_rx_dsr (0, 0, (cyg_addrword_t) ctx);
        test_fail_unless (ctx->regs->l2a_it == 0);
        test_fail_unless (data_cb_called);
        test_fail_unless (!mbx_cb_called);
        test_fail_unless (dsr_posted);
        test_fail_unless ((ctx->regs->a2l_it_mask & IPMBOX_A2L_IT));
    }
    test_end;
    ipmbox_uninit (ctx);
}

void
ipmbox_empty_buf_irq_test_case (test_t t)
{
    test_case_begin (t, "Empty buf IRQ");
    test_begin (t, "Call the callback")
    {
        ipmbox_t *ctx = ipmbox_test_init ();
        empty_buf_cb_called = false;
        ipmbox_empty_buf_dsr (0, 0, (cyg_addrword_t) ctx);
        test_fail_unless (empty_buf_cb_called);
        ipmbox_uninit (ctx);
    }
    test_end;
}

void
ipmbox_test_suite (test_t t)
{
    test_suite_begin (t, "IPMBox");
    ipmbox_init_test_case (t);
    ipmbox_callback_register_test_case (t);
    ipmbox_tx_test_case (t);
    ipmbox_empty_buf_get_test_case (t);
    ipmbox_rx_sync_test_case (t);
    ipmbox_rx_irq_test_case (t);
    ipmbox_empty_buf_irq_test_case (t);
    test_case_begin (t, "memory");
    test_begin (t, "memory")
    {
        test_fail_unless (blk_check_memory ());
    } test_end;
}

int main (int argc, char **argv)
{
    test_t t;
    test_init (t, argc, argv);
    ipmbox_test_suite (t);
    test_result (t);
    return test_nb_failed (t) == 0 ? 0 : 1;
}