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path: root/cesar/hal/ipmbox/src/ipmbox.c
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/* Cesar project {{{
 *
 * Copyright (C) 2008 Spidcom
 *
 * <<<Licence>>>
 *
 * }}} */
/**
 * \file    hal/ipmbox/src/ipmbox.c
 * \brief   HAL mailbox layer.
 * \ingroup hal_ipmbox
 *
 * this layer provide all mechanisms to manage mailboxes.
 */
#include "common/std.h"

#include "common/ipmbox/protocol.h"

#include "hal/ipmbox/ipmbox.h"
#include "hal/ipmbox/inc/ipmbox.h"
#include "hal/ipmbox/inc/regs.h"
#include "hal/ipmbox/inc/ecos.h"
#include "hal/arch/arch.h"

/** RX message buffer size. It must be equal to the max of data budget
 *  or MBX queue size. */
#define IPMBOX_RX_MSG_BUFFER_SIZE \
    (IPMBOX_RX_DATA_BUDGET > IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_MBX \
    ? IPMBOX_RX_DATA_BUDGET : IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_MBX)

/** Global context variable. */
static ipmbox_t ipmbox_global;
/** Ipmbox RX buffer. */
static u32 rx_msgs[IPMBOX_RX_MSG_BUFFER_SIZE];

/**
 * Transmit a message to mailbox.
 * \param  ctx  ipmbox context
 * \param  queue  the queue to add the message to.
 * \param  first_msg  pointer to the first message header
 * \param  length  total length (in word) of messages to transmit
 */
PRIVATE inline void
ipmbox_tx (ipmbox_t *ctx, ipmbox_queue_t *queue, u32 *first_msg, uint length)
{
    /* Copy messages to the ring buffer and warn the ARM.
     * Lock DSR to prevent mailbox corruption. */
    arch_dsr_lock ();
    dbg_assert (ipmbox_queue_get_free_space (queue) >= length);
    ipmbox_queue_copy_to (queue, first_msg, length);
    ctx->regs->l2a_it = IPMBOX_L2A_IT;
    arch_dsr_unlock ();
}

void
ipmbox_tx_data (ipmbox_t *ctx, u32 *first_msg, uint length)
{
    ipmbox_tx (ctx, &ctx->queue[IPMBOX_QUEUE_DATA][IPMBOX_L2A],
               first_msg, length);
}

void
ipmbox_tx_empty_buf (ipmbox_t *ctx, u32 *first_msg, uint length)
{
    ipmbox_tx (ctx, &ctx->queue[IPMBOX_QUEUE_EMPTY_BUF][IPMBOX_L2A],
               first_msg, length);
}

void
ipmbox_tx_mbx (ipmbox_t *ctx, u32 *first_msg, uint length)
{
    ipmbox_tx (ctx, &ctx->queue[IPMBOX_QUEUE_MBX][IPMBOX_L2A],
               first_msg, length);
}

uint
ipmbox_empty_buf_get (ipmbox_t *ctx, u32 *msg_buf, uint nb)
{
    dbg_claim (ctx);
    dbg_claim (msg_buf);
    dbg_claim (nb);
    ipmbox_queue_t *queue = &ctx->queue[IPMBOX_QUEUE_EMPTY_BUF][IPMBOX_A2L];
    /* Lock DSR because threads can call this function. */
    arch_dsr_lock ();
    /* Clear interruption. */
    ctx->regs->a2l_it = IPMBOX_A2L_IT_ACK;
    uint size = ipmbox_queue_get_used_space (queue);
    /* We need to unmask the interruption to be aware of new buffers. */
    if (size < nb)
        ctx->regs->a2l_it_mask &= ~IPMBOX_A2L_IT_ACK;
    uint nb_elements = MIN (size, nb);
    if (size)
        ipmbox_queue_copy_from (queue, msg_buf, nb_elements);
    /* Unlock DSR. */
    arch_dsr_unlock ();
    return nb_elements;
}

/**
 * IPMBox receive ISR handler function for empty buffers.
 * \param  vector  interrupt vector number
 * \param  data  user interrupt arguments
 * \return  isr status and if DSR is needed
 */
cyg_uint32
ipmbox_empty_buf_isr (cyg_vector_t vector, cyg_addrword_t data)
{
    /* Get context. */
    ipmbox_t *ctx = (ipmbox_t *) data;
    dbg_claim (ctx);
    /* Block this interrupt from occurring until the DSR completes. */
    ctx->regs->a2l_it_mask = IPMBOX_A2L_IT_ACK;
    /* Acknowledge interrupt (because of shared child interrupt). */
    ipmbox_interrupt_acknowledge (IPMBOX_EMPTY_BUF_IT_NUM);
    /* Tell the kernel that chained interrupt processing is done and the DSR
     * needs to be executed next. */
    return (CYG_ISR_HANDLED | CYG_ISR_CALL_DSR);
}

/**
 * IPMBox receive DSR handler function.
 * \param  vector  interrupt vector number
 * \param  count  ?
 * \param  data  user interrupt arguments
 */
void
ipmbox_empty_buf_dsr (cyg_vector_t vector, cyg_ucount32 count,
                      cyg_addrword_t data)
{
    ipmbox_t *ctx = (ipmbox_t*) data;
    dbg_claim (ctx);
    /* Send all received messages to the upper layer. */
    ctx->empty_buf_cb (ctx->empty_buf_cb_user_data);
}

/**
 * IPMBox receive ISR handler function.
 * \param  vector  interrupt vector number
 * \param  data  user interrupt arguments
 * \return  isr status and if DSR is needed
 */
cyg_uint32
ipmbox_rx_isr (cyg_vector_t vector, cyg_addrword_t data)
{
    /* Get context. */
    ipmbox_t *ctx = (ipmbox_t *) data;
    dbg_claim (ctx);
    /* Block this interrupt from occurring until the DSR completes. */
    ctx->regs->a2l_it_mask |= IPMBOX_A2L_IT;
    /* Acknowledge interrupt (because of shared child interrupt). */
    ipmbox_interrupt_acknowledge (IPMBOX_RX_IT_NUM);
    /* Tell the kernel that chained interrupt processing is done and the DSR
     * needs to be executed next. */
    return (CYG_ISR_HANDLED | CYG_ISR_CALL_DSR);
}

/**
 * IPMBox receive DSR handler function.
 * \param  vector  interrupt vector number
 * \param  count  ?
 * \param  data  user interrupt arguments
 */
void
ipmbox_rx_dsr (cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
{
    ipmbox_t *ctx = (ipmbox_t*) data;
    uint budget_data = IPMBOX_RX_DATA_BUDGET;
    uint size;
    bool call_dsr = false;
    ipmbox_queue_t *queue_data = &ctx->queue[IPMBOX_QUEUE_DATA][IPMBOX_A2L];
    ipmbox_queue_t *queue_mbx = &ctx->queue[IPMBOX_QUEUE_MBX][IPMBOX_A2L];
    /* Check parameters. */
    dbg_claim (ctx->rx_cb_data);
    dbg_claim (ctx->rx_cb_mbx);
    /* Process DATA queue. */
    do
    {
        size = ipmbox_queue_get_used_space (queue_data);
        if (size)
        {
            /* Check and update budget_data. */
            if (budget_data == 0)
            {
                call_dsr = true;
                break;
            }
            if (size > budget_data)
                size = budget_data;
            budget_data -= size;
            /* Copy messages out of mailbox, because callback can not handle
             * circular buffers. */
            ipmbox_queue_copy_from (queue_data, rx_msgs, size);
            /* Send all received messages to the upper layer. */
            ctx->rx_cb_data (ctx->rx_cb_data_user_data, rx_msgs, size);
        }
    }
    while (size);

    /* Process MBX queue. */
    do
    {
        /* Clear interrupt. We can do this for the IT because before leaving
         * this function, the DATA queue size is checked. */
        ctx->regs->a2l_it = IPMBOX_A2L_IT;
        size = ipmbox_queue_get_used_space (queue_mbx);
        if (size)
        {
            /* Copy messages out of mailbox, because callback can not handle
             * circular buffers. */
            ipmbox_queue_copy_from (queue_mbx, rx_msgs, size);
            /* Send all received messages to the upper layer. */
            ctx->rx_cb_mbx (ctx->rx_cb_mbx_user_data, rx_msgs, size);
        }
    }
    while (size);

    /* Check DATA QUEUE used space to avoid IT enabling. */
    if (ipmbox_queue_get_used_space (queue_data))
        call_dsr = true;

    if (call_dsr)
        /* Ask to be executed again, do not activate interrupts. */
        cyg_interrupt_post_dsr (ctx->ecos.rx_it_handle);
    else
        /* Allow this interrupt to occur again. */
        ctx->regs->a2l_it_mask &= ~IPMBOX_A2L_IT;
}

uint
ipmbox_rx_sync (ipmbox_t *ctx, const u32 **first_msg)
{
    uint size;
    /* Only if interrupt set. */
    if (ctx->regs->a2l_it & IPMBOX_A2L_IT)
    {
        ipmbox_queue_t *queue = &ctx->queue[IPMBOX_QUEUE_MBX][IPMBOX_A2L];
        /* Clear interrupt. */
        ctx->regs->a2l_it = IPMBOX_A2L_IT;
        size = ipmbox_queue_get_used_space (queue);
        if (size)
        {
            /* Copy messages out of mailbox, because callback can not handle
             * circular buffers. */
            ipmbox_queue_copy_from (queue, rx_msgs, size);
            /* Return received messages. */
            *first_msg = rx_msgs;
            return size;
        }
    }
    /* Nothing. */
    return 0;
}

ipmbox_t *
ipmbox_init (void)
{
    ipmbox_t *ctx = &ipmbox_global;

    /* Map IPMBox registers. */
    ctx->regs = (ipmbox_registers_t *) IPMBOX_REG_BASE_ADDR;
    /* Map init_info structure. */
    ipmbox_protocol_init_t *init_info = (ipmbox_protocol_init_t *)
        ctx->regs->l2a_head;
    /* Check version number. */
    dbg_assert (init_info->version == IPMBOX_PROTOCOL_VERSION);
    /* Check queues' sizes. */
    dbg_assert (init_info->queue_size[IPMBOX_QUEUE_DATA][IPMBOX_A2L]
         == IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_DATA);
    dbg_assert (init_info->queue_size[IPMBOX_QUEUE_DATA][IPMBOX_L2A]
         == IPMBOX_PROTOCOL_QUEUE_SIZE_L2A_DATA);
    dbg_assert (init_info->queue_size[IPMBOX_QUEUE_EMPTY_BUF][IPMBOX_A2L]
         == IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_EMPTY_BUF);
    dbg_assert (init_info->queue_size[IPMBOX_QUEUE_EMPTY_BUF][IPMBOX_L2A]
         == IPMBOX_PROTOCOL_QUEUE_SIZE_L2A_EMPTY_BUF);
    dbg_assert (init_info->queue_size[IPMBOX_QUEUE_MBX][IPMBOX_A2L]
         == IPMBOX_PROTOCOL_QUEUE_SIZE_A2L_MBX);
    dbg_assert (init_info->queue_size[IPMBOX_QUEUE_MBX][IPMBOX_L2A]
         == IPMBOX_PROTOCOL_QUEUE_SIZE_L2A_MBX);
    /* Get shared memory base address. */
    volatile ipmbox_queue_ptr_t *shared_mem_ptr_zone = init_info->shared_mem;
    /* Initialize other queues. */
    uint i, j;
    for (i = IPMBOX_QUEUE_MBX; i < IPMBOX_QUEUE_TYPE_NB; i++)
    {
        for (j = IPMBOX_A2L; j < IPMBOX_QUEUE_DIRECTION_NB; j++)
        {
            ctx->queue[i][j].ptr = shared_mem_ptr_zone;
            shared_mem_ptr_zone++;
            ctx->queue[i][j].base_ptr = (u32*) ctx->queue[i][j].ptr->head;
            ctx->queue[i][j].size = init_info->queue_size[i][j];
            ctx->queue[i][j].end_ptr = ctx->queue[i][j].base_ptr
                + ctx->queue[i][j].size;
        }
    }
    /* Reset the tail pointers for DATA queue. */
    ctx->queue[IPMBOX_QUEUE_DATA][IPMBOX_A2L].ptr->head =
        ctx->queue[IPMBOX_QUEUE_DATA][IPMBOX_A2L].ptr->tail;
    ctx->queue[IPMBOX_QUEUE_DATA][IPMBOX_L2A].ptr->tail =
        ctx->queue[IPMBOX_QUEUE_DATA][IPMBOX_L2A].ptr->head;
    /* Reset others queues. */
    for (i = IPMBOX_QUEUE_MBX; i < IPMBOX_QUEUE_DATA; i++)
        for (j = IPMBOX_A2L; j < IPMBOX_QUEUE_DIRECTION_NB; j++)
            ctx->queue[i][j].ptr->tail = ctx->queue[i][j].ptr->head;
    /* Stop all mailbox interrupts. */
    ctx->regs->a2l_it_mask = (IPMBOX_A2L_IT | IPMBOX_A2L_IT_ACK);
    /* Create interrupt for Rx messages. */
    cyg_drv_interrupt_create (IPMBOX_RX_IT_NUM,
                              0,
                              (cyg_addrword_t) ctx,
                              &ipmbox_rx_isr,
                              &ipmbox_rx_dsr,
                              &ctx->ecos.rx_it_handle,
                              &ctx->ecos.rx_it);
    /* Attach this interrupt. */
    cyg_drv_interrupt_attach (ctx->ecos.rx_it_handle);
    /* Create interrupt for Empty buffers messages. */
    cyg_drv_interrupt_create (IPMBOX_EMPTY_BUF_IT_NUM,
                              0,
                              (cyg_addrword_t) ctx,
                              &ipmbox_empty_buf_isr,
                              &ipmbox_empty_buf_dsr,
                              &ctx->ecos.empty_buf_it_handle,
                              &ctx->ecos.empty_buf_it);
    /* Attach this interrupt. */
    cyg_drv_interrupt_attach (ctx->ecos.empty_buf_it_handle);
    /* Unmask. */
    cyg_drv_interrupt_unmask (IPMBOX_RX_IT_NUM);
    cyg_drv_interrupt_unmask (IPMBOX_EMPTY_BUF_IT_NUM);
    return ctx;
}

void
ipmbox_uninit (ipmbox_t *ctx)
{
    /* Stop all mailbox interrupts. */
    ctx->regs->a2l_it_mask = (IPMBOX_A2L_IT | IPMBOX_A2L_IT_ACK);
    /* Mask. */
    cyg_drv_interrupt_mask (IPMBOX_RX_IT_NUM);
}

void
ipmbox_activate (ipmbox_t *ctx, bool activation)
{
    dbg_assert (ctx);
    dbg_assert (ctx->rx_cb_mbx);
    dbg_assert (ctx->rx_cb_data);
    if (activation)
    {
        /* Enable the Arm to Leon Trigger Interrupt. */
        ctx->regs->a2l_it_mask &= ~IPMBOX_A2L_IT;
    }
    else
    {
        /* Disable the Arm to Leon Trigger and Ack Interrupt. */
        ctx->regs->a2l_it_mask |= (IPMBOX_A2L_IT | IPMBOX_A2L_IT_ACK);
    }
}

void
ipmbox_register_rx_data_cb (ipmbox_t *ctx, void *user_data,
                            ipmbox_rx_cb_t rx_cb_data)
{
    dbg_assert (ctx);
    dbg_assert (rx_cb_data);
    ctx->rx_cb_data = rx_cb_data;
    ctx->rx_cb_data_user_data = user_data;
}

void
ipmbox_register_rx_mbx_cb (ipmbox_t *ctx, void *user_data,
                           ipmbox_rx_cb_t rx_cb_mbx)
{
    dbg_assert (ctx);
    dbg_assert (rx_cb_mbx);
    ctx->rx_cb_mbx = rx_cb_mbx;
    ctx->rx_cb_mbx_user_data = user_data;
}

void
ipmbox_register_empty_buf_cb (ipmbox_t *ctx, void *user_data,
                              ipmbox_empty_buf_cb_t empty_buf_cb)
{
    dbg_assert (ctx);
    dbg_assert (empty_buf_cb);
    ctx->empty_buf_cb = empty_buf_cb;
    ctx->empty_buf_cb_user_data = user_data;
}