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----------------------------- Script file information -----------------------------
test vectors generated using:
SubWCRev: 'E:\projet\PLC\DSP_chain\DSP_350_test_vector_generation\Simu\BitLoading\testVectorGeneration.m'
Last committed at revision 18218
Updated to revision 18242
Local modifications found

--------------------------------- bitloading test ---------------------------------
test generated on = 13-Jun-2012  at 17:53
SNR = 10 dB
tonemap_initial_under_ber_Xdb_nsr_margin_X_XX_ber_margin generated for 0.76 coderate
final tonemap code rate is 0.76 
------------------------------- tonemap update test -------------------------------
fast and slow are in the same side --> lower carriers
fast and slow are in the same side --> lower carriers
both mean BER are under the inf limit --> boost carriers
fast and slow are in the same side --> lower carriers
fast and slow are in the same side --> lower carriers
fast and slow are in the same side --> lower carriers
fast and slow are in the same side --> lower carriers
fast and slow are in the same side --> lower carriers
fast and slow are in the same side --> lower carriers
fast and slow are in the same side --> lower carriers
both mean BER are under the inf limit --> boost carriers
both mean BER are under the inf limit --> boost carriers
both mean BER are under the inf limit --> boost carriers
both mean BER are under the inf limit --> boost carriers
both mean BER are under the inf limit --> boost carriers