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#ifndef ce_rx_bitloading_intervals_h
#define ce_rx_bitloading_intervals_h
/* Cesar project {{{
 *
 * Copyright (C) 2009 Spidcom
 *
 * <<<Licence>>>
 *
 * }}} */
/**
 * \file    ce/rx/bitloading/intervals.h
 * \brief   CE RX intervals.
 * \ingroup ce_rx_bl
 *
 * This module is responsible to manage tonemap intervals.
 * All intervals descriptions are located in tonemaps_t and we have a limited
 * number of TMI. We use a repeated set of TMI through the beacon period so
 * we only have to store in memory one set of intervals FSM. This permits not to
 * duplicate intervals in memory. An allocated interval FSM corresponds to a
 * bit-loading FSM.
 *
 * For example, if we have 3 repetition with 5 FSM (from 0 to 4),
 * the 3 * 5 = 15 intervals will look like this:
 * |0|1|2|3|4|0|1|2|3|4|0|1|2|3|4|
 * ----------
 *           \_ One repetition.
 *
 * In this example, 3 is the number of repetitions defined by
 * ce_rx_bl_intervals_repetition_count_ and 5 is the number of allocated
 * intervals defined by ce_rx_bl_intervals_fsm_count_.
 */

#include "ce/rx/bitloading/bitloading.h"
#include "mac/common/interval.h"
#include "mac/common/tonemap.h"

/*
 * This value initialize intervals FSM states.
 * This correspond to CE_RX_BL_FSM_STATE_INTERVAL_TRACKING value.
 * CE_RX_BL_FSM_STATE_INTERVAL_TRACKING is generated in CE/RX by dfagen in
 * an other file. In order not to include all CE in others modules, we
 * rewrite the value here and a test is made to insure this values is
 * not outdated.
 */
#define CE_RX_BL_FSM_STATE_INTERVAL_TRACKING_COPY 4

/**
 * Maximal number of FSM for intervals. Each stations is allowed to allocate
 * 7 tone maps including the default TMI. So we can have a maximum of 1 FSM
 * (for the default TMI) + 6 others for intervals.
 */
#define CE_RX_INTERVAL_MAX_FSM_COUNT (TONEMAP_MAX - 1)

/**
 * Structure which contains an array of bit-loading structure.
 * If bit-loading structure becomes too large and ce_rx_bitloading_intervals_t
 * size becomes over a BLK_SIZE then we should store bit-loading array in a
 * blk_table_t. In order to allocate and free this structure, you must
 * respectively use ce_rx_bl_intervals_alloc and ce_rx_bl_intervals_free.
 */
typedef struct ce_rx_bitloading_intervals_t
{
    /** FSM for each repeated intervals. We use pointers because we use a
     * blk_table and we prefer not to repeat blk_table_get. */
    ce_rx_bitloading_t *intervals[CE_RX_INTERVAL_MAX_FSM_COUNT];
    /** TMI of each intervals. */
    u8 tmi[CE_RX_INTERVAL_MAX_FSM_COUNT];
    /** BLK table where FSM are stored. Please use intervals field for
     * accessing FSMs. */
    blk_table_t *blk_table;
} ce_rx_bitloading_intervals_t;

/** Number of allocated FSM. */
extern u8 ce_rx_bl_intervals_fsm_count_;

/** Number of FSM repetition in the beacon period. */
extern u8 ce_rx_bl_intervals_repetition_count_;

BEGIN_DECLS

/**
 * Alloc and initialize intervals.
 * \return  pointer to a interval set.
 */
extern inline ce_rx_bitloading_intervals_t *
ce_rx_bl_intervals_alloc (ce_rx_bitloading_t *default_bl, u8 default_tmi)
{
    /* If the bit-loading structure grows too much in the future, we have to
     * adapt the interval storage. */
    dbg_assert (sizeof (ce_rx_bitloading_intervals_t) <= BLK_SIZE);

    /* Check we don't have too many intervals. */
    dbg_assert (ce_rx_bl_intervals_repetition_count_
                * ce_rx_bl_intervals_fsm_count_ <= TONEMAP_INTERVAL_NB);

    /* Check we don't have too many fsm. */
    dbg_assert (ce_rx_bl_intervals_fsm_count_ <= CE_RX_INTERVAL_MAX_FSM_COUNT);

    /* Allocate structure. */
    ce_rx_bitloading_intervals_t* its = blk_alloc ();
    its->blk_table = blk_table_init (sizeof (ce_rx_bitloading_t),
                                     ce_rx_bl_intervals_fsm_count_);

    int i;
    /* Initialize all bit-loading structures for each FSM. */
    for (i = 0; i < ce_rx_bl_intervals_fsm_count_; i++)
    {
        /* Set interval address. */
        its->intervals[i] = (ce_rx_bitloading_t *) blk_table_get
            (its->blk_table, i);
        /* Initialize an clean bit-loading. */
        ce_rx_bitloading_init (its->intervals[i]);
        /* Set interval's FSM to tracking. */
        its->intervals[i]->fsm = CE_RX_BL_FSM_STATE_INTERVAL_TRACKING_COPY;
        /* Set default TMI value. */
        its->tmi[i] = default_tmi;
        /* Initialize table of next restart dates. */
        int j;
        for (j = 0; j < CE_RX_BL_DATE_CRITERIA_NB; j++)
            its->intervals[i]->next_date_min_for_restart_rtc_date[j]
                = default_bl->next_date_min_for_restart_rtc_date[j];
    }
    for (; i < CE_RX_INTERVAL_MAX_FSM_COUNT; i++)
        its->intervals[i] = NULL;
    return its;
}

/**
 * Free an interval set.
 * \param  its  intervals structure address.
 */
extern inline void
ce_rx_bl_intervals_free (ce_rx_bitloading_intervals_t *its)
{
    dbg_assert_ptr (its);
    int i;
    /* Initialize all bit-loading structures for each FSM. */
    for (i = 0; i < CE_RX_INTERVAL_MAX_FSM_COUNT; i++)
    {
        /* Uninitialize bit-loading structures. */
        if (its->intervals[i])
        {
            ce_rx_bitloading_uninit (its->intervals[i]);
            its->intervals[i] = NULL;
        }
    }
    blk_table_free (its->blk_table);
    blk_release (its);
}

END_DECLS

#endif /* ce_rx_bitloading_intervals_h */