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2012-12-20cleo/u-boot/drv/netspcmac: reduce LINK_TIMEOUT from 5 sec to 2 sec, closes #3519Yacine Belkadi
Previous commits added the "wait for link up" step to IP175 PHY. They also changed when the link is considered to be up for that PHY. As a result, boards with that PHY will take longer (LINK_TIMEOUT additional seconds) to boot if no network cable is plugged in. LINK_TIMEOUT (the maximum time to wait for a link up) was set to 5 seconds, which seems a lot. Reduce LINK_TIMEOUT to 2 seconds, because it seems more reasonable, and it will reduce the impact of the changes brought by previous commits.
2012-12-20cleo/u-boot/drv/netspcmac: for IP175, wait for link up of one sub-PHYs, refs ↵Yacine Belkadi
#3519 The IP175 switch always says that it has a link up. This breaks the purpose of spcmac_phy_wait_link_up(). As a result the PHY may not be ready for the spidupdate phase, and the spidupdate packet may be missed. So, for the IP175 switch, consider there is a link up only if at least one of the sub-PHYs has a link up.
2012-12-20cleo/u-boot/drv/netspcmac: add is_link_up() to phy_device, refs #3519Yacine Belkadi
Add a is_link_up() to phy_device to prepare for the handling of PHY-specific link status.
2012-12-20cleo/u-boot/drv/netspcmac: wait for link up, in all cases, refs #3519Yacine Belkadi
Wait for link up, in all cases (especially for IP175), to ensure that everything is ready for the spidupdate part. Otherwise, it may happen that the spidupdate process is started (i.e. we listen for a spidupdate packet), but because the PHY is not ready, the spidupdate request is not seen.
2012-12-20cleo/u-boot/drv/netspcmac: move IP175 specific init code to its own functionYacine Belkadi
2012-12-20cleo/u-boot/drv/netspcmac: add init() to phy_deviceYacine Belkadi
Add init() to phy_device to prepare for the handling of PHY-specific init() code.
2012-12-20cleo/u-boot/drv/netspcmac: move VSC8601 reset code to its own functionYacine Belkadi
2012-12-20cleo/u-boot/drv/netspcmac: move IP175 reset code to its own functionYacine Belkadi
2012-12-20cleo/u-boot/drv/netspcmac: move IP1001 reset code to its own functionYacine Belkadi
2012-12-20cleo/u-boot/drv/netspcmac: add a reset() to phy_deviceYacine Belkadi
Add a reset() to phy_device to prepare for the handling of PHY-specific reset code.
2012-12-20cleo/u-boot/drv/netspcmac: rename wait_phy_link_up() to ↵Yacine Belkadi
spcmac_phy_wait_link_up() Rename wait_phy_link_up() to spcmac_phy_wait_link_up() to match other functions' names.
2012-12-20cleo/u-boot/drv/netspcmac: remove eth1_phy_addr and eth_phy_idYacine Belkadi
Remove the global variables eth1_phy_addr and eth_phy_id. Use the new phy_dev fields, instead.
2012-12-20cleo/u-boot/drv/netspcmac: add phy_device to represent PHY differencesYacine Belkadi
Add a struct phy_device to represent the specific PHY devices and to contain their specific code.
2012-12-20cleo/u-boot/drv/netspcmac: some reformatingYacine Belkadi
2012-12-18cleo/uboot: command prompt depends on chip type, closes #3606Olivier Dufour
2012-12-11cleo/u-boot/cpinclude: preserve timestamps when copying, closes #3515Yacine Belkadi
The files copied by cpincludes had new timestamps. As a consequence, the build process rebuilt dependent files, even if no actual changes happened. Ask cp to preserve timestamps, in order to avoid messing with the dependencies.
2012-12-10{cleo/uboot, common}: change system clock speed to 222 MHz, closes #3587Cyril Jourdan
In order to get ARM clock down to 444 MHz.
2012-11-21cleo/uboot: add support for SPC200C archi in spidupdate MME, refs #3452Jérémy Dufour
2012-11-21cleo/uboot: use new spidcom image descriptor in spid{boot,update}, refs #3452Jérémy Dufour
This commit uses the new spidcom image descriptor format. It also adds support for the SPC200C (arch, version). It also adds a sanity check in spidboot to return an error if the image is invalid (rather than ignoring it).
2012-11-21cleo/u-boot: remove non maintained code from spidboot, refs #3452Jérémy Dufour
2012-11-21common: move spid_img_desc.h to common/include, refs #3452Jérémy Dufour
spid_img_desc.h header is used by the kernel and other applications: it is more suitable to have it in common include directory.
2012-11-06cleo/uboot/cpu/spc300: increase ICP and IBias current for PPLL, closes #3433Cyril Jourdan
2012-11-06cleo/uboot/inc/configs: suppress LINUX_MEM_WORKAROUND, closes #2842Cyril Jourdan
This reverts commit 9f66174fd8adf4fdc7025e811550402e966e6cd4. This workaround is no more needed, now that vmalloc area size has been corrected. /!\ From this commit, and for MSE500 and MSE500DINI chips, u-boot is no more compatible with linux images from the previous commits!
2012-10-23cleo/uboot: use common watchdog API, closes #3296Jérémy Dufour
Changes introduced by commit 170f07194643 should have been reported to uboot too.
2012-10-17cleo/linux/driver/net/arm/synop3504: adapt synchro with DMA, closes #3408Jean-Philippe SAVE
- force compiler to set dma own-bit at the end of the descriptor changes. - waiting for miu flush before using dma descriptors changed by dma.
2012-09-20cleo/uboot/cpu/spc300: configure DSP PLL divider for 500 mode, closes #2961Jean-Philippe SAVE
2012-09-20common/inc/asm/arch/ips: add timer 3 and 4 defines, refs #3318Cyril Jourdan
2012-09-20common/inc/asm/arch/ips/hw: move DPLL regs to mseafe.h, refs #3318Jean-Philippe SAVE
2012-09-20common/inc/asm/arch/ips/hw: add mseafe.h, refs #3318Jean-Philippe SAVE
2012-09-20cleo/uboot: add a machine type for MSE500, refs #2961Cyril Jourdan
2012-09-20cleo/uboot/board/sdk300: use get_master_clock for SPI speed, refs #2961Cyril Jourdan
2012-09-20cleo/uboot/cpu/spc300: make get_master_clock common, refs #2961Cyril Jourdan
2012-09-20cleo/uboot/drivers: wait for link status up, refs #2961Cyril Jourdan
This loop is made to handle Realtek PHYs, which need time between autoneg and status register update. Moreover, they need at least two reads to update the link status bit.
2012-09-20cleo/uboot/cpu/spc300: handle MSE500 eth clocks config, refs #2961Cyril Jourdan
2012-09-20cleo/uboot/cpu/spc300: change SYNOP3504_FIXED_CLK feature, refs #2961Jean-Philippe SAVE
- change !SYNOP3504_FIXED_CLK feature into SPCETH - rename eth_init.S file into spceth.S
2012-09-20common/inc/asm/arch/ips: manage maria2 regbank, refs #2961Cyril Jourdan
2012-09-20{cleo, common}: change eth prefix in NVRAM fields into eth1, refs #2961Cyril Jourdan
2012-09-20{cleo/uboot, common}: add IOMUX management, refs #2961Cyril Jourdan
2012-09-20common/include/asm/arch/ips/hw: add iomux defines, refs #2961Cyril Jourdan
2012-09-20cleo/uboot/cpu/spc300: move gpio_pio_init into a specific file, refs #2961Cyril Jourdan
2012-09-20cleo/u-boot/cpu/spc300: add timer clock for MSE500, refs #2961Jean-Philippe SAVE
- With a Xclk at 24MHz we cannot reach a timer_clk at 3,125MHz, so for MSE500 the timer_clk will be 4MHz.
2012-09-20cleo/u-boot/cpu/spc300: use CFG_HZ as timer clock define, refs #2961Jean-Philippe SAVE
2012-09-20cleo/u-boot/include/configs: define refactoringJean-Philippe SAVE
2012-09-20common/tools/genNVRAM: add a MIU config for MSE500 simu model, refs #2961Cyril Jourdan
2012-09-20{common,cleo}: remove MIU_ATOP_REG_BASE, refs #2961Cyril Jourdan
As a consequence, MIU_REG_BASE is renamed into MIU_BASE.
2012-09-20cleo/uboot/cpu/spc300: add msepll.S, refs #2961Cyril Jourdan
2012-09-20common/include/asm/arch/ips/hw: add msepll defines, refs #2961Jean-Philippe SAVE
2012-09-20cleo/uboot: create MSE500 chip, refs #2961Cyril Jourdan
2012-09-20cleo/uboot/cpu/spc300: rename pll_init.S into spcpll.S, refs #2961Cyril Jourdan
Change !CONFIG_CHIP_FEATURE_NO_PLL into CONFIG_CHIP_FEATURE_SPCPLL
2012-09-20cleo/uboot/cpu/spc300: move sdram init after PLL init, refs #2961Cyril Jourdan
In the case where you do not need to resync DSP and AFE clocks.