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path: root/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/arm_ictl.h
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Diffstat (limited to 'cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/arm_ictl.h')
-rw-r--r--cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/arm_ictl.h588
1 files changed, 0 insertions, 588 deletions
diff --git a/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/arm_ictl.h b/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/arm_ictl.h
deleted file mode 100644
index 570f7a1969..0000000000
--- a/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/arm_ictl.h
+++ /dev/null
@@ -1,588 +0,0 @@
-/*
- * include/asm-arm/arch-spc300/arm_ictl.h
- *
- * Copyright (C) 2009 SPiDCOM Technologies
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __ASM_ARCH_ARM_ICTL_H
-#define __ASM_ARCH_ARM_ICTL_H
-
-#ifndef ARM_ICTL_BASE
- #error "ARM_ICTL_BASE macro needs to be defined before including file arm_ictl.h"
-#endif
-
-
-#define IRQ_INTEN_OFFSET 0x000
-#define IRQ_INTEN_OFFSET_L 0x000
-#define IRQ_INTEN_OFFSET_H 0x004
-#define IRQ_INTMASK_OFFSET 0x008
-#define IRQ_INTMASK_OFFSET_L 0x008
-#define IRQ_INTMASK_OFFSET_H 0x00c
-#define IRQ_INTFORCE_OFFSET 0x010
-#define IRQ_INTFORCE_OFFSET_L 0x010
-#define IRQ_INTFORCE_OFFSET_H 0x014
-#define IRQ_RAWSTATUS_OFFSET 0x018
-#define IRQ_RAWSTATUS_OFFSET_L 0x018
-#define IRQ_RAWSTATUS_OFFSET_H 0x01c
-#define IRQ_STATUS_OFFSET 0x020
-#define IRQ_STATUS_OFFSET_L 0x020
-#define IRQ_STATUS_OFFSET_H 0x024
-#define IRQ_MASKSTATUS_OFFSET 0x028
-#define IRQ_MASKSTATUS_OFFSET_L 0x028
-#define IRQ_MASKSTATUS_OFFSET_H 0x02c
-#define IRQ_FINALSTATUS_OFFSET 0x030
-#define IRQ_FINALSTATUS_OFFSET_L 0x030
-#define IRQ_FINALSTATUS_OFFSET_H 0x034
-#define IRQ_VECTOR_OFFSET 0x038
-#define IRQ_VECTOR_OFFSET_L 0x038
-#define IRQ_VECTOR_OFFSET_H 0x03c
-#define IRQ_VECTOR_OFFSET_0 0x040
-#define IRQ_VECTOR_OFFSET_0_L 0x040
-#define IRQ_VECTOR_OFFSET_0_H 0x044
-#define IRQ_VECTOR_OFFSET_1 0x048
-#define IRQ_VECTOR_OFFSET_1_L 0x048
-#define IRQ_VECTOR_OFFSET_1_H 0x04c
-#define IRQ_VECTOR_OFFSET_2 0x050
-#define IRQ_VECTOR_OFFSET_2_L 0x050
-#define IRQ_VECTOR_OFFSET_2_H 0x054
-#define IRQ_VECTOR_OFFSET_3 0x058
-#define IRQ_VECTOR_OFFSET_3_L 0x058
-#define IRQ_VECTOR_OFFSET_3_H 0x05c
-#define IRQ_VECTOR_OFFSET_4 0x060
-#define IRQ_VECTOR_OFFSET_4_L 0x060
-#define IRQ_VECTOR_OFFSET_4_H 0x064
-#define IRQ_VECTOR_OFFSET_5 0x068
-#define IRQ_VECTOR_OFFSET_5_L 0x068
-#define IRQ_VECTOR_OFFSET_5_H 0x06c
-#define IRQ_VECTOR_OFFSET_6 0x070
-#define IRQ_VECTOR_OFFSET_6_L 0x070
-#define IRQ_VECTOR_OFFSET_6_H 0x074
-#define IRQ_VECTOR_OFFSET_7 0x078
-#define IRQ_VECTOR_OFFSET_7_L 0x078
-#define IRQ_VECTOR_OFFSET_7_H 0x07c
-#define IRQ_VECTOR_OFFSET_8 0x080
-#define IRQ_VECTOR_OFFSET_8_L 0x080
-#define IRQ_VECTOR_OFFSET_8_H 0x084
-#define IRQ_VECTOR_OFFSET_9 0x088
-#define IRQ_VECTOR_OFFSET_9_L 0x088
-#define IRQ_VECTOR_OFFSET_9_H 0x08c
-#define IRQ_VECTOR_OFFSET_10 0x090
-#define IRQ_VECTOR_OFFSET_10_L 0x090
-#define IRQ_VECTOR_OFFSET_10_H 0x094
-#define IRQ_VECTOR_OFFSET_11 0x098
-#define IRQ_VECTOR_OFFSET_11_L 0x098
-#define IRQ_VECTOR_OFFSET_11_H 0x09c
-#define IRQ_VECTOR_OFFSET_12 0x0a0
-#define IRQ_VECTOR_OFFSET_12_L 0x0a0
-#define IRQ_VECTOR_OFFSET_12_H 0x0a4
-#define IRQ_VECTOR_OFFSET_13 0x0a8
-#define IRQ_VECTOR_OFFSET_13_L 0x0a8
-#define IRQ_VECTOR_OFFSET_13_H 0x0ac
-#define IRQ_VECTOR_OFFSET_14 0x0b0
-#define IRQ_VECTOR_OFFSET_14_L 0x0b0
-#define IRQ_VECTOR_OFFSET_14_H 0x0b4
-#define IRQ_VECTOR_OFFSET_15 0x0b8
-#define IRQ_VECTOR_OFFSET_15_L 0x0b8
-#define IRQ_VECTOR_OFFSET_15_H 0x0bc
-#define FIQ_INTEN_OFFSET 0x0c0
-#define FIQ_INTMASK_OFFSET 0x0c4
-#define FIQ_INTFORCE_OFFSET 0x0c8
-#define FIQ_RAWSTATUS_OFFSET 0x0cc
-#define FIQ_STATUS_OFFSET 0x0d0
-#define FIQ_FINALSTATUS_OFFSET 0x0d4
-#define IRQ_PLEVEL_OFFSET 0x0d8
-#define ICTL_VERSION_ID_OFFSET 0x0e0
-#define IRQ_P0_OFFSET 0x0e8
-#define IRQ_P1_OFFSET 0x0ec
-#define IRQ_P2_OFFSET 0x0f0
-#define IRQ_P3_OFFSET 0x0f4
-#define IRQ_P4_OFFSET 0x0f8
-#define IRQ_P5_OFFSET 0x0fc
-#define IRQ_P6_OFFSET 0x100
-#define IRQ_P7_OFFSET 0x104
-#define IRQ_P8_OFFSET 0x108
-#define IRQ_P9_OFFSET 0x10c
-#define IRQ_P10_OFFSET 0x110
-#define IRQ_P11_OFFSET 0x114
-#define IRQ_P12_OFFSET 0x118
-#define IRQ_P13_OFFSET 0x11c
-#define IRQ_P14_OFFSET 0x120
-#define IRQ_P15_OFFSET 0x124
-#define IRQ_P16_OFFSET 0x128
-#define IRQ_P17_OFFSET 0x12c
-#define IRQ_P18_OFFSET 0x130
-#define IRQ_P19_OFFSET 0x134
-#define IRQ_P20_OFFSET 0x138
-#define IRQ_P21_OFFSET 0x13c
-#define IRQ_P22_OFFSET 0x140
-#define IRQ_P23_OFFSET 0x144
-#define IRQ_P24_OFFSET 0x148
-#define IRQ_P25_OFFSET 0x14c
-#define IRQ_P26_OFFSET 0x150
-#define IRQ_P27_OFFSET 0x154
-#define IRQ_P28_OFFSET 0x158
-#define IRQ_P29_OFFSET 0x15c
-#define IRQ_P30_OFFSET 0x160
-#define IRQ_P31_OFFSET 0x164
-#define IRQ_P32_OFFSET 0x168
-#define IRQ_P33_OFFSET 0x16c
-#define IRQ_P34_OFFSET 0x170
-#define IRQ_P35_OFFSET 0x174
-#define IRQ_P36_OFFSET 0x178
-#define IRQ_P37_OFFSET 0x17c
-#define IRQ_P38_OFFSET 0x180
-#define IRQ_P39_OFFSET 0x184
-#define IRQ_P40_OFFSET 0x188
-#define IRQ_P41_OFFSET 0x18c
-#define IRQ_P42_OFFSET 0x190
-#define IRQ_P43_OFFSET 0x194
-#define IRQ_P44_OFFSET 0x198
-#define IRQ_P45_OFFSET 0x19c
-#define IRQ_P46_OFFSET 0x1a0
-#define IRQ_P47_OFFSET 0x1a4
-#define IRQ_P48_OFFSET 0x1a8
-#define IRQ_P49_OFFSET 0x1ac
-#define IRQ_P50_OFFSET 0x1b0
-#define IRQ_P51_OFFSET 0x1b4
-#define IRQ_P52_OFFSET 0x1b8
-#define IRQ_P53_OFFSET 0x1bc
-#define IRQ_P54_OFFSET 0x1c0
-#define IRQ_P55_OFFSET 0x1c4
-#define IRQ_P56_OFFSET 0x1c8
-#define IRQ_P57_OFFSET 0x1cc
-#define IRQ_P58_OFFSET 0x1d0
-#define IRQ_P59_OFFSET 0x1d4
-#define IRQ_P60_OFFSET 0x1d8
-#define IRQ_P61_OFFSET 0x1dc
-#define IRQ_P62_OFFSET 0x1e0
-#define IRQ_P63_OFFSET 0x1e4
-
-#define IRQ_PLEVEL_WIDTH 4
-#define ICTL_VERSION_ID_WIDTH 32
-
-//#ifdef QUICKSTART_APB_ICTL
-#define IRQ_INTEN (ARM_ICTL_BASE + IRQ_INTEN_OFFSET)
-#define IRQ_INTEN_L (ARM_ICTL_BASE + IRQ_INTEN_OFFSET_L)
-#define IRQ_INTEN_H (ARM_ICTL_BASE + IRQ_INTEN_OFFSET_H)
-#define IRQ_INTMASK (ARM_ICTL_BASE + IRQ_INTMASK_OFFSET)
-#define IRQ_INTMASK_L (ARM_ICTL_BASE + IRQ_INTMASK_OFFSET_L)
-#define IRQ_INTMASK_H (ARM_ICTL_BASE + IRQ_INTMASK_OFFSET_H)
-#define IRQ_INTFORCE (ARM_ICTL_BASE + IRQ_INTFORCE_OFFSET)
-#define IRQ_INTFORCE_L (ARM_ICTL_BASE + IRQ_INTFORCE_OFFSET_L)
-#define IRQ_INTFORCE_H (ARM_ICTL_BASE + IRQ_INTFORCE_OFFSET_H)
-#define IRQ_RAWSTATUS (ARM_ICTL_BASE + IRQ_RAWSTATUS_OFFSET)
-#define IRQ_RAWSTATUS_L (ARM_ICTL_BASE + IRQ_RAWSTATUS_OFFSET_L)
-#define IRQ_RAWSTATUS_H (ARM_ICTL_BASE + IRQ_RAWSTATUS_OFFSET_H)
-#define IRQ_STATUS (ARM_ICTL_BASE + IRQ_STATUS_OFFSET)
-#define IRQ_STATUS_L (ARM_ICTL_BASE + IRQ_STATUS_OFFSET_L)
-#define IRQ_STATUS_H (ARM_ICTL_BASE + IRQ_STATUS_OFFSET_H)
-#define IRQ_MASKSTATUS (ARM_ICTL_BASE + IRQ_MASKSTATUS_OFFSET)
-#define IRQ_MASKSTATUS_L (ARM_ICTL_BASE + IRQ_MASKSTATUS_OFFSET_L)
-#define IRQ_MASKSTATUS_H (ARM_ICTL_BASE + IRQ_MASKSTATUS_OFFSET_H)
-#define IRQ_FINALSTATUS (ARM_ICTL_BASE + IRQ_FINALSTATUS_OFFSET)
-#define IRQ_FINALSTATUS_L (ARM_ICTL_BASE + IRQ_FINALSTATUS_OFFSET_L)
-#define IRQ_FINALSTATUS_H (ARM_ICTL_BASE + IRQ_FINALSTATUS_OFFSET_H)
-#define IRQ_VECTOR (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET)
-#define IRQ_VECTOR_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_L)
-#define IRQ_VECTOR_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_H)
-#define IRQ_VECTOR_0 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_0)
-#define IRQ_VECTOR_0_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_0_L)
-#define IRQ_VECTOR_0_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_0_H)
-#define IRQ_VECTOR_1 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_1)
-#define IRQ_VECTOR_1_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_1_L)
-#define IRQ_VECTOR_1_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_1_H)
-#define IRQ_VECTOR_2 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_2)
-#define IRQ_VECTOR_2_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_2_L)
-#define IRQ_VECTOR_2_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_2_H)
-#define IRQ_VECTOR_3 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_3)
-#define IRQ_VECTOR_3_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_3_L)
-#define IRQ_VECTOR_3_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_3_H)
-#define IRQ_VECTOR_4 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_4)
-#define IRQ_VECTOR_4_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_4_L)
-#define IRQ_VECTOR_4_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_4_H)
-#define IRQ_VECTOR_5 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_5)
-#define IRQ_VECTOR_5_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_5_L)
-#define IRQ_VECTOR_5_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_5_H)
-#define IRQ_VECTOR_6 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_6)
-#define IRQ_VECTOR_6_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_6_L)
-#define IRQ_VECTOR_6_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_6_H)
-#define IRQ_VECTOR_7 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_7)
-#define IRQ_VECTOR_7_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_7_L)
-#define IRQ_VECTOR_7_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_7_H)
-#define IRQ_VECTOR_8 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_8)
-#define IRQ_VECTOR_8_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_8_L)
-#define IRQ_VECTOR_8_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_8_H)
-#define IRQ_VECTOR_9 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_9)
-#define IRQ_VECTOR_9_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_9_L)
-#define IRQ_VECTOR_9_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_9_H)
-#define IRQ_VECTOR_10 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_10)
-#define IRQ_VECTOR_10_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_10_L)
-#define IRQ_VECTOR_10_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_10_H)
-#define IRQ_VECTOR_11 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_11)
-#define IRQ_VECTOR_11_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_11_L)
-#define IRQ_VECTOR_11_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_11_H)
-#define IRQ_VECTOR_12 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_12)
-#define IRQ_VECTOR_12_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_12_L)
-#define IRQ_VECTOR_12_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_12_H)
-#define IRQ_VECTOR_13 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_13)
-#define IRQ_VECTOR_13_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_13_L)
-#define IRQ_VECTOR_13_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_13_H)
-#define IRQ_VECTOR_14 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_14)
-#define IRQ_VECTOR_14_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_14_L)
-#define IRQ_VECTOR_14_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_14_H)
-#define IRQ_VECTOR_15 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_15)
-#define IRQ_VECTOR_15_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_15_L)
-#define IRQ_VECTOR_15_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_15_H)
-#define FIQ_INTEN (ARM_ICTL_BASE + FIQ_INTEN_OFFSET)
-#define FIQ_INTMASK (ARM_ICTL_BASE + FIQ_INTMASK_OFFSET)
-#define FIQ_INTFORCE (ARM_ICTL_BASE + FIQ_INTFORCE_OFFSET)
-#define FIQ_RAWSTATUS (ARM_ICTL_BASE + FIQ_RAWSTATUS_OFFSET)
-#define FIQ_STATUS (ARM_ICTL_BASE + FIQ_STATUS_OFFSET)
-#define FIQ_FINALSTATUS (ARM_ICTL_BASE + FIQ_FINALSTATUS_OFFSET)
-#define IRQ_PLEVEL (ARM_ICTL_BASE + IRQ_PLEVEL_OFFSET)
-#define ICTL_VERSION_ID (ARM_ICTL_BASE + ICTL_VERSION_ID_OFFSET)
-#define IRQ_P0_ADDR (ARM_ICTL_BASE + IRQ_P0_OFFSET)
-#define IRQ_P1_ADDR (ARM_ICTL_BASE + IRQ_P1_OFFSET)
-#define IRQ_P2_ADDR (ARM_ICTL_BASE + IRQ_P2_OFFSET)
-#define IRQ_P3_ADDR (ARM_ICTL_BASE + IRQ_P3_OFFSET)
-#define IRQ_P4_ADDR (ARM_ICTL_BASE + IRQ_P4_OFFSET)
-#define IRQ_P5_ADDR (ARM_ICTL_BASE + IRQ_P5_OFFSET)
-#define IRQ_P6_ADDR (ARM_ICTL_BASE + IRQ_P6_OFFSET)
-#define IRQ_P7_ADDR (ARM_ICTL_BASE + IRQ_P7_OFFSET)
-#define IRQ_P8_ADDR (ARM_ICTL_BASE + IRQ_P8_OFFSET)
-#define IRQ_P9_ADDR (ARM_ICTL_BASE + IRQ_P9_OFFSET)
-#define IRQ_P10_ADDR (ARM_ICTL_BASE + IRQ_P10_OFFSET)
-#define IRQ_P11_ADDR (ARM_ICTL_BASE + IRQ_P11_OFFSET)
-#define IRQ_P12_ADDR (ARM_ICTL_BASE + IRQ_P12_OFFSET)
-#define IRQ_P13_ADDR (ARM_ICTL_BASE + IRQ_P13_OFFSET)
-#define IRQ_P14_ADDR (ARM_ICTL_BASE + IRQ_P14_OFFSET)
-#define IRQ_P15_ADDR (ARM_ICTL_BASE + IRQ_P15_OFFSET)
-#define IRQ_P16_ADDR (ARM_ICTL_BASE + IRQ_P16_OFFSET)
-#define IRQ_P17_ADDR (ARM_ICTL_BASE + IRQ_P17_OFFSET)
-#define IRQ_P18_ADDR (ARM_ICTL_BASE + IRQ_P18_OFFSET)
-#define IRQ_P19_ADDR (ARM_ICTL_BASE + IRQ_P19_OFFSET)
-#define IRQ_P20_ADDR (ARM_ICTL_BASE + IRQ_P20_OFFSET)
-#define IRQ_P21_ADDR (ARM_ICTL_BASE + IRQ_P21_OFFSET)
-#define IRQ_P22_ADDR (ARM_ICTL_BASE + IRQ_P22_OFFSET)
-#define IRQ_P23_ADDR (ARM_ICTL_BASE + IRQ_P23_OFFSET)
-#define IRQ_P24_ADDR (ARM_ICTL_BASE + IRQ_P24_OFFSET)
-#define IRQ_P25_ADDR (ARM_ICTL_BASE + IRQ_P25_OFFSET)
-#define IRQ_P26_ADDR (ARM_ICTL_BASE + IRQ_P26_OFFSET)
-#define IRQ_P27_ADDR (ARM_ICTL_BASE + IRQ_P27_OFFSET)
-#define IRQ_P28_ADDR (ARM_ICTL_BASE + IRQ_P28_OFFSET)
-#define IRQ_P29_ADDR (ARM_ICTL_BASE + IRQ_P29_OFFSET)
-#define IRQ_P29_ADDR (ARM_ICTL_BASE + IRQ_P29_OFFSET)
-#define IRQ_P30_ADDR (ARM_ICTL_BASE + IRQ_P30_OFFSET)
-#define IRQ_P31_ADDR (ARM_ICTL_BASE + IRQ_P31_OFFSET)
-#define IRQ_P32_ADDR (ARM_ICTL_BASE + IRQ_P32_OFFSET)
-#define IRQ_P33_ADDR (ARM_ICTL_BASE + IRQ_P33_OFFSET)
-#define IRQ_P34_ADDR (ARM_ICTL_BASE + IRQ_P34_OFFSET)
-#define IRQ_P35_ADDR (ARM_ICTL_BASE + IRQ_P35_OFFSET)
-#define IRQ_P36_ADDR (ARM_ICTL_BASE + IRQ_P36_OFFSET)
-#define IRQ_P37_ADDR (ARM_ICTL_BASE + IRQ_P37_OFFSET)
-#define IRQ_P38_ADDR (ARM_ICTL_BASE + IRQ_P38_OFFSET)
-#define IRQ_P39_ADDR (ARM_ICTL_BASE + IRQ_P39_OFFSET)
-#define IRQ_P40_ADDR (ARM_ICTL_BASE + IRQ_P40_OFFSET)
-#define IRQ_P41_ADDR (ARM_ICTL_BASE + IRQ_P41_OFFSET)
-#define IRQ_P42_ADDR (ARM_ICTL_BASE + IRQ_P42_OFFSET)
-#define IRQ_P43_ADDR (ARM_ICTL_BASE + IRQ_P43_OFFSET)
-#define IRQ_P44_ADDR (ARM_ICTL_BASE + IRQ_P44_OFFSET)
-#define IRQ_P45_ADDR (ARM_ICTL_BASE + IRQ_P45_OFFSET)
-#define IRQ_P46_ADDR (ARM_ICTL_BASE + IRQ_P46_OFFSET)
-#define IRQ_P47_ADDR (ARM_ICTL_BASE + IRQ_P47_OFFSET)
-#define IRQ_P48_ADDR (ARM_ICTL_BASE + IRQ_P48_OFFSET)
-#define IRQ_P49_ADDR (ARM_ICTL_BASE + IRQ_P49_OFFSET)
-#define IRQ_P50_ADDR (ARM_ICTL_BASE + IRQ_P50_OFFSET)
-#define IRQ_P51_ADDR (ARM_ICTL_BASE + IRQ_P51_OFFSET)
-#define IRQ_P52_ADDR (ARM_ICTL_BASE + IRQ_P52_OFFSET)
-#define IRQ_P53_ADDR (ARM_ICTL_BASE + IRQ_P53_OFFSET)
-#define IRQ_P54_ADDR (ARM_ICTL_BASE + IRQ_P54_OFFSET)
-#define IRQ_P55_ADDR (ARM_ICTL_BASE + IRQ_P55_OFFSET)
-#define IRQ_P56_ADDR (ARM_ICTL_BASE + IRQ_P56_OFFSET)
-#define IRQ_P57_ADDR (ARM_ICTL_BASE + IRQ_P57_OFFSET)
-#define IRQ_P58_ADDR (ARM_ICTL_BASE + IRQ_P58_OFFSET)
-#define IRQ_P59_ADDR (ARM_ICTL_BASE + IRQ_P59_OFFSET)
-#define IRQ_P60_ADDR (ARM_ICTL_BASE + IRQ_P60_OFFSET)
-#define IRQ_P61_ADDR (ARM_ICTL_BASE + IRQ_P61_OFFSET)
-#define IRQ_P62_ADDR (ARM_ICTL_BASE + IRQ_P62_OFFSET)
-#define IRQ_P63_ADDR (ARM_ICTL_BASE + IRQ_P63_OFFSET)
-//#endif
-
-#define APB_ICT_IRQ_INTEN (ARM_ICTL_BASE + IRQ_INTEN_OFFSET)
-#define APB_ICT_IRQ_INTEN_L (ARM_ICTL_BASE + IRQ_INTEN_OFFSET_L)
-#define APB_ICT_IRQ_INTEN_H (ARM_ICTL_BASE + IRQ_INTEN_OFFSET_H)
-#define APB_ICT_IRQ_INTMASK (ARM_ICTL_BASE + IRQ_INTMASK_OFFSET)
-#define APB_ICT_IRQ_INTMASK_L (ARM_ICTL_BASE + IRQ_INTMASK_OFFSET_L)
-#define APB_ICT_IRQ_INTMASK_H (ARM_ICTL_BASE + IRQ_INTMASK_OFFSET_H)
-#define APB_ICT_IRQ_INTFORCE (ARM_ICTL_BASE + IRQ_INTFORCE_OFFSET)
-#define APB_ICT_IRQ_INTFORCE_L (ARM_ICTL_BASE + IRQ_INTFORCE_OFFSET_L)
-#define APB_ICT_IRQ_INTFORCE_H (ARM_ICTL_BASE + IRQ_INTFORCE_OFFSET_H)
-#define APB_ICT_IRQ_RAWSTATUS (ARM_ICTL_BASE + IRQ_RAWSTATUS_OFFSET)
-#define APB_ICT_IRQ_RAWSTATUS_L (ARM_ICTL_BASE + IRQ_RAWSTATUS_OFFSET_L)
-#define APB_ICT_IRQ_RAWSTATUS_H (ARM_ICTL_BASE + IRQ_RAWSTATUS_OFFSET_H)
-#define APB_ICT_IRQ_STATUS (ARM_ICTL_BASE + IRQ_STATUS_OFFSET)
-#define APB_ICT_IRQ_STATUS_L (ARM_ICTL_BASE + IRQ_STATUS_OFFSET_L)
-#define APB_ICT_IRQ_STATUS_H (ARM_ICTL_BASE + IRQ_STATUS_OFFSET_H)
-#define APB_ICT_IRQ_MASKSTATUS (ARM_ICTL_BASE + IRQ_MASKSTATUS_OFFSET)
-#define APB_ICT_IRQ_MASKSTATUS_L (ARM_ICTL_BASE + IRQ_MASKSTATUS_OFFSET_L)
-#define APB_ICT_IRQ_MASKSTATUS_H (ARM_ICTL_BASE + IRQ_MASKSTATUS_OFFSET_H)
-#define APB_ICT_IRQ_FINALSTATUS (ARM_ICTL_BASE + IRQ_FINALSTATUS_OFFSET)
-#define APB_ICT_IRQ_FINALSTATUS_L (ARM_ICTL_BASE + IRQ_FINALSTATUS_OFFSET_L)
-#define APB_ICT_IRQ_FINALSTATUS_H (ARM_ICTL_BASE + IRQ_FINALSTATUS_OFFSET_H)
-#define APB_ICT_IRQ_VECTOR (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET)
-#define APB_ICT_IRQ_VECTOR_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_L)
-#define APB_ICT_IRQ_VECTOR_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_H)
-#define APB_ICT_IRQ_VECTOR_0 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_0)
-#define APB_ICT_IRQ_VECTOR_0_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_0_L)
-#define APB_ICT_IRQ_VECTOR_0_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_0_H)
-#define APB_ICT_IRQ_VECTOR_1 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_1)
-#define APB_ICT_IRQ_VECTOR_1_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_1_L)
-#define APB_ICT_IRQ_VECTOR_1_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_1_H)
-#define APB_ICT_IRQ_VECTOR_2 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_2)
-#define APB_ICT_IRQ_VECTOR_2_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_2_L)
-#define APB_ICT_IRQ_VECTOR_2_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_2_H)
-#define APB_ICT_IRQ_VECTOR_3 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_3)
-#define APB_ICT_IRQ_VECTOR_3_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_3_L)
-#define APB_ICT_IRQ_VECTOR_3_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_3_H)
-#define APB_ICT_IRQ_VECTOR_4 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_4)
-#define APB_ICT_IRQ_VECTOR_4_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_4_L)
-#define APB_ICT_IRQ_VECTOR_4_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_4_H)
-#define APB_ICT_IRQ_VECTOR_5 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_5)
-#define APB_ICT_IRQ_VECTOR_5_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_5_L)
-#define APB_ICT_IRQ_VECTOR_5_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_5_H)
-#define APB_ICT_IRQ_VECTOR_6 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_6)
-#define APB_ICT_IRQ_VECTOR_6_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_6_L)
-#define APB_ICT_IRQ_VECTOR_6_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_6_H)
-#define APB_ICT_IRQ_VECTOR_7 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_7)
-#define APB_ICT_IRQ_VECTOR_7_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_7_L)
-#define APB_ICT_IRQ_VECTOR_7_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_7_H)
-#define APB_ICT_IRQ_VECTOR_8 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_8)
-#define APB_ICT_IRQ_VECTOR_8_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_8_L)
-#define APB_ICT_IRQ_VECTOR_8_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_8_H)
-#define APB_ICT_IRQ_VECTOR_9 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_9)
-#define APB_ICT_IRQ_VECTOR_9_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_9_L)
-#define APB_ICT_IRQ_VECTOR_9_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_9_H)
-#define APB_ICT_IRQ_VECTOR_10 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_10)
-#define APB_ICT_IRQ_VECTOR_10_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_10_L)
-#define APB_ICT_IRQ_VECTOR_10_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_10_H)
-#define APB_ICT_IRQ_VECTOR_11 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_11)
-#define APB_ICT_IRQ_VECTOR_11_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_11_L)
-#define APB_ICT_IRQ_VECTOR_11_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_11_H)
-#define APB_ICT_IRQ_VECTOR_12 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_12)
-#define APB_ICT_IRQ_VECTOR_12_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_12_L)
-#define APB_ICT_IRQ_VECTOR_12_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_12_H)
-#define APB_ICT_IRQ_VECTOR_13 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_13)
-#define APB_ICT_IRQ_VECTOR_13_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_13_L)
-#define APB_ICT_IRQ_VECTOR_13_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_13_H)
-#define APB_ICT_IRQ_VECTOR_14 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_14)
-#define APB_ICT_IRQ_VECTOR_14_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_14_L)
-#define APB_ICT_IRQ_VECTOR_14_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_14_H)
-#define APB_ICT_IRQ_VECTOR_15 (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_15)
-#define APB_ICT_IRQ_VECTOR_15_L (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_15_L)
-#define APB_ICT_IRQ_VECTOR_15_H (ARM_ICTL_BASE + IRQ_VECTOR_OFFSET_15_H)
-#define APB_ICT_FIQ_INTEN (ARM_ICTL_BASE + FIQ_INTEN_OFFSET)
-#define APB_ICT_FIQ_INTMASK (ARM_ICTL_BASE + FIQ_INTMASK_OFFSET)
-#define APB_ICT_FIQ_INTFORCE (ARM_ICTL_BASE + FIQ_INTFORCE_OFFSET)
-#define APB_ICT_FIQ_RAWSTATUS (ARM_ICTL_BASE + FIQ_RAWSTATUS_OFFSET)
-#define APB_ICT_FIQ_STATUS (ARM_ICTL_BASE + FIQ_STATUS_OFFSET)
-#define APB_ICT_FIQ_FINALSTATUS (ARM_ICTL_BASE + FIQ_FINALSTATUS_OFFSET)
-#define APB_ICT_IRQ_PLEVEL (ARM_ICTL_BASE + IRQ_PLEVEL_OFFSET)
-#define APB_ICT_ICTL_VERSION_ID (ARM_ICTL_BASE + ICTL_VERSION_ID_OFFSET)
-#define APB_ICT_IRQ_P0_ADDR (ARM_ICTL_BASE + IRQ_P0_OFFSET)
-#define APB_ICT_IRQ_P1_ADDR (ARM_ICTL_BASE + IRQ_P1_OFFSET)
-#define APB_ICT_IRQ_P2_ADDR (ARM_ICTL_BASE + IRQ_P2_OFFSET)
-#define APB_ICT_IRQ_P3_ADDR (ARM_ICTL_BASE + IRQ_P3_OFFSET)
-#define APB_ICT_IRQ_P4_ADDR (ARM_ICTL_BASE + IRQ_P4_OFFSET)
-#define APB_ICT_IRQ_P5_ADDR (ARM_ICTL_BASE + IRQ_P5_OFFSET)
-#define APB_ICT_IRQ_P6_ADDR (ARM_ICTL_BASE + IRQ_P6_OFFSET)
-#define APB_ICT_IRQ_P7_ADDR (ARM_ICTL_BASE + IRQ_P7_OFFSET)
-#define APB_ICT_IRQ_P8_ADDR (ARM_ICTL_BASE + IRQ_P8_OFFSET)
-#define APB_ICT_IRQ_P9_ADDR (ARM_ICTL_BASE + IRQ_P9_OFFSET)
-#define APB_ICT_IRQ_P10_ADDR (ARM_ICTL_BASE + IRQ_P10_OFFSET)
-#define APB_ICT_IRQ_P11_ADDR (ARM_ICTL_BASE + IRQ_P11_OFFSET)
-#define APB_ICT_IRQ_P12_ADDR (ARM_ICTL_BASE + IRQ_P12_OFFSET)
-#define APB_ICT_IRQ_P13_ADDR (ARM_ICTL_BASE + IRQ_P13_OFFSET)
-#define APB_ICT_IRQ_P14_ADDR (ARM_ICTL_BASE + IRQ_P14_OFFSET)
-#define APB_ICT_IRQ_P15_ADDR (ARM_ICTL_BASE + IRQ_P15_OFFSET)
-#define APB_ICT_IRQ_P16_ADDR (ARM_ICTL_BASE + IRQ_P16_OFFSET)
-#define APB_ICT_IRQ_P17_ADDR (ARM_ICTL_BASE + IRQ_P17_OFFSET)
-#define APB_ICT_IRQ_P18_ADDR (ARM_ICTL_BASE + IRQ_P18_OFFSET)
-#define APB_ICT_IRQ_P19_ADDR (ARM_ICTL_BASE + IRQ_P19_OFFSET)
-#define APB_ICT_IRQ_P20_ADDR (ARM_ICTL_BASE + IRQ_P20_OFFSET)
-#define APB_ICT_IRQ_P21_ADDR (ARM_ICTL_BASE + IRQ_P21_OFFSET)
-#define APB_ICT_IRQ_P22_ADDR (ARM_ICTL_BASE + IRQ_P22_OFFSET)
-#define APB_ICT_IRQ_P23_ADDR (ARM_ICTL_BASE + IRQ_P23_OFFSET)
-#define APB_ICT_IRQ_P24_ADDR (ARM_ICTL_BASE + IRQ_P24_OFFSET)
-#define APB_ICT_IRQ_P25_ADDR (ARM_ICTL_BASE + IRQ_P25_OFFSET)
-#define APB_ICT_IRQ_P26_ADDR (ARM_ICTL_BASE + IRQ_P26_OFFSET)
-#define APB_ICT_IRQ_P27_ADDR (ARM_ICTL_BASE + IRQ_P27_OFFSET)
-#define APB_ICT_IRQ_P28_ADDR (ARM_ICTL_BASE + IRQ_P28_OFFSET)
-#define APB_ICT_IRQ_P29_ADDR (ARM_ICTL_BASE + IRQ_P29_OFFSET)
-#define APB_ICT_IRQ_P29_ADDR (ARM_ICTL_BASE + IRQ_P29_OFFSET)
-#define APB_ICT_IRQ_P30_ADDR (ARM_ICTL_BASE + IRQ_P30_OFFSET)
-#define APB_ICT_IRQ_P31_ADDR (ARM_ICTL_BASE + IRQ_P31_OFFSET)
-#define APB_ICT_IRQ_P32_ADDR (ARM_ICTL_BASE + IRQ_P32_OFFSET)
-#define APB_ICT_IRQ_P33_ADDR (ARM_ICTL_BASE + IRQ_P33_OFFSET)
-#define APB_ICT_IRQ_P34_ADDR (ARM_ICTL_BASE + IRQ_P34_OFFSET)
-#define APB_ICT_IRQ_P35_ADDR (ARM_ICTL_BASE + IRQ_P35_OFFSET)
-#define APB_ICT_IRQ_P36_ADDR (ARM_ICTL_BASE + IRQ_P36_OFFSET)
-#define APB_ICT_IRQ_P37_ADDR (ARM_ICTL_BASE + IRQ_P37_OFFSET)
-#define APB_ICT_IRQ_P38_ADDR (ARM_ICTL_BASE + IRQ_P38_OFFSET)
-#define APB_ICT_IRQ_P39_ADDR (ARM_ICTL_BASE + IRQ_P39_OFFSET)
-#define APB_ICT_IRQ_P40_ADDR (ARM_ICTL_BASE + IRQ_P40_OFFSET)
-#define APB_ICT_IRQ_P41_ADDR (ARM_ICTL_BASE + IRQ_P41_OFFSET)
-#define APB_ICT_IRQ_P42_ADDR (ARM_ICTL_BASE + IRQ_P42_OFFSET)
-#define APB_ICT_IRQ_P43_ADDR (ARM_ICTL_BASE + IRQ_P43_OFFSET)
-#define APB_ICT_IRQ_P44_ADDR (ARM_ICTL_BASE + IRQ_P44_OFFSET)
-#define APB_ICT_IRQ_P45_ADDR (ARM_ICTL_BASE + IRQ_P45_OFFSET)
-#define APB_ICT_IRQ_P46_ADDR (ARM_ICTL_BASE + IRQ_P46_OFFSET)
-#define APB_ICT_IRQ_P47_ADDR (ARM_ICTL_BASE + IRQ_P47_OFFSET)
-#define APB_ICT_IRQ_P48_ADDR (ARM_ICTL_BASE + IRQ_P48_OFFSET)
-#define APB_ICT_IRQ_P49_ADDR (ARM_ICTL_BASE + IRQ_P49_OFFSET)
-#define APB_ICT_IRQ_P50_ADDR (ARM_ICTL_BASE + IRQ_P50_OFFSET)
-#define APB_ICT_IRQ_P51_ADDR (ARM_ICTL_BASE + IRQ_P51_OFFSET)
-#define APB_ICT_IRQ_P52_ADDR (ARM_ICTL_BASE + IRQ_P52_OFFSET)
-#define APB_ICT_IRQ_P53_ADDR (ARM_ICTL_BASE + IRQ_P53_OFFSET)
-#define APB_ICT_IRQ_P54_ADDR (ARM_ICTL_BASE + IRQ_P54_OFFSET)
-#define APB_ICT_IRQ_P55_ADDR (ARM_ICTL_BASE + IRQ_P55_OFFSET)
-#define APB_ICT_IRQ_P56_ADDR (ARM_ICTL_BASE + IRQ_P56_OFFSET)
-#define APB_ICT_IRQ_P57_ADDR (ARM_ICTL_BASE + IRQ_P57_OFFSET)
-#define APB_ICT_IRQ_P58_ADDR (ARM_ICTL_BASE + IRQ_P58_OFFSET)
-#define APB_ICT_IRQ_P59_ADDR (ARM_ICTL_BASE + IRQ_P59_OFFSET)
-#define APB_ICT_IRQ_P60_ADDR (ARM_ICTL_BASE + IRQ_P60_OFFSET)
-#define APB_ICT_IRQ_P61_ADDR (ARM_ICTL_BASE + IRQ_P61_OFFSET)
-#define APB_ICT_IRQ_P62_ADDR (ARM_ICTL_BASE + IRQ_P62_OFFSET)
-#define APB_ICT_IRQ_P63_ADDR (ARM_ICTL_BASE + IRQ_P63_OFFSET)
-
-#define APB_ICT_PING_1BIT_WR (APB_ICT_IRQ_INTEN_L)
-
-#define CC_APB_ICT_APB_DATA_WIDTH 32
-#define CC_APB_ICT_FORCEREG_ACTIVE_HIGH 1
-#define CC_APB_ICT_INT_POL 0
-#define CC_APB_ICT_HAS_PFLT 1
-#define CC_APB_ICT_HAS_VECTOR 1
-#define CC_APB_ICT_HAS_FIQ 0
-#define CC_APB_ICT_FIQ_NUM 4
-#define CC_APB_ICT_IRQ_NUM 32
-#define CC_APB_ICT_IRQSRC_POL_TYPE 0
-#define CC_APB_ICT_FIQSRC_POL_TYPE 0
-#define CC_APB_ICT_IRQ_DFLT_EN 0x0
-#define CC_APB_ICT_FIQ_DFLT_EN 0x0
-#define CC_APB_ICT_IRQ_PLEVEL 0
-#define CC_APB_ICT_READ_PRIORITY 1
-#define CC_APB_ICT_HC_PRIORITIES 0
-#define CC_APB_ICT_ISRC_PLEVEL_0 0
-#define CC_APB_ICT_ISRC_PLEVEL_1 0
-#define CC_APB_ICT_ISRC_PLEVEL_2 0
-#define CC_APB_ICT_ISRC_PLEVEL_3 0
-#define CC_APB_ICT_ISRC_PLEVEL_4 0
-#define CC_APB_ICT_ISRC_PLEVEL_5 0
-#define CC_APB_ICT_ISRC_PLEVEL_6 0
-#define CC_APB_ICT_ISRC_PLEVEL_7 0
-#define CC_APB_ICT_ISRC_PLEVEL_8 0
-#define CC_APB_ICT_ISRC_PLEVEL_9 0
-#define CC_APB_ICT_ISRC_PLEVEL_10 0
-#define CC_APB_ICT_ISRC_PLEVEL_11 0
-#define CC_APB_ICT_ISRC_PLEVEL_12 0
-#define CC_APB_ICT_ISRC_PLEVEL_13 0
-#define CC_APB_ICT_ISRC_PLEVEL_14 0
-#define CC_APB_ICT_ISRC_PLEVEL_15 0
-#define CC_APB_ICT_ISRC_PLEVEL_16 0
-#define CC_APB_ICT_ISRC_PLEVEL_17 0
-#define CC_APB_ICT_ISRC_PLEVEL_18 0
-#define CC_APB_ICT_ISRC_PLEVEL_19 0
-#define CC_APB_ICT_ISRC_PLEVEL_20 0
-#define CC_APB_ICT_ISRC_PLEVEL_21 0
-#define CC_APB_ICT_ISRC_PLEVEL_22 0
-#define CC_APB_ICT_ISRC_PLEVEL_23 0
-#define CC_APB_ICT_ISRC_PLEVEL_24 0
-#define CC_APB_ICT_ISRC_PLEVEL_25 0
-#define CC_APB_ICT_ISRC_PLEVEL_26 0
-#define CC_APB_ICT_ISRC_PLEVEL_27 0
-#define CC_APB_ICT_ISRC_PLEVEL_28 0
-#define CC_APB_ICT_ISRC_PLEVEL_29 0
-#define CC_APB_ICT_ISRC_PLEVEL_30 0
-#define CC_APB_ICT_ISRC_PLEVEL_31 0
-#define CC_APB_ICT_ISRC_PLEVEL_32 0
-#define CC_APB_ICT_ISRC_PLEVEL_33 1
-#define CC_APB_ICT_ISRC_PLEVEL_34 2
-#define CC_APB_ICT_ISRC_PLEVEL_35 3
-#define CC_APB_ICT_ISRC_PLEVEL_36 4
-#define CC_APB_ICT_ISRC_PLEVEL_37 5
-#define CC_APB_ICT_ISRC_PLEVEL_38 6
-#define CC_APB_ICT_ISRC_PLEVEL_39 7
-#define CC_APB_ICT_ISRC_PLEVEL_40 8
-#define CC_APB_ICT_ISRC_PLEVEL_41 9
-#define CC_APB_ICT_ISRC_PLEVEL_42 10
-#define CC_APB_ICT_ISRC_PLEVEL_43 11
-#define CC_APB_ICT_ISRC_PLEVEL_44 12
-#define CC_APB_ICT_ISRC_PLEVEL_45 13
-#define CC_APB_ICT_ISRC_PLEVEL_46 14
-#define CC_APB_ICT_ISRC_PLEVEL_47 15
-#define CC_APB_ICT_ISRC_PLEVEL_48 0
-#define CC_APB_ICT_ISRC_PLEVEL_49 1
-#define CC_APB_ICT_ISRC_PLEVEL_50 2
-#define CC_APB_ICT_ISRC_PLEVEL_51 3
-#define CC_APB_ICT_ISRC_PLEVEL_52 4
-#define CC_APB_ICT_ISRC_PLEVEL_53 5
-#define CC_APB_ICT_ISRC_PLEVEL_54 6
-#define CC_APB_ICT_ISRC_PLEVEL_55 7
-#define CC_APB_ICT_ISRC_PLEVEL_56 8
-#define CC_APB_ICT_ISRC_PLEVEL_57 9
-#define CC_APB_ICT_ISRC_PLEVEL_58 10
-#define CC_APB_ICT_ISRC_PLEVEL_59 11
-#define CC_APB_ICT_ISRC_PLEVEL_60 12
-#define CC_APB_ICT_ISRC_PLEVEL_61 13
-#define CC_APB_ICT_ISRC_PLEVEL_62 14
-#define CC_APB_ICT_ISRC_PLEVEL_63 15
-#define CC_APB_ICT_VECTOR_0 0x0
-#define CC_APB_ICT_VECTOR_1 0x1
-#define CC_APB_ICT_VECTOR_2 0x2
-#define CC_APB_ICT_VECTOR_3 0x3
-#define CC_APB_ICT_VECTOR_4 0x4
-#define CC_APB_ICT_VECTOR_5 0x5
-#define CC_APB_ICT_VECTOR_6 0x6
-#define CC_APB_ICT_VECTOR_7 0x7
-#define CC_APB_ICT_VECTOR_8 0x8
-#define CC_APB_ICT_VECTOR_9 0x9
-#define CC_APB_ICT_VECTOR_10 0xa
-#define CC_APB_ICT_VECTOR_11 0xb
-#define CC_APB_ICT_VECTOR_12 0xc
-#define CC_APB_ICT_VECTOR_13 0xd
-#define CC_APB_ICT_VECTOR_14 0xe
-#define CC_APB_ICT_VECTOR_15 0xf
-#define CC_APB_ICT_HC_VECTOR_0 1
-#define CC_APB_ICT_HC_VECTOR_1 1
-#define CC_APB_ICT_HC_VECTOR_2 1
-#define CC_APB_ICT_HC_VECTOR_3 1
-#define CC_APB_ICT_HC_VECTOR_4 1
-#define CC_APB_ICT_HC_VECTOR_5 1
-#define CC_APB_ICT_HC_VECTOR_6 1
-#define CC_APB_ICT_HC_VECTOR_7 1
-#define CC_APB_ICT_HC_VECTOR_8 1
-#define CC_APB_ICT_HC_VECTOR_9 1
-#define CC_APB_ICT_HC_VECTOR_10 1
-#define CC_APB_ICT_HC_VECTOR_11 1
-#define CC_APB_ICT_HC_VECTOR_12 1
-#define CC_APB_ICT_HC_VECTOR_13 1
-#define CC_APB_ICT_HC_VECTOR_14 1
-#define CC_APB_ICT_HC_VECTOR_15 1
-#define CC_APB_ICT_HC_VECTOR_15 1
-
-#endif /* __ASM_ARCH_ARM_ICTL_H */
-