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path: root/cleopatre/tools/genNVRAM/genNVRAM.c
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Diffstat (limited to 'cleopatre/tools/genNVRAM/genNVRAM.c')
-rw-r--r--cleopatre/tools/genNVRAM/genNVRAM.c160
1 files changed, 131 insertions, 29 deletions
diff --git a/cleopatre/tools/genNVRAM/genNVRAM.c b/cleopatre/tools/genNVRAM/genNVRAM.c
index 4061d01c11..3ba013b3eb 100644
--- a/cleopatre/tools/genNVRAM/genNVRAM.c
+++ b/cleopatre/tools/genNVRAM/genNVRAM.c
@@ -33,6 +33,7 @@
#include <inttypes.h>
#include <linux/if_ether.h>
#include <errno.h>
+#include <assert.h>
#include "nvram.h"
@@ -153,10 +154,12 @@ static spc300_nvram_t nvram = {
.gpio_0_7_cfg = DEFAULT_GPIO_0_7_CFG, /* SPC300 GPIO 0 to 7 configuration register */
.gpio_8_15_cfg = DEFAULT_GPIO_8_15_CFG, /* SPC300 GPIO 8 to 15 configuration register */
.gpio_allow_dir = DEFAULT_ALLOW_DIR, /* SPC300 GPIO allowed directions */
- .sdram_config = DEFAULT_SDRAM_CONFIG, /* SPC300 SDRAM configuration register */
- .sdram_timing0 = DEFAULT_SDRAM_TIMING0, /* SPC300 SDRAM timing register 0 */
- .sdram_timing1 = DEFAULT_SDRAM_TIMING1, /* SPC300 SDRAM timing register 1 */
- .sdram_refresh = DEFAULT_SDRAM_REFRESH, /* SPC300 SDRAM refresh register */
+ .dram.sdram = {
+ .config = DEFAULT_SDRAM_CONFIG, /* SPC300 SDRAM configuration register */
+ .timing0 = DEFAULT_SDRAM_TIMING0, /* SPC300 SDRAM timing register 0 */
+ .timing1 = DEFAULT_SDRAM_TIMING1, /* SPC300 SDRAM timing register 1 */
+ .refresh = DEFAULT_SDRAM_REFRESH, /* SPC300 SDRAM refresh register */
+ },
.flash_org = DEFAULT_FLASH_ORG, /* Flash organization */
.img_0_offset = DEFAULT_IMAGE0_OFFSET, /* offset of first image address */
.nb_images = DEFAULT_NB_IMAGES, /* Max Number of Images present in flash */
@@ -176,6 +179,50 @@ static spc300_nvram_t nvram = {
.cpu_partnb = DEFAULT_CPU_PARTNB, /* CPU version (for PRP support) */
};
+/* Next free position in dynamic NVRAM data. */
+static uint32_t *nvram_dynamic = nvram.dynamic;
+
+static enum
+{
+ DRAM_NOINIT,
+ DRAM_SDRAM,
+ DRAM_MIU,
+} dram = DRAM_NOINIT;
+
+/*
+ * MIU configurations: pair of offset, value, where offset is relative to
+ * MIU_REG_BASE.
+ */
+
+uint32_t miu_config_sdram_dini_64m[] =
+{
+ 0x0004, 0x00000894,
+ 0x0008, 0x00000185,
+ 0x000c, 0x00000120,
+ 0x0020, 0x00000031,
+ 0x00b4, 0x00002000,
+ 0x003c, 0x00000c01,
+ 0x003c, 0x00000c08,
+ 0x0000, 0x00000008,
+ 0x0000, 0x0000000c,
+ 0x0000, 0x0000000e,
+ 0x0000, 0x0000000f,
+ (uint32_t)-1
+};
+
+struct miu_config_table_t
+{
+ char *name;
+ unsigned int ram_size;
+ uint32_t *config;
+};
+
+static const struct miu_config_table_t miu_config_table[] =
+{
+ { "sdram_dini_64m", 64 * 1024 * 1024, miu_config_sdram_dini_64m },
+ NULL
+};
+
/*
* Private functions
*/
@@ -192,6 +239,7 @@ static void print_usage(const char *cmd)
" [ --stmg0r SDRAM timing0 register ]\n"
" [ --stmg1r SDRAM timing1 register ]\n"
" [ --srefr SDRAM refresh register ]\n"
+ " [ --miu-config MIU controller config ]\n"
" [ --forg flash organization ]\n"
" [ --img0off first image offset in flash ]\n"
" [ --nbimg number of Linux images ]\n"
@@ -314,29 +362,81 @@ static int parse_gpiodir(char *arg)
return 0;
}
+static int parse_sdram_check(void)
+{
+ if (dram != DRAM_NOINIT && dram != DRAM_SDRAM)
+ {
+ fprintf (stderr, "Several DRAM controller configuration detected\n");
+ return -1;
+ }
+ else
+ {
+ dram = DRAM_SDRAM;
+ return 0;
+ }
+}
+
static int parse_sdramcfg(char *arg)
{
- nvram.sdram_config = (uint32_t)strtoul(arg, NULL, 0);
- return 0;
+ nvram.dram.sdram.config = (uint32_t)strtoul(arg, NULL, 0);
+ return parse_sdram_check();
}
static int parse_sdramtmg0(char *arg)
{
- nvram.sdram_timing0 = (uint32_t)strtoul(arg, NULL, 0);
- return 0;
+ nvram.dram.sdram.timing0 = (uint32_t)strtoul(arg, NULL, 0);
+ return parse_sdram_check();
}
static int parse_sdramtmg1(char *arg)
{
- nvram.sdram_timing1 = (uint32_t)strtoul(arg, NULL, 0);
- return 0;
+ nvram.dram.sdram.timing1 = (uint32_t)strtoul(arg, NULL, 0);
+ return parse_sdram_check();
}
static int parse_sdramrefr(char *arg)
{
- nvram.sdram_refresh = (uint32_t)strtoul(arg, NULL, 0);
- return 0;
+ nvram.dram.sdram.refresh = (uint32_t)strtoul(arg, NULL, 0);
+ return parse_sdram_check();
+}
+
+static int parse_miu_config(char *arg)
+{
+ if (dram != DRAM_NOINIT)
+ {
+ fprintf (stderr, "Several DRAM controller configuration detected\n");
+ return -1;
+ }
+ dram = DRAM_MIU;
+ /* Lookup the requested config. */
+ const struct miu_config_table_t *p;
+ for (p = miu_config_table; p->name; p++)
+ {
+ if (strcmp(p->name, arg) == 0)
+ {
+ int size = 0;
+ nvram.dram.miu.config_offset =
+ (uint32_t) (nvram_dynamic - (uint32_t *) &nvram);
+ nvram.dram.miu.ram_size = p->ram_size;
+ nvram.dram.miu.reserved[0] = 0;
+ nvram.dram.miu.reserved[1] = 0;
+ uint32_t *config;
+ /* Translate the configuration into NVRAM format, see miu.S in
+ * u-boot. */
+ for (config = p->config; *config != (uint32_t) -1; config += 2)
+ {
+ assert (!(config[0] & ~0x3fffc));
+ assert (!(config[1] & ~0xffff));
+ *nvram_dynamic++ = (config[0] >> 2 << 16) | config[1];
+ size++;
+ }
+ nvram.dram.miu.config_size = size;
+ return 0;
+ }
+ }
+ return -1;
}
+
static int parse_forg(char *arg)
{
unsigned int sector_size;
@@ -502,6 +602,7 @@ struct parser parse_table[] =
{ "stmg0r", parse_sdramtmg0 },
{ "stmg1r", parse_sdramtmg1 },
{ "srefr", parse_sdramrefr },
+ { "miu_config", parse_miu_config },
{ "forg", parse_forg },
{ "img0off", parse_img0off },
{ "nbimg", parse_nbimg },
@@ -575,23 +676,24 @@ int main(int argc, char **argv)
{ "stmg0r", required_argument, NULL, 7 },
{ "stmg1r", required_argument, NULL, 8 },
{ "srefr", required_argument, NULL, 9 },
- { "forg", required_argument, NULL, 10 },
- { "img0off", required_argument, NULL, 11 },
- { "nbimg", required_argument, NULL, 12 },
- { "name", required_argument, NULL, 13 },
- { "partnb", required_argument, NULL, 14 },
- { "desc", required_argument, NULL, 15 },
- { "serial", required_argument, NULL, 16 },
- { "phy", required_argument, NULL, 17 },
- { "ethernet", required_argument, NULL, 18 },
- { "plc", required_argument, NULL, 19 },
- { "dpw", required_argument, NULL, 20 },
- { "oem", required_argument, NULL, 21 },
- { "tonemask", required_argument, NULL, 22 },
- { "factory", required_argument, NULL, 23 },
- { "portnb", required_argument, NULL, 24 },
- { "imgmaxsize", required_argument, NULL, 25 },
- { "cpupartnb", required_argument, NULL, 26 },
+ { "miu-config", required_argument, NULL, 10 },
+ { "forg", required_argument, NULL, 11 },
+ { "img0off", required_argument, NULL, 12 },
+ { "nbimg", required_argument, NULL, 13 },
+ { "name", required_argument, NULL, 14 },
+ { "partnb", required_argument, NULL, 15 },
+ { "desc", required_argument, NULL, 16 },
+ { "serial", required_argument, NULL, 17 },
+ { "phy", required_argument, NULL, 18 },
+ { "ethernet", required_argument, NULL, 19 },
+ { "plc", required_argument, NULL, 20 },
+ { "dpw", required_argument, NULL, 21 },
+ { "oem", required_argument, NULL, 22 },
+ { "tonemask", required_argument, NULL, 23 },
+ { "factory", required_argument, NULL, 24 },
+ { "portnb", required_argument, NULL, 25 },
+ { "imgmaxsize", required_argument, NULL, 26 },
+ { "cpupartnb", required_argument, NULL, 27 },
};
while( ( c = getopt_long_only(argc, argv, "", long_opts, &opt_index) ) != -1 )