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-rw-r--r--cleopatre/linux-2.6.25.10-spc300/Makefile2
-rw-r--r--cleopatre/u-boot-1.1.6/common/cmd_spidboot.c2
-rw-r--r--cleopatre/u-boot-1.1.6/config.mk2
-rw-r--r--cleopatre/u-boot-1.1.6/cpincludes.mk3
-rw-r--r--cleopatre/u-boot-1.1.6/cpu/spc300/wdt.c2
-rw-r--r--cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/.gitignore17
-rw-r--r--cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/hardware.h31
-rw-r--r--cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/image_desc.h68
-rw-r--r--cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/nvram.h236
-rw-r--r--cleopatre/u-boot-1.1.6/net/spidupd.c2
-rw-r--r--common/include/asm/arch/hardware.h3
-rw-r--r--common/include/asm/arch/ips/wdt.h3
-rw-r--r--common/include/asm/arch/nvram.h171
-rw-r--r--common/include/asm/arch/spid_img_desc.h2
14 files changed, 198 insertions, 346 deletions
diff --git a/cleopatre/linux-2.6.25.10-spc300/Makefile b/cleopatre/linux-2.6.25.10-spc300/Makefile
index f200a7945d..c9008290b3 100644
--- a/cleopatre/linux-2.6.25.10-spc300/Makefile
+++ b/cleopatre/linux-2.6.25.10-spc300/Makefile
@@ -328,7 +328,7 @@ LINUXINCLUDE := -Iinclude \
$(if $(KBUILD_SRC),-Iinclude2 -I$(srctree)/include) \
-include include/linux/autoconf.h
-KBUILD_CPPFLAGS := -D__KERNEL__ $(LINUXINCLUDE)
+KBUILD_CPPFLAGS := -DLINUX_COMPILE -D__KERNEL__ $(LINUXINCLUDE)
KBUILD_CFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \
-fno-strict-aliasing -fno-common \
diff --git a/cleopatre/u-boot-1.1.6/common/cmd_spidboot.c b/cleopatre/u-boot-1.1.6/common/cmd_spidboot.c
index 08664ff167..ed788e51a2 100644
--- a/cleopatre/u-boot-1.1.6/common/cmd_spidboot.c
+++ b/cleopatre/u-boot-1.1.6/common/cmd_spidboot.c
@@ -29,7 +29,7 @@
#include <watchdog.h>
#include <command.h>
#include <net.h>
-#include <asm/arch/image_desc.h>
+#include <asm/arch/spid_img_desc.h>
#include <asm/arch/nvram.h>
DECLARE_GLOBAL_DATA_PTR;
diff --git a/cleopatre/u-boot-1.1.6/config.mk b/cleopatre/u-boot-1.1.6/config.mk
index 6e280bc834..8cb40df8b5 100644
--- a/cleopatre/u-boot-1.1.6/config.mk
+++ b/cleopatre/u-boot-1.1.6/config.mk
@@ -148,7 +148,7 @@ OBJCFLAGS += --gap-fill=0xff
gccincdir := $(shell $(CC) -print-file-name=include)
CPPFLAGS := $(DBGFLAGS) $(OPTFLAGS) $(RELFLAGS) \
- -D__KERNEL__ -DTEXT_BASE=$(TEXT_BASE) \
+ -DUBOOT_COMPILE -D__KERNEL__ -DTEXT_BASE=$(TEXT_BASE) \
ifneq ($(OBJTREE),$(SRCTREE))
CPPFLAGS += -I$(OBJTREE)/include2 -I$(OBJTREE)/include
diff --git a/cleopatre/u-boot-1.1.6/cpincludes.mk b/cleopatre/u-boot-1.1.6/cpincludes.mk
index 28ca59ab1a..aadf26a954 100644
--- a/cleopatre/u-boot-1.1.6/cpincludes.mk
+++ b/cleopatre/u-boot-1.1.6/cpincludes.mk
@@ -2,6 +2,5 @@ UBOOT_INC=$(SRCTREE)/include/asm-arm/arch-spc300
COMMON_INC=$(SRCTREE)/../../common/include/asm/arch
cpincludes:
- rm -rf $(UBOOT_INC)/ips
- cp -r $(COMMON_INC)/ips $(UBOOT_INC)
+ cp -r $(COMMON_INC)/* $(UBOOT_INC)
diff --git a/cleopatre/u-boot-1.1.6/cpu/spc300/wdt.c b/cleopatre/u-boot-1.1.6/cpu/spc300/wdt.c
index afaf83691a..75b5ee63cc 100644
--- a/cleopatre/u-boot-1.1.6/cpu/spc300/wdt.c
+++ b/cleopatre/u-boot-1.1.6/cpu/spc300/wdt.c
@@ -22,7 +22,7 @@
#include <common.h>
#include <config.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/ips/wdt.h>
+#include <asm/arch/wdt.h>
#include <asm/arch/nvram.h>
/**
diff --git a/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/.gitignore b/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/.gitignore
index 4119d58772..8438030f86 100644
--- a/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/.gitignore
+++ b/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/.gitignore
@@ -1,3 +1,20 @@
+debug-macro.S
+dma.h
+entry-macro.S
+gpio.h
+hardware.h
+io.h
+irqs.h
+memory.h
+nvram.h
+platform.h
+serial.h
+spid_img_desc.h
+system.h
+timex.h
+uncompress.h
+wdt.h
+
ips/arizona.h
ips/gic.h
ips/gpio.h
diff --git a/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/hardware.h b/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/hardware.h
deleted file mode 100644
index 7b421268f1..0000000000
--- a/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/hardware.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * include/asm-arm/arch-spc300/hardware.h
- *
- * Copyright (C) 2009 SPiDCOM Technologies
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H
-
-
-#include <config.h>
-
-#include "asm/arch/ips/hardware/bus_sys.h"
-
-#endif /* _ASM_ARCH_HARDWARE_H */
-
diff --git a/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/image_desc.h b/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/image_desc.h
deleted file mode 100644
index a7c060107d..0000000000
--- a/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/image_desc.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * include/asm-arm/arch-spc300/image_desc.h
- *
- * Copyright (C) 2009 SPiDCOM Technologies
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __ASM_ARCH_IMAGE_DESC_H
-#define __ASM_ARCH_IMAGE_DESC_H
-
-#include <stddef.h>
-
-#define SPIDCOM_IMG_DESC_MTD_NAME_0 "/dev/mtd3"
-#define SPIDCOM_IMG_DESC_MTD_NAME_1 "/dev/mtd4"
-
-#define SPIDCOM_IMG_DESC_SPC300 0x00
-#define SPIDCOM_IMG_DESC_UNKNOWN 0x01
-
-#define SPIDCOM_IMG_DESC_MAGIC "SPIDIMG\0"
-#define SPIDCOM_IMG_DESC_SIZE 1024
-
-#define SPIDCOM_IMG_DESC_INVALID_INDEX 0x7fffffff
-#define SPIDCOM_IMG_DESC_ORIGIN_INDEX 0xffffffff
-
-#define SPIDCOM_IMG_DESC_NORMAL_TYPE 0x0
-
-#define SPIDCOM_IMG_DESC_PLC_RAM 0x400000 /* 4M */
-
-#define SPIDCOM_IMG_DESC_IS_VALID(desc) ( !memcmp((desc)->magic, SPIDCOM_IMG_DESC_MAGIC, 8) && \
- (desc)->is_valid && \
- ( (desc)->index != SPIDCOM_IMG_DESC_INVALID_INDEX ) )
-
-/* /!\ All values are LITTLE-ENDIAN */
-typedef struct {
- char magic[8]; /* Magic number = "SPIDIMG\0"
- * = { 0x53, 0x50, 0x49, 0x44,
- * 0x49, 0x4d, 0x47, 0x00 } */
- uint32_t index; /* The biggest one is the image to boot */
- uint32_t is_valid:1; /* Is image valid (bootable ?) */
- uint32_t is_1st_boot:1; /* Is first image boot ? */
- uint32_t is_not_success:1; /* Is first boot successful ? */
- uint32_t is_not_update:1; /* Is update process finished correctly? */
- uint32_t size; /* Firmware size (descriptor included) */
- uint32_t type; /* Image type : 0 is normal image */
- uint8_t md5_sum[16]; /* MD5 checksum of the whole firmware */
- char version[16]; /* Image version string */
- char description[64]; /* Image description string */
- uint32_t arch; /* spc300 or unknown */
- uint32_t plc_ram; /* RAM size needed for the PLC processor */
- char reserved[900];
- char image[0]; /* Used in bootloader to mark beging of the payload */
-} spidcom_image_desc_t;
-
-#endif /* __ASM_ARCH_IMAGE_DESC_H */
diff --git a/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/nvram.h b/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/nvram.h
deleted file mode 100644
index 210a616304..0000000000
--- a/cleopatre/u-boot-1.1.6/include/asm-arm/arch-spc300/nvram.h
+++ /dev/null
@@ -1,236 +0,0 @@
-/*
- * include/asm-arm/arch-spc300/nvram.h
- *
- * Copyright (C) 2009 SPiDCOM Technologies
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __ASM_ARCH_SPC300_NVRAM_H
-#define __ASM_ARCH_SPC300_NVRAM_H
-
-// Offset fields
-#define NVRAM_MAGIC_OFFSET 0x0
-#define NVRAM_PKG_CFG_OFFSET 0x8
-#define NVRAM_GPIO_0_7_CFG_OFFSET 0xC
-#define NVRAM_GPIO_8_15_CFG_OFFSET 0x10
-#define NVRAM_GPIO_ALLOW_DIR_OFFSET 0x14
-#define NVRAM_SDRAM_CONFIG_OFFSET 0x18
-#define NVRAM_SDRAM_TIMING0_OFFSET 0x1C
-#define NVRAM_SDRAM_TIMING1_OFFSET 0x20
-#define NVRAM_SDRAM_REFRESH_OFFSET 0x24
-#define NVRAM_MIU_CONFIG_OFFSET 0x18
-#define NVRAM_MIU_RAM_SIZE_OFFSET 0x1C
-#define NVRAM_FLASH_ORG_OFFSET 0x28
-#define NVRAM_IMG_0_OFFSET_OFFSET 0x2C
-#define NVRAM_NB_IMAGES_OFFSET 0x30
-#define NVRAM_PRODUCT_NAME_OFFSET 0x34
-#define NVRAM_PRODUCT_PARTNB_OFFSET 0x74
-#define NVRAM_PRODUCT_DESC_OFFSET 0xB4
-#define NVRAM_SERIAL_NUMBER_OFFSET 0x134
-#define NVRAM_ETH_PHY_ADDR_OFFSET 0x174
-#define NVRAM_ETH_ADDRESS_OFFSET 0x178
-#define NVRAM_RESERVED1_OFFSET 0x17E
-#define NVRAM_PLC_ADDRESS_OFFSET 0x180
-#define NVRAM_RESERVED2_OFFSET 0x186
-#define NVRAM_DEVICE_PASSWORD_OFFSET 0x188
-#define NVRAM_OEM_INFO_OFFSET 0x1A8
-#define NVRAM_TONEMASK_OFFSET 0x1E8
-#define NVRAM_MANUFACTORY_INFO_OFFSET 0x2A8
-#define NVRAM_IMG_MAX_SIZE_OFFSET 0x2E8
-#define NVRAM_CPU_PARTNB_OFFSET 0x2EC
-#define NVRAM_DYNAMIC_OFFSET 0x2F0
-
-#define SPC300_NVRAM_MAGIC "NVRAM\0\0\0"
-
-// Bitfields for pkg_cfg
-#define NVRAM_XCLK_SHIFT 0
-#define NVRAM_XCLK_MASK 0x3
-#define NVRAM_FREQ_SHIFT 2
-#define NVRAM_FREQ_MASK 0x3
-#define NVRAM_PIO_SHIFT 4
-#define NVRAM_PIO_MASK 0xF
-#define NVRAM_ETH_MODE_SHIFT 8
-#define NVRAM_ETH_MODE_MASK 0x3
-
-// Values for pkg_cfg
-#define NVRAM_XCLK_1875 0
-#define NVRAM_XCLK_25 1
-#define NVRAM_XCLK_375 2
-#define NVRAM_FREQ_100 0
-#define NVRAM_FREQ_125 1
-#define NVRAM_FREQ_133 2
-#define NVRAM_FREQ_150 3
-#define NVRAM_ETH_MODE_MII 0
-#define NVRAM_ETH_MODE_RMII 1
-#define NVRAM_ETH_MODE_GMII 2
-
-#define NVRAM_GPIO_SHIFT 4
-#define NVRAM_GPIO_MASK 0xF
-// Bitfields for gpio 0 to gpio 7
-#define NVRAM_GPIO_0_SHIFT 0
-#define NVRAM_GPIO_0_MASK 0xF
-#define NVRAM_GPIO_1_SHIFT 4
-#define NVRAM_GPIO_1_MASK 0xF
-#define NVRAM_GPIO_2_SHIFT 8
-#define NVRAM_GPIO_2_MASK 0xF
-#define NVRAM_GPIO_3_SHIFT 12
-#define NVRAM_GPIO_3_MASK 0xF
-#define NVRAM_GPIO_4_SHIFT 16
-#define NVRAM_GPIO_4_MASK 0xF
-#define NVRAM_GPIO_5_SHIFT 20
-#define NVRAM_GPIO_5_MASK 0xF
-#define NVRAM_GPIO_6_SHIFT 24
-#define NVRAM_GPIO_6_MASK 0xF
-#define NVRAM_GPIO_7_SHIFT 28
-#define NVRAM_GPIO_7_MASK 0xF
-
-// Bitfields for gpio 8 to gpio 15
-#define NVRAM_GPIO_8_SHIFT 0
-#define NVRAM_GPIO_8_MASK 0xF
-#define NVRAM_GPIO_9_SHIFT 4
-#define NVRAM_GPIO_9_MASK 0xF
-#define NVRAM_GPIO_10_SHIFT 8
-#define NVRAM_GPIO_10_MASK 0xF
-#define NVRAM_GPIO_11_SHIFT 12
-#define NVRAM_GPIO_11_MASK 0xF
-#define NVRAM_GPIO_12_SHIFT 16
-#define NVRAM_GPIO_12_MASK 0xF
-#define NVRAM_GPIO_13_SHIFT 20
-#define NVRAM_GPIO_13_MASK 0xF
-#define NVRAM_GPIO_14_SHIFT 24
-#define NVRAM_GPIO_14_MASK 0xF
-#define NVRAM_GPIO_15_SHIFT 28
-#define NVRAM_GPIO_15_MASK 0xF
-
-// Bitfields for gpio allowed direction
-#define NVRAM_GPIO_DIR_0_SHIFT 0
-#define NVRAM_GPIO_DIR_0_MASK 0x3
-#define NVRAM_GPIO_DIR_1_SHIFT 2
-#define NVRAM_GPIO_DIR_1_MASK 0x3
-#define NVRAM_GPIO_DIR_2_SHIFT 4
-#define NVRAM_GPIO_DIR_2_MASK 0x3
-#define NVRAM_GPIO_DIR_3_SHIFT 6
-#define NVRAM_GPIO_DIR_3_MASK 0x3
-#define NVRAM_GPIO_DIR_4_SHIFT 8
-#define NVRAM_GPIO_DIR_4_MASK 0x3
-#define NVRAM_GPIO_DIR_5_SHIFT 10
-#define NVRAM_GPIO_DIR_5_MASK 0x3
-#define NVRAM_GPIO_DIR_6_SHIFT 12
-#define NVRAM_GPIO_DIR_6_MASK 0x3
-#define NVRAM_GPIO_DIR_7_SHIFT 14
-#define NVRAM_GPIO_DIR_7_MASK 0x3
-#define NVRAM_GPIO_DIR_8_SHIFT 16
-#define NVRAM_GPIO_DIR_8_MASK 0x3
-#define NVRAM_GPIO_DIR_9_SHIFT 18
-#define NVRAM_GPIO_DIR_9_MASK 0x3
-#define NVRAM_GPIO_DIR_10_SHIFT 20
-#define NVRAM_GPIO_DIR_10_MASK 0x3
-#define NVRAM_GPIO_DIR_11_SHIFT 22
-#define NVRAM_GPIO_DIR_11_MASK 0x3
-#define NVRAM_GPIO_DIR_12_SHIFT 24
-#define NVRAM_GPIO_DIR_12_MASK 0x3
-#define NVRAM_GPIO_DIR_13_SHIFT 26
-#define NVRAM_GPIO_DIR_13_MASK 0x3
-#define NVRAM_GPIO_DIR_14_SHIFT 28
-#define NVRAM_GPIO_DIR_14_MASK 0x3
-#define NVRAM_GPIO_DIR_15_SHIFT 30
-#define NVRAM_GPIO_DIR_15_MASK 0x3
-
-// Values for gpio allowed direction
-#define NVRAM_GPIO_DIR_NONE 0
-#define NVRAM_GPIO_DIR_IN 1
-#define NVRAM_GPIO_DIR_OUT 2
-#define NVRAM_GPIO_DIR_ALL 3
-
-// Bitfields for flash organization
-#define NVRAM_FLASH_NB_SECT_SHIFT 0
-#define NVRAM_FLASH_NB_SECT_MASK 0xF
-#define NVRAM_FLASH_SECT_SZ_SHIFT 4
-#define NVRAM_FLASH_SECT_SZ_MASK 0xF
-
-// Values for flash organization
-#define NVRAM_FLASH_1_SECT 0
-#define NVRAM_FLASH_2_SECT 1
-#define NVRAM_FLASH_4_SECT 2
-#define NVRAM_FLASH_8_SECT 3
-#define NVRAM_FLASH_16_SECT 4
-#define NVRAM_FLASH_32_SECT 5
-#define NVRAM_FLASH_64_SECT 6
-#define NVRAM_FLASH_128_SECT 7
-#define NVRAM_FLASH_256_SECT 8
-#define NVRAM_FLASH_512_SECT 9
-#define NVRAM_FLASH_SECT_64 0
-#define NVRAM_FLASH_SECT_128 1
-#define NVRAM_FLASH_SECT_256 2
-
-
-#ifndef __ASSEMBLY__
-/* /!\ All values are LITTLE-ENDIAN */
-typedef struct
-{
- char magic[8]; // Magic number "NVRAM\0\0\0"
- uint32_t pkg_cfg; // SPC300 package configuration register
- uint32_t gpio_0_7_cfg; // SPC300 GPIO 0 to 7 configuration register
- uint32_t gpio_8_15_cfg; // SPC300 GPIO 8 to 15 configuration register
- uint32_t gpio_allow_dir; // SPC300 GPIO allowed direction 0:none 1:in 2:out 3:bi
- union {
- struct {
- uint32_t config; // SPC300 SDRAM configuration register
- uint32_t timing0; // SPC300 SDRAM timing register 0
- uint32_t timing1; // SPC300 SDRAM timing register 1
- uint32_t refresh; // SPC300 SDRAM refresh register
- } sdram;
- struct {
- uint16_t config_offset; // Offset of MIU config in nvram
- uint16_t config_size; // Size of MIU config in words
- uint32_t ram_size; // Size of MIU connected RAM in bytes
- uint32_t reserved[2];
- } miu;
- } dram;
- uint32_t flash_org; // Flash organization
- uint32_t img_0_offset; // Offset of first image address
- uint32_t nb_images; // Max Number of Images present in flash
- char product_name[64]; // Product short name in string format
- char product_partnb[64]; // Product part number in string format
- char product_desc[128]; // Product long description in string format
- char serial_number[64]; // Product serial number in string format
- uint32_t eth_phy_addr; // Address of Ethernet PHY
- unsigned char eth_address[6]; // Ethernet MAC address
- unsigned char reserved1[2];
- unsigned char plc_address[6]; // PowerLine MAC address
- unsigned char reserved2[2];
- char device_password[32]; // HomePlugAV device unique password (DPW)
- char oem_info[64]; // Additional information for OEM
- unsigned char tonemask[192]; // HomePlugAV tonemask
- char manufactory_info[64]; // Name of the product manufacturer
- uint32_t img_max_size; // Max size of an image in flash
- uint32_t cpu_partnb; // SPC3x0 partnb
- uint32_t dynamic[256]; // Dynamic data (see miu_config)
-} spc300_nvram_t; //Currently __attribute__((packed)) not needed
-
-// Bit manipulation macros
-#define NVRAM_BIT(name) \
- (1 << NVRAM_##name##_SHIFT)
-#define NVRAM_BF(name,value) \
- (((value) & (NVRAM_##name##_MASK)) << NVRAM_##name##_SHIFT)
-#define NVRAM_BFEXT(name,value) \
- (((value) >> NVRAM_##name##_SHIFT) & (NVRAM_##name##_MASK))
-#define NVRAM_BFINS(name,value,old) \
- ( ((old) & ~((NVRAM_##name##_MASK) << NVRAM_##name##_SHIFT)) \
- | NVRAM_BF(name,value))
-#endif
-#endif /* __ASM_ARCH_SPC300_NVRAM_H */
diff --git a/cleopatre/u-boot-1.1.6/net/spidupd.c b/cleopatre/u-boot-1.1.6/net/spidupd.c
index ef0c2cc72a..812bc3aa9c 100644
--- a/cleopatre/u-boot-1.1.6/net/spidupd.c
+++ b/cleopatre/u-boot-1.1.6/net/spidupd.c
@@ -26,7 +26,7 @@
#include <command.h>
#include <net.h>
#include <md5.h>
-#include <asm/arch/image_desc.h>
+#include <asm/arch/spid_img_desc.h>
#include <asm/arch/nvram.h>
#include "spidupd.h"
diff --git a/common/include/asm/arch/hardware.h b/common/include/asm/arch/hardware.h
index 44f58bedfa..03f9e4648d 100644
--- a/common/include/asm/arch/hardware.h
+++ b/common/include/asm/arch/hardware.h
@@ -21,6 +21,9 @@
#define __ASM_ARCH_HARDWARE_H
#include <asm/arch/ips/ips_access.h>
+
+#ifdef LINUX_COMPILE
#include <asm/arch/platform.h>
+#endif /* LINUX_COMPILE */
#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/common/include/asm/arch/ips/wdt.h b/common/include/asm/arch/ips/wdt.h
index d3eb59bd57..d4f574bfb0 100644
--- a/common/include/asm/arch/ips/wdt.h
+++ b/common/include/asm/arch/ips/wdt.h
@@ -84,7 +84,4 @@
( ((old) & ~(((1 << WDT_##name##_SIZE) - 1) << WDT_##name##_SHIFT)) \
| WDT_BF(name,value))
-#define WDT_DEFAULT_TIME 5 //seconds
-#define WDT_MAX_TIME 21 //seconds
-
#endif /* __ASM_ARCH_IPS_WDT_H */
diff --git a/common/include/asm/arch/nvram.h b/common/include/asm/arch/nvram.h
index 1b46f6e213..629aa5cc7f 100644
--- a/common/include/asm/arch/nvram.h
+++ b/common/include/asm/arch/nvram.h
@@ -31,6 +31,8 @@
MAX_INTERNAL_GPIOS : MIN_INTERNAL_GPIOS)
#define spc300_gpio_direction(gpio_allow_dir,num) ((gpio_allow_dir >> (num * 2)) & 0x3)
+#ifndef __ASSEMBLY__
+
enum spc300_gpio_direction_t
{
SPC300_GPIO_DIRECTION_NONE = 0,
@@ -131,6 +133,173 @@ static inline void spc300_nvram_copy(void* dst, void* src, unsigned int length)
}
}
}
-#endif
+#endif /* __KERNEL__ */
+
+#endif /* __ASSEMBLY__ */
+
+/* Offset fields. */
+#define NVRAM_MAGIC_OFFSET 0x0
+#define NVRAM_PKG_CFG_OFFSET 0x8
+#define NVRAM_GPIO_0_7_CFG_OFFSET 0xC
+#define NVRAM_GPIO_8_15_CFG_OFFSET 0x10
+#define NVRAM_GPIO_ALLOW_DIR_OFFSET 0x14
+#define NVRAM_SDRAM_CONFIG_OFFSET 0x18
+#define NVRAM_SDRAM_TIMING0_OFFSET 0x1C
+#define NVRAM_SDRAM_TIMING1_OFFSET 0x20
+#define NVRAM_SDRAM_REFRESH_OFFSET 0x24
+#define NVRAM_MIU_CONFIG_OFFSET 0x18
+#define NVRAM_MIU_RAM_SIZE_OFFSET 0x1C
+#define NVRAM_FLASH_ORG_OFFSET 0x28
+#define NVRAM_IMG_0_OFFSET_OFFSET 0x2C
+#define NVRAM_NB_IMAGES_OFFSET 0x30
+#define NVRAM_PRODUCT_NAME_OFFSET 0x34
+#define NVRAM_PRODUCT_PARTNB_OFFSET 0x74
+#define NVRAM_PRODUCT_DESC_OFFSET 0xB4
+#define NVRAM_SERIAL_NUMBER_OFFSET 0x134
+#define NVRAM_ETH_PHY_ADDR_OFFSET 0x174
+#define NVRAM_ETH_ADDRESS_OFFSET 0x178
+#define NVRAM_ETH_PORT_NB_OFFSET 0x17E
+#define NVRAM_RESERVED1_OFFSET 0x17F
+#define NVRAM_PLC_ADDRESS_OFFSET 0x180
+#define NVRAM_RESERVED2_OFFSET 0x186
+#define NVRAM_DEVICE_PASSWORD_OFFSET 0x188
+#define NVRAM_OEM_INFO_OFFSET 0x1A8
+#define NVRAM_TONEMASK_OFFSET 0x1E8
+#define NVRAM_MANUFACTORY_INFO_OFFSET 0x2A8
+#define NVRAM_IMG_MAX_SIZE_OFFSET 0x2E8
+#define NVRAM_CPU_PARTNB_OFFSET 0x2EC
+#define NVRAM_DYNAMIC_OFFSET 0x2F0
+
+/* Bitfields for pkg_cfg. */
+#define NVRAM_XCLK_SHIFT 0
+#define NVRAM_XCLK_MASK 0x3
+#define NVRAM_FREQ_SHIFT 2
+#define NVRAM_FREQ_MASK 0x3
+#define NVRAM_PIO_SHIFT 4
+#define NVRAM_PIO_MASK 0xF
+#define NVRAM_ETH_MODE_SHIFT 8
+#define NVRAM_ETH_MODE_MASK 0x3
+
+/* Values for pkg_cfg. */
+#define NVRAM_XCLK_1875 0
+#define NVRAM_XCLK_25 1
+#define NVRAM_XCLK_375 2
+#define NVRAM_FREQ_100 0
+#define NVRAM_FREQ_125 1
+#define NVRAM_FREQ_133 2
+#define NVRAM_FREQ_150 3
+#define NVRAM_ETH_MODE_MII 0
+#define NVRAM_ETH_MODE_RMII 1
+#define NVRAM_ETH_MODE_GMII 2
+
+#define NVRAM_GPIO_SHIFT 4
+#define NVRAM_GPIO_MASK 0xF
+/* Bitfields for gpio 0 to gpio 7. */
+#define NVRAM_GPIO_0_SHIFT 0
+#define NVRAM_GPIO_0_MASK 0xF
+#define NVRAM_GPIO_1_SHIFT 4
+#define NVRAM_GPIO_1_MASK 0xF
+#define NVRAM_GPIO_2_SHIFT 8
+#define NVRAM_GPIO_2_MASK 0xF
+#define NVRAM_GPIO_3_SHIFT 12
+#define NVRAM_GPIO_3_MASK 0xF
+#define NVRAM_GPIO_4_SHIFT 16
+#define NVRAM_GPIO_4_MASK 0xF
+#define NVRAM_GPIO_5_SHIFT 20
+#define NVRAM_GPIO_5_MASK 0xF
+#define NVRAM_GPIO_6_SHIFT 24
+#define NVRAM_GPIO_6_MASK 0xF
+#define NVRAM_GPIO_7_SHIFT 28
+#define NVRAM_GPIO_7_MASK 0xF
+
+/* Bitfields for gpio 8 to gpio 15. */
+#define NVRAM_GPIO_8_SHIFT 0
+#define NVRAM_GPIO_8_MASK 0xF
+#define NVRAM_GPIO_9_SHIFT 4
+#define NVRAM_GPIO_9_MASK 0xF
+#define NVRAM_GPIO_10_SHIFT 8
+#define NVRAM_GPIO_10_MASK 0xF
+#define NVRAM_GPIO_11_SHIFT 12
+#define NVRAM_GPIO_11_MASK 0xF
+#define NVRAM_GPIO_12_SHIFT 16
+#define NVRAM_GPIO_12_MASK 0xF
+#define NVRAM_GPIO_13_SHIFT 20
+#define NVRAM_GPIO_13_MASK 0xF
+#define NVRAM_GPIO_14_SHIFT 24
+#define NVRAM_GPIO_14_MASK 0xF
+#define NVRAM_GPIO_15_SHIFT 28
+#define NVRAM_GPIO_15_MASK 0xF
+
+/* Bitfields for gpio allowed direction. */
+#define NVRAM_GPIO_DIR_0_SHIFT 0
+#define NVRAM_GPIO_DIR_0_MASK 0x3
+#define NVRAM_GPIO_DIR_1_SHIFT 2
+#define NVRAM_GPIO_DIR_1_MASK 0x3
+#define NVRAM_GPIO_DIR_2_SHIFT 4
+#define NVRAM_GPIO_DIR_2_MASK 0x3
+#define NVRAM_GPIO_DIR_3_SHIFT 6
+#define NVRAM_GPIO_DIR_3_MASK 0x3
+#define NVRAM_GPIO_DIR_4_SHIFT 8
+#define NVRAM_GPIO_DIR_4_MASK 0x3
+#define NVRAM_GPIO_DIR_5_SHIFT 10
+#define NVRAM_GPIO_DIR_5_MASK 0x3
+#define NVRAM_GPIO_DIR_6_SHIFT 12
+#define NVRAM_GPIO_DIR_6_MASK 0x3
+#define NVRAM_GPIO_DIR_7_SHIFT 14
+#define NVRAM_GPIO_DIR_7_MASK 0x3
+#define NVRAM_GPIO_DIR_8_SHIFT 16
+#define NVRAM_GPIO_DIR_8_MASK 0x3
+#define NVRAM_GPIO_DIR_9_SHIFT 18
+#define NVRAM_GPIO_DIR_9_MASK 0x3
+#define NVRAM_GPIO_DIR_10_SHIFT 20
+#define NVRAM_GPIO_DIR_10_MASK 0x3
+#define NVRAM_GPIO_DIR_11_SHIFT 22
+#define NVRAM_GPIO_DIR_11_MASK 0x3
+#define NVRAM_GPIO_DIR_12_SHIFT 24
+#define NVRAM_GPIO_DIR_12_MASK 0x3
+#define NVRAM_GPIO_DIR_13_SHIFT 26
+#define NVRAM_GPIO_DIR_13_MASK 0x3
+#define NVRAM_GPIO_DIR_14_SHIFT 28
+#define NVRAM_GPIO_DIR_14_MASK 0x3
+#define NVRAM_GPIO_DIR_15_SHIFT 30
+#define NVRAM_GPIO_DIR_15_MASK 0x3
+
+/* Values for gpio allowed direction. */
+#define NVRAM_GPIO_DIR_NONE 0
+#define NVRAM_GPIO_DIR_IN 1
+#define NVRAM_GPIO_DIR_OUT 2
+#define NVRAM_GPIO_DIR_ALL 3
+
+/* Bitfields for flash organization. */
+#define NVRAM_FLASH_NB_SECT_SHIFT 0
+#define NVRAM_FLASH_NB_SECT_MASK 0xF
+#define NVRAM_FLASH_SECT_SZ_SHIFT 4
+#define NVRAM_FLASH_SECT_SZ_MASK 0xF
+
+/* Values for flash organization. */
+#define NVRAM_FLASH_1_SECT 0
+#define NVRAM_FLASH_2_SECT 1
+#define NVRAM_FLASH_4_SECT 2
+#define NVRAM_FLASH_8_SECT 3
+#define NVRAM_FLASH_16_SECT 4
+#define NVRAM_FLASH_32_SECT 5
+#define NVRAM_FLASH_64_SECT 6
+#define NVRAM_FLASH_128_SECT 7
+#define NVRAM_FLASH_256_SECT 8
+#define NVRAM_FLASH_512_SECT 9
+#define NVRAM_FLASH_SECT_64 0
+#define NVRAM_FLASH_SECT_128 1
+#define NVRAM_FLASH_SECT_256 2
+
+/* Bit manipulation macros. */
+#define NVRAM_BIT(name) \
+ (1 << NVRAM_##name##_SHIFT)
+#define NVRAM_BF(name,value) \
+ (((value) & (NVRAM_##name##_MASK)) << NVRAM_##name##_SHIFT)
+#define NVRAM_BFEXT(name,value) \
+ (((value) >> NVRAM_##name##_SHIFT) & (NVRAM_##name##_MASK))
+#define NVRAM_BFINS(name,value,old) \
+ ( ((old) & ~((NVRAM_##name##_MASK) << NVRAM_##name##_SHIFT)) \
+ | NVRAM_BF(name,value))
#endif /* __ASM_ARCH_NVRAM_H */
diff --git a/common/include/asm/arch/spid_img_desc.h b/common/include/asm/arch/spid_img_desc.h
index 91cec6d21c..2184fcc53b 100644
--- a/common/include/asm/arch/spid_img_desc.h
+++ b/common/include/asm/arch/spid_img_desc.h
@@ -20,7 +20,9 @@
#ifndef __ASM_ARCH_SPID_IMG_DESC_H
#define __ASM_ARCH_SPID_IMG_DESC_H
+#ifndef __KERNEL__
#include <stdint.h>
+#endif /* __KERNEL__ */
#define SPIDCOM_IMG_DESC_MTD_NAME_0 "image 0"
#define SPIDCOM_IMG_DESC_MTD_NAME_1 "image 1"