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authorCyril Jourdan2012-03-08 08:39:19 +0100
committerYacine Belkadi2012-06-11 13:40:05 +0200
commit37e54c3ba7d91ab0581e7e315c6412327ebb71c0 (patch)
tree60a390a922ab82089870d4e66eeb531a543c27ff /polux/linux-2.6.10
parent5b2c762e9b1e90fb3bfd1364b308058e15e06342 (diff)
polux/linux/inc/asm/arm/spc300: adapt GIC defs and macros, refs #3010
- define registers as 64 bits - create macros to access to needed registers
Diffstat (limited to 'polux/linux-2.6.10')
-rw-r--r--polux/linux-2.6.10/include/asm-arm/arch-mse500/spc300/hardware/gic.h30
1 files changed, 23 insertions, 7 deletions
diff --git a/polux/linux-2.6.10/include/asm-arm/arch-mse500/spc300/hardware/gic.h b/polux/linux-2.6.10/include/asm-arm/arch-mse500/spc300/hardware/gic.h
index b03c801d03..110ee04338 100644
--- a/polux/linux-2.6.10/include/asm-arm/arch-mse500/spc300/hardware/gic.h
+++ b/polux/linux-2.6.10/include/asm-arm/arch-mse500/spc300/hardware/gic.h
@@ -23,13 +23,13 @@
#include <asm/arch/spc300/hardware.h>
/** Virtual Address for gic */
-#define IRQ_INTEN_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_INTEN_OFFSET)))
-#define IRQ_INTMASK_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_INTMASK_OFFSET)))
-#define IRQ_INTFORCE_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_INTFORCE_OFFSET)))
-#define IRQ_RAWSTATUS_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_RAWSTATUS_OFFSET)))
-#define IRQ_STATUS_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_STATUS_OFFSET)))
-#define IRQ_MASKSTATUS_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_MASKSTATUS_OFFSET)))
-#define IRQ_FINALSTATUS_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_FINALSTATUS_OFFSET)))
+#define IRQ_INTEN_VA (*((volatile uint64_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_INTEN_OFFSET)))
+#define IRQ_INTMASK_VA (*((volatile uint64_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_INTMASK_OFFSET)))
+#define IRQ_INTFORCE_VA (*((volatile uint64_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_INTFORCE_OFFSET)))
+#define IRQ_RAWSTATUS_VA (*((volatile uint64_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_RAWSTATUS_OFFSET)))
+#define IRQ_STATUS_VA (*((volatile uint64_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_STATUS_OFFSET)))
+#define IRQ_MASKSTATUS_VA (*((volatile uint64_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_MASKSTATUS_OFFSET)))
+#define IRQ_FINALSTATUS_VA (*((volatile uint64_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_FINALSTATUS_OFFSET)))
#define FIQ_INTEN_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_ICTL_BASE) + FIQ_INTEN_OFFSET)))
#define FIQ_INTMASK_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_ICTL_BASE) + FIQ_INTMASK_OFFSET)))
#define FIQ_INTFORCE_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_ICTL_BASE) + FIQ_INTFORCE_OFFSET)))
@@ -72,4 +72,20 @@
#define IRQ_P31_ADDR_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_P31_OFFSET)))
#define IRQ_PRIO_ADDR_VA ((volatile uint32_t *)(IO_ADDRESS(ARM_ICTL_BASE) + IRQ_P0_OFFSET))
+
+/** Enable an IT. */
+#define IRQ_ENABLE(num) (IRQ_INTEN_VA |= (uint64_t) (1 << (num)))
+/** Disable an IT. */
+#define IRQ_DISABLE(num) (IRQ_INTEN_VA &= (uint64_t) ~(1 << (num)))
+
+/** Force an IT. */
+#define IRQ_FORCE(num) (IRQ_INTFORCE_VA |= (uint64_t) (1 << (num)))
+/** Clear an IT that has been forced. */
+#define IRQ_FORCE_CLEAR(num) (IRQ_INTFORCE_VA &= (uint64_t) ~(1 << (num)))
+
+/** Get Raw Status for a defined IT. */
+#define IRQ_GET_RAWSTATUS(num) (IRQ_RAWSTATUS_VA & (uint64_t) (1 << (num)) ? 1 : 0)
+/** Get Status for a defined IT. */
+#define IRQ_GET_STATUS(num) (IRQ_STATUS_VA & (uint64_t) (1 << (num)) ? 1 : 0)
+
#endif /* __ASM_ARCH_SPC300_ARM_HW_GIC_H */