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authorJean-Philippe SAVE2012-09-13 11:05:19 +0200
committerCyril Jourdan2012-09-20 16:47:50 +0200
commit871f815ae3c294295bd994e4d01eb6d04259e264 (patch)
tree9d802873ca465bd265b04b576b3ac99184cb402f /common
parente0a000e4b40be71312dfbb1ac4486b5d4749f5f7 (diff)
cleo/{buildroot, linux}: create MSE500 machine, refs #3318
Warning: This commit does not compile, but it will be easier to understand.
Diffstat (limited to 'common')
-rw-r--r--common/include/asm/arch/platform.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/common/include/asm/arch/platform.h b/common/include/asm/arch/platform.h
index 643df06117..7569507cdf 100644
--- a/common/include/asm/arch/platform.h
+++ b/common/include/asm/arch/platform.h
@@ -69,6 +69,20 @@ extern uint32_t spc300_plc_mem_size;
#define TIMER_CLK (3125000)
#define UART_CLK (PCLK)
+#elif defined (CONFIG_CHIP_MSE500)
+
+#define SDRAM_BASE 0x40000000
+
+#define PLCCODE_MAX_SIZE SZ_16M /* 0xF0000000 - 0xEF000000 which is VIRT_IO_ADDR_BASE - VIRT_PLCCODE_BASE */
+#define VIRT_PLCCODE_BASE (0xEF000000)
+
+#define CLK_AHB (246000000)
+#define CLK_ARM (CLK_AHB*2)
+#define PCLK (CLK_AHB)
+#define TIMER_CLK (4000000)
+#define UART_CLK (PCLK)
+#define PLC_SYSCLOCK_MHZ (CLK_AHB/1000000)
+
#elif defined (CONFIG_CHIP_MSE500DINI_300)
#define SDRAM_BASE 0x40000000