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authorJean-Philippe SAVE2012-09-13 11:57:44 +0200
committerCyril Jourdan2012-09-20 16:59:51 +0200
commite808cee9685a90795081abc7bb8c6bd67f2e131b (patch)
tree40b3c5b7772f848d09dd667dadecb712384a3323 /common/tools
parentbf91571a43415117a523ee2b542c06d8b5e524a9 (diff)
common/tools/genNVRAM: move IOMUX and MIU configs to own .h, refs #3318
Diffstat (limited to 'common/tools')
-rw-r--r--common/tools/genNVRAM/genNVRAM.c186
-rw-r--r--common/tools/genNVRAM/iomux_cfg.h63
-rw-r--r--common/tools/genNVRAM/miu_cfg.h169
3 files changed, 237 insertions, 181 deletions
diff --git a/common/tools/genNVRAM/genNVRAM.c b/common/tools/genNVRAM/genNVRAM.c
index b4edfa4e16..9ea6588968 100644
--- a/common/tools/genNVRAM/genNVRAM.c
+++ b/common/tools/genNVRAM/genNVRAM.c
@@ -39,6 +39,9 @@
/* Include NVRAM structure file. */
#include <nvram.h>
+#include "iomux_cfg.h"
+#include "miu_cfg.h"
+
/* Common default values. */
#define DEFAULT_PKG_CFG 0x0000024e
#define DEFAULT_GPIO_0_7_CFG 0x11331111
@@ -224,50 +227,13 @@ static enum
IO_IOMUX,
} io = IO_NOINIT;
-/*
- * IOMUX configurations: triplet of offset, value, mask, where offset is
- * relative to IOMUX_BASE.
- */
-
-uint32_t iomux_config_bringup[] =
-{
- 0x00000000, 0x0000, 0xFFFF,
- 0x00000050, 0x1025, 0x1477,
- 0x00000080, 0x0500, 0x0F00,
- 0x00000084, 0x0002, 0x0002,
- 0x0000003C, 0x0004, 0x0004,
- 0x00000048, 0x000F, 0x000F,
- (uint32_t)-1
-};
-
-uint32_t iomux_config_bringup_uart_leon[] =
-{
- 0x00000000, 0x0000, 0xFFFF,
- 0x00000050, 0x1025, 0x1477,
- 0x00000080, 0x0500, 0x0F00,
- 0x00000084, 0x0002, 0x0002,
- 0x0000003C, 0x0004, 0x0004,
- 0x00000048, 0x0010, 0x0010,
- (uint32_t)-1
-};
-
-uint32_t iomux_config_bringup_dsu_uart_leon[] =
-{
- 0x00000000, 0x0000, 0xFFFF,
- 0x00000050, 0x1025, 0x1477,
- 0x00000080, 0x0500, 0x0F00,
- 0x00000084, 0x0002, 0x0002,
- 0x0000003C, 0x0004, 0x0004,
- 0x00000048, 0x0090, 0x0090,
- (uint32_t)-1
-};
-
struct iomux_config_table_t
{
char *name;
uint32_t *config;
};
+/* See iomux_cfg.h. */
static const struct iomux_config_table_t iomux_config_table[] =
{
{ "bringup", iomux_config_bringup },
@@ -283,149 +249,6 @@ static enum
DRAM_MIU,
} dram = DRAM_NOINIT;
-/*
- * MIU configurations: triplet of offset, value, mask, where offset is
- * relative to MIU_BASE.
- * There are special offsets that are interpreted by uboot as commands,
- * see nvram.h.
- */
-
-uint32_t miu_config_sdram_dini_64m[] =
-{
- 0x00000004, 0x0894, 0xFFFF,
- 0x00000008, 0x0185, 0xFFFF,
- 0x0000000c, 0x0120, 0xFFFF,
- 0x00000020, 0x0031, 0xFFFF,
- 0x000000b4, 0x2000, 0xFFFF,
- 0x0000003c, 0x0c01, 0xFFFF,
- 0x0000003c, 0x0c08, 0xFFFF,
- 0x00000000, 0x0008, 0xFFFF,
- 0x00000000, 0x000c, 0xFFFF,
- 0x00000000, 0x000e, 0xFFFF,
- 0x00000000, 0x000f, 0xFFFF,
- NVRAM_MIU_WAIT_INIT_DONE_CODE_OP, 0, 0,
- (uint32_t)-1
-};
-
-uint32_t miu_config_mt47h32m16[] =
-{
- 0x0000003c, 0x0c01, 0xFFFF,
- 0x0000003c, 0x0c00, 0xFFFF,
- 0x0000008c, 0xFFFE, 0xFFFF,
- 0x00000090, 0xFFFF, 0xFFFF,
- 0x00000094, 0xFFFF, 0xFFFF,
- 0x00000098, 0xFFFF, 0xFFFF,
- 0x0000008c, 0xFFFE, 0xFFFF,
- 0x00010060, 0x8348, 0xFFFF,
- 0x00010064, 0x0014, 0xFFFF,
- 0x00010068, 0x0000, 0xFFFF,
- 0x0001006c, 0x0000, 0xFFFF,
- 0x00010040, 0x0000, 0xFFFF,
- 0x00010010, 0x70ff, 0xFFFF,
- 0x000100fc, 0x0000, 0xFFFF,
- NVRAM_WAIT_CODE_OP, 500, 0,
- 0x00000004, 0x0292, 0xFFFF,
- 0x00000008, 0x008b, 0xFFFF,
- 0x0000000c, 0x1420, 0xFFFF,
- 0x00000010, 0x1066, 0xFFFF,
- 0x00000014, 0x1644, 0xFFFF,
- 0x00000018, 0x7465, 0xFFFF,
- 0x0000001c, 0x204f, 0xFFFF,
- 0x00000020, 0x0a62, 0xFFFF,
- 0x00000024, 0x4004, 0xFFFF,
- 0x00000028, 0x8000, 0xFFFF,
- 0x0000002c, 0xc000, 0xFFFF,
- 0x00010000, 0x0010, 0xFFFF,
- 0x00010070, 0x0033, 0xFFFF,
- 0x00010074, 0x0000, 0xFFFF,
- 0x00010004, 0x0000, 0xFFFF,
- 0x00010008, 0x0000, 0xFFFF,
- 0x00010078, 0x0200, 0xFFFF,
- 0x0001007c, 0x0022, 0xFFFF,
- 0x0001001c, 0x00a7, 0xFFFF,
- 0x000100dc, 0x0055, 0xFFFF,
- 0x000100d0, 0x004f, 0xFFFF,
- 0x000100d4, 0x004f, 0xFFFF,
- 0x000100a8, 0x0000, 0xFFFF,
- 0x0000003c, 0x0c01, 0xFFFF,
- 0x0000003c, 0x0c00, 0xFFFF,
- 0x00010000, 0x0000, 0xFFFF,
- 0x00010004, 0xaaaa, 0xFFFF,
- NVRAM_WAIT_CODE_OP, 1, 0,
- 0x00000000, 0x0000, 0xFFFF,
- 0x00000000, 0x0008, 0xFFFF,
- 0x00000000, 0x000c, 0xFFFF,
- NVRAM_WAIT_CODE_OP, 200, 0,
- 0x00000000, 0x000e, 0xFFFF,
- NVRAM_WAIT_CODE_OP, 500, 0,
- 0x00000000, 0x001f, 0xFFFF,
- NVRAM_MIU_WAIT_INIT_DONE_CODE_OP, 0, 0,
- 0x0000008c, 0x0000, 0xFFFF,
- (uint32_t)-1
-};
-
-uint32_t miu_config_ddr2_16_4x_cl6_800[] =
-{
- 0x0000003c, 0x0c01, 0xFFFF,
- 0x0000003c, 0x0c00, 0xFFFF,
- 0x0000008c, 0xFFFE, 0xFFFF,
- 0x00000090, 0xFFFF, 0xFFFF,
- 0x00000094, 0xFFFF, 0xFFFF,
- 0x00000098, 0xFFFF, 0xFFFF,
- 0x0000008c, 0xFFFE, 0xFFFF,
- 0x00010060, 0x0690, 0xFFFF,
- 0x00010064, 0x0029, 0xFFFF,
- 0x00010068, 0x0100, 0xFFFF,
- 0x0001006c, 0x4000, 0xFFFF,
- 0x00010040, 0x0020, 0xFFFF,
- 0x00010010, 0x70ff, 0xFFFF,
- NVRAM_WAIT_CODE_OP, 500, 0,
- 0x00000004, 0x02a2, 0xFFFF,
- 0x00000008, 0x008b, 0xFFFF,
- 0x0000000c, 0x3420, 0xFFFF,
- 0x00000010, 0x1666, 0xFFFF,
- 0x00000014, 0x1c56, 0xFFFF,
- 0x00000018, 0x6485, 0xFFFF,
- 0x0000001c, 0x204f, 0xFFFF,
- 0x00000020, 0x0a62, 0xFFFF,
- 0x00000024, 0x4004, 0xFFFF,
- 0x00000028, 0x8000, 0xFFFF,
- 0x0000002c, 0xc000, 0xFFFF,
- 0x00010000, 0x0010, 0xFFFF,
- 0x00010070, 0x0033, 0xFFFF,
- 0x00010074, 0x0000, 0xFFFF,
- 0x00010004, 0x0000, 0xFFFF,
- 0x00010008, 0x0000, 0xFFFF,
- 0x00010078, 0x0200, 0xFFFF,
- 0x0001007c, 0x0022, 0xFFFF,
- 0x0001001c, 0x00a7, 0xFFFF,
- 0x000100dc, 0x0077, 0xFFFF,
- 0x000100d0, 0x004f, 0xFFFF,
- 0x000100d4, 0x004f, 0xFFFF,
- 0x000100c0, 0x000c, 0xFFFF,
- 0x000100c0, 0x0008, 0xFFFF,
- 0x000100c4, 0x007f, 0xFFFF,
- 0x000100c8, 0xf200, 0xFFFF,
- 0x000100c0, 0x2378, 0xFFFF,
- 0x000100a8, 0x0000, 0xFFFF,
- 0x0000003c, 0x0c01, 0xFFFF,
- 0x0000003c, 0x0c00, 0xFFFF,
- 0x000100fc, 0x0000, 0xFFFF,
- 0x00010000, 0x0000, 0xFFFF,
- 0x00010004, 0xaaaa, 0xFFFF,
- NVRAM_WAIT_CODE_OP, 1, 0,
- 0x00000000, 0x0000, 0xFFFF,
- 0x00000000, 0x0008, 0xFFFF,
- 0x00000000, 0x000c, 0xFFFF,
- NVRAM_WAIT_CODE_OP, 200, 0,
- 0x00000000, 0x000e, 0xFFFF,
- NVRAM_WAIT_CODE_OP, 500, 0,
- 0x00000000, 0x001f, 0xFFFF,
- NVRAM_MIU_WAIT_INIT_DONE_CODE_OP, 0, 0,
- 0x0000008c, 0x0000, 0xFFFF,
- (uint32_t)-1
-};
-
struct miu_config_table_t
{
char *name;
@@ -433,6 +256,7 @@ struct miu_config_table_t
uint32_t *config;
};
+/* See miu_cfg.h. */
static const struct miu_config_table_t miu_config_table[] =
{
{ "sdram_dini_64m", 64 * 1024 * 1024, miu_config_sdram_dini_64m },
diff --git a/common/tools/genNVRAM/iomux_cfg.h b/common/tools/genNVRAM/iomux_cfg.h
new file mode 100644
index 0000000000..b83787ff45
--- /dev/null
+++ b/common/tools/genNVRAM/iomux_cfg.h
@@ -0,0 +1,63 @@
+/*
+ * common/tools/genNVRAM/iomux_cfg.h
+ *
+ * Copyright (C) 2012 MStar Semiconductor.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
+ */
+#ifndef __IOMUX_CFG_H
+#define __IOMUX_CFG_H
+
+#include <sys/types.h>
+
+/*
+ * IOMUX configurations: triplet of offset, value, mask, where offset is
+ * relative to IOMUX_BASE.
+ */
+
+uint32_t iomux_config_bringup[] =
+{
+ 0x00000000, 0x0000, 0xFFFF,
+ 0x00000050, 0x1025, 0x1477,
+ 0x00000080, 0x0500, 0x0F00,
+ 0x00000084, 0x0002, 0x0002,
+ 0x0000003C, 0x0004, 0x0004,
+ 0x00000048, 0x000F, 0x000F,
+ (uint32_t)-1
+};
+
+uint32_t iomux_config_bringup_uart_leon[] =
+{
+ 0x00000000, 0x0000, 0xFFFF,
+ 0x00000050, 0x1025, 0x1477,
+ 0x00000080, 0x0500, 0x0F00,
+ 0x00000084, 0x0002, 0x0002,
+ 0x0000003C, 0x0004, 0x0004,
+ 0x00000048, 0x0010, 0x0010,
+ (uint32_t)-1
+};
+
+uint32_t iomux_config_bringup_dsu_uart_leon[] =
+{
+ 0x00000000, 0x0000, 0xFFFF,
+ 0x00000050, 0x1025, 0x1477,
+ 0x00000080, 0x0500, 0x0F00,
+ 0x00000084, 0x0002, 0x0002,
+ 0x0000003C, 0x0004, 0x0004,
+ 0x00000048, 0x0090, 0x0090,
+ (uint32_t)-1
+};
+
+#endif /* __IOMUX_CFG_H */
diff --git a/common/tools/genNVRAM/miu_cfg.h b/common/tools/genNVRAM/miu_cfg.h
new file mode 100644
index 0000000000..9fff16cad3
--- /dev/null
+++ b/common/tools/genNVRAM/miu_cfg.h
@@ -0,0 +1,169 @@
+/*
+ * common/tools/genNVRAM/miu_cfg.h
+ *
+ * Copyright (C) 2012 MStar Semiconductor.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
+ */
+#ifndef __MIU_CFG_H
+#define __MIU_CFG_H
+
+#include <sys/types.h>
+#include <nvram.h>
+
+/*
+ * MIU configurations: triplet of offset, value, mask, where offset is
+ * relative to MIU_BASE.
+ * There are special offsets that are interpreted by uboot as commands,
+ * see nvram.h.
+ */
+
+uint32_t miu_config_sdram_dini_64m[] =
+{
+ 0x00000004, 0x0894, 0xFFFF,
+ 0x00000008, 0x0185, 0xFFFF,
+ 0x0000000c, 0x0120, 0xFFFF,
+ 0x00000020, 0x0031, 0xFFFF,
+ 0x000000b4, 0x2000, 0xFFFF,
+ 0x0000003c, 0x0c01, 0xFFFF,
+ 0x0000003c, 0x0c08, 0xFFFF,
+ 0x00000000, 0x0008, 0xFFFF,
+ 0x00000000, 0x000c, 0xFFFF,
+ 0x00000000, 0x000e, 0xFFFF,
+ 0x00000000, 0x000f, 0xFFFF,
+ NVRAM_MIU_WAIT_INIT_DONE_CODE_OP, 0, 0,
+ (uint32_t)-1
+};
+
+uint32_t miu_config_mt47h32m16[] =
+{
+ 0x0000003c, 0x0c01, 0xFFFF,
+ 0x0000003c, 0x0c00, 0xFFFF,
+ 0x0000008c, 0xFFFE, 0xFFFF,
+ 0x00000090, 0xFFFF, 0xFFFF,
+ 0x00000094, 0xFFFF, 0xFFFF,
+ 0x00000098, 0xFFFF, 0xFFFF,
+ 0x0000008c, 0xFFFE, 0xFFFF,
+ 0x00010060, 0x8348, 0xFFFF,
+ 0x00010064, 0x0014, 0xFFFF,
+ 0x00010068, 0x0000, 0xFFFF,
+ 0x0001006c, 0x0000, 0xFFFF,
+ 0x00010040, 0x0000, 0xFFFF,
+ 0x00010010, 0x70ff, 0xFFFF,
+ 0x000100fc, 0x0000, 0xFFFF,
+ NVRAM_WAIT_CODE_OP, 500, 0,
+ 0x00000004, 0x0292, 0xFFFF,
+ 0x00000008, 0x008b, 0xFFFF,
+ 0x0000000c, 0x1420, 0xFFFF,
+ 0x00000010, 0x1066, 0xFFFF,
+ 0x00000014, 0x1644, 0xFFFF,
+ 0x00000018, 0x7465, 0xFFFF,
+ 0x0000001c, 0x204f, 0xFFFF,
+ 0x00000020, 0x0a62, 0xFFFF,
+ 0x00000024, 0x4004, 0xFFFF,
+ 0x00000028, 0x8000, 0xFFFF,
+ 0x0000002c, 0xc000, 0xFFFF,
+ 0x00010000, 0x0010, 0xFFFF,
+ 0x00010070, 0x0033, 0xFFFF,
+ 0x00010074, 0x0000, 0xFFFF,
+ 0x00010004, 0x0000, 0xFFFF,
+ 0x00010008, 0x0000, 0xFFFF,
+ 0x00010078, 0x0200, 0xFFFF,
+ 0x0001007c, 0x0022, 0xFFFF,
+ 0x0001001c, 0x00a7, 0xFFFF,
+ 0x000100dc, 0x0055, 0xFFFF,
+ 0x000100d0, 0x004f, 0xFFFF,
+ 0x000100d4, 0x004f, 0xFFFF,
+ 0x000100a8, 0x0000, 0xFFFF,
+ 0x0000003c, 0x0c01, 0xFFFF,
+ 0x0000003c, 0x0c00, 0xFFFF,
+ 0x00010000, 0x0000, 0xFFFF,
+ 0x00010004, 0xaaaa, 0xFFFF,
+ NVRAM_WAIT_CODE_OP, 1, 0,
+ 0x00000000, 0x0000, 0xFFFF,
+ 0x00000000, 0x0008, 0xFFFF,
+ 0x00000000, 0x000c, 0xFFFF,
+ NVRAM_WAIT_CODE_OP, 200, 0,
+ 0x00000000, 0x000e, 0xFFFF,
+ NVRAM_WAIT_CODE_OP, 500, 0,
+ 0x00000000, 0x001f, 0xFFFF,
+ NVRAM_MIU_WAIT_INIT_DONE_CODE_OP, 0, 0,
+ 0x0000008c, 0x0000, 0xFFFF,
+ (uint32_t)-1
+};
+
+uint32_t miu_config_ddr2_16_4x_cl6_800[] =
+{
+ 0x0000003c, 0x0c01, 0xFFFF,
+ 0x0000003c, 0x0c00, 0xFFFF,
+ 0x0000008c, 0xFFFE, 0xFFFF,
+ 0x00000090, 0xFFFF, 0xFFFF,
+ 0x00000094, 0xFFFF, 0xFFFF,
+ 0x00000098, 0xFFFF, 0xFFFF,
+ 0x0000008c, 0xFFFE, 0xFFFF,
+ 0x00010060, 0x0690, 0xFFFF,
+ 0x00010064, 0x0029, 0xFFFF,
+ 0x00010068, 0x0100, 0xFFFF,
+ 0x0001006c, 0x4000, 0xFFFF,
+ 0x00010040, 0x0020, 0xFFFF,
+ 0x00010010, 0x70ff, 0xFFFF,
+ NVRAM_WAIT_CODE_OP, 500, 0,
+ 0x00000004, 0x02a2, 0xFFFF,
+ 0x00000008, 0x008b, 0xFFFF,
+ 0x0000000c, 0x3420, 0xFFFF,
+ 0x00000010, 0x1666, 0xFFFF,
+ 0x00000014, 0x1c56, 0xFFFF,
+ 0x00000018, 0x6485, 0xFFFF,
+ 0x0000001c, 0x204f, 0xFFFF,
+ 0x00000020, 0x0a62, 0xFFFF,
+ 0x00000024, 0x4004, 0xFFFF,
+ 0x00000028, 0x8000, 0xFFFF,
+ 0x0000002c, 0xc000, 0xFFFF,
+ 0x00010000, 0x0010, 0xFFFF,
+ 0x00010070, 0x0033, 0xFFFF,
+ 0x00010074, 0x0000, 0xFFFF,
+ 0x00010004, 0x0000, 0xFFFF,
+ 0x00010008, 0x0000, 0xFFFF,
+ 0x00010078, 0x0200, 0xFFFF,
+ 0x0001007c, 0x0022, 0xFFFF,
+ 0x0001001c, 0x00a7, 0xFFFF,
+ 0x000100dc, 0x0077, 0xFFFF,
+ 0x000100d0, 0x004f, 0xFFFF,
+ 0x000100d4, 0x004f, 0xFFFF,
+ 0x000100c0, 0x000c, 0xFFFF,
+ 0x000100c0, 0x0008, 0xFFFF,
+ 0x000100c4, 0x007f, 0xFFFF,
+ 0x000100c8, 0xf200, 0xFFFF,
+ 0x000100c0, 0x2378, 0xFFFF,
+ 0x000100a8, 0x0000, 0xFFFF,
+ 0x0000003c, 0x0c01, 0xFFFF,
+ 0x0000003c, 0x0c00, 0xFFFF,
+ 0x000100fc, 0x0000, 0xFFFF,
+ 0x00010000, 0x0000, 0xFFFF,
+ 0x00010004, 0xaaaa, 0xFFFF,
+ NVRAM_WAIT_CODE_OP, 1, 0,
+ 0x00000000, 0x0000, 0xFFFF,
+ 0x00000000, 0x0008, 0xFFFF,
+ 0x00000000, 0x000c, 0xFFFF,
+ NVRAM_WAIT_CODE_OP, 200, 0,
+ 0x00000000, 0x000e, 0xFFFF,
+ NVRAM_WAIT_CODE_OP, 500, 0,
+ 0x00000000, 0x001f, 0xFFFF,
+ NVRAM_MIU_WAIT_INIT_DONE_CODE_OP, 0, 0,
+ 0x0000008c, 0x0000, 0xFFFF,
+ (uint32_t)-1
+};
+
+#endif /* __MIU_CFG_H */