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authorCyril Jourdan2012-09-17 14:12:49 +0200
committerCyril Jourdan2012-09-20 16:58:19 +0200
commite62ae723537c69017c6e14de22900d12f22016c6 (patch)
tree4b19219513446d759512ff5577109e23c488bef0 /common/include/asm
parentae1708bb8cab57b5f23799b7e783697104eaf6f2 (diff)
common/inc/asm/arch/ips: add timer 3 and 4 defines, refs #3318
Diffstat (limited to 'common/include/asm')
-rw-r--r--common/include/asm/arch/ips/hardware/arm_apb.h10
-rw-r--r--common/include/asm/arch/ips/hardware/arm_timer3.h132
-rw-r--r--common/include/asm/arch/ips/hardware/arm_timer4.h132
-rw-r--r--common/include/asm/arch/ips/timer.h70
-rw-r--r--common/include/asm/arch/irqs.h2
5 files changed, 346 insertions, 0 deletions
diff --git a/common/include/asm/arch/ips/hardware/arm_apb.h b/common/include/asm/arch/ips/hardware/arm_apb.h
index 7b23e6c5e6..ca9eb5bf3a 100644
--- a/common/include/asm/arch/ips/hardware/arm_apb.h
+++ b/common/include/asm/arch/ips/hardware/arm_apb.h
@@ -46,5 +46,15 @@
#define ARM_GPIO_BASE (ARM_APB_BASE+0x60000)
#include "arm_gpio.h"
+#ifdef CONFIG_CHIP_FEATURE_EXTRA_TIMERS
+
+#define ARM_TIMER3_BASE (ARM_APB_BASE+0x70000)
+#include "arm_timer3.h"
+
+#define ARM_TIMER4_BASE (ARM_APB_BASE+0x80000)
+#include "arm_timer4.h"
+
+#endif
+
#endif /* __ASM_ARCH_IPS_HW_ARM_APB_H */
diff --git a/common/include/asm/arch/ips/hardware/arm_timer3.h b/common/include/asm/arch/ips/hardware/arm_timer3.h
new file mode 100644
index 0000000000..64c0c39aa6
--- /dev/null
+++ b/common/include/asm/arch/ips/hardware/arm_timer3.h
@@ -0,0 +1,132 @@
+/*
+ * include/asm/arch/ips/hardware/arm_timer3.h
+ *
+ * Copyright (C) 2012 MStar Semiconductor.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
+ */
+#ifndef __ASM_ARCH_IPS_HW_ARM_TIMER3_H
+#define __ASM_ARCH_IPS_HW_ARM_TIMER3_H
+
+#ifndef ARM_TIMER3_BASE
+ #error "ARM_TIMER3_BASE macro needs to be defined before including file arm_timer3.h"
+#endif
+
+#define TIMERLOADCOUNTOFF_3 0x00
+#define TIMERCURRENTVALOFF_3 0x04
+#define TIMERCONTROLREGOFF_3 0x08
+#define TIMEREOIOFF_3 0x0c
+#define TIMERINTSTATOFF_3 0x10
+#define TIMERSINTSTATOFF_3 0xa0
+#define TIMERSEOIOFF_3 0xa4
+#define TIMERSRAWINTSTATOFF_3 0xa8
+#define TIMERVERSIONIDOFF_3 0xac
+
+#define TIMER1BASE_3 (ARM_TIMER3_BASE + TIMERLOADCOUNTOFF_3)
+#define TIMER2BASE_3 (ARM_TIMER3_BASE + 0x14)
+#define TIMER3BASE_3 (ARM_TIMER3_BASE + 0x28)
+#define TIMER4BASE_3 (ARM_TIMER3_BASE + 0x3c)
+#define TIMER5BASE_3 (ARM_TIMER3_BASE + 0x50)
+#define TIMER6BASE_3 (ARM_TIMER3_BASE + 0x64)
+#define TIMER7BASE_3 (ARM_TIMER3_BASE + 0x78)
+#define TIMER8BASE_3 (ARM_TIMER3_BASE + 0x8c )
+#define TIMER1LOADCOUNT_3 (TIMER1BASE_3 + TIMERLOADCOUNTOFF_3)
+#define TIMER1CURRENTVAL_3 (TIMER1BASE_3 + TIMERCURRENTVALOFF_3)
+#define TIMER1CONTROLREG_3 (TIMER1BASE_3 + TIMERCONTROLREGOFF_3)
+#define TIMER1EOI_3 (TIMER1BASE_3 + TIMEREOIOFF_3)
+#define TIMER1INTSTAT_3 (TIMER1BASE_3 + TIMERINTSTATOFF_3)
+#define TIMER2LOADCOUNT_3 (TIMER2BASE_3 + TIMERLOADCOUNTOFF_3)
+#define TIMER2CURRENTVAL_3 (TIMER2BASE_3 + TIMERCURRENTVALOFF_3)
+#define TIMER2CONTROLREG_3 (TIMER2BASE_3 + TIMERCONTROLREGOFF_3)
+#define TIMER2EOI_3 (TIMER2BASE_3 + TIMEREOIOFF_3)
+#define TIMER2INTSTAT_3 (TIMER2BASE_3 + TIMERINTSTATOFF_3)
+#define TIMER3LOADCOUNT_3 (TIMER3BASE_3 + TIMERLOADCOUNTOFF_3)
+#define TIMER3CURRENTVAL_3 (TIMER3BASE_3 + TIMERCURRENTVALOFF_3)
+#define TIMER3CONTROLREG_3 (TIMER3BASE_3 + TIMERCONTROLREGOFF_3)
+#define TIMER3EOI_3 (TIMER3BASE_3 + TIMEREOIOFF_3)
+#define TIMER3INTSTAT_3 (TIMER3BASE_3 + TIMERINTSTATOFF_3)
+#define TIMER4LOADCOUNT_3 (TIMER4BASE_3 + TIMERLOADCOUNTOFF_3)
+#define TIMER4CURRENTVAL_3 (TIMER4BASE_3 + TIMERCURRENTVALOFF_3)
+#define TIMER4CONTROLREG_3 (TIMER4BASE_3 + TIMERCONTROLREGOFF_3)
+#define TIMER4EOI_3 (TIMER4BASE_3 + TIMEREOIOFF_3)
+#define TIMER4INTSTAT_3 (TIMER4BASE_3 + TIMERINTSTATOFF_3)
+#define TIMER5LOADCOUNT_3 (TIMER5BASE_3 + TIMERLOADCOUNTOFF_3)
+#define TIMER5CURRENTVAL_3 (TIMER5BASE_3 + TIMERCURRENTVALOFF_3)
+#define TIMER5CONTROLREG_3 (TIMER5BASE_3 + TIMERCONTROLREGOFF_3)
+#define TIMER5EOI_3 (TIMER5BASE_3 + TIMEREOIOFF_3)
+#define TIMER5INTSTAT_3 (TIMER5BASE_3 + TIMERINTSTATOFF_3)
+#define TIMER6LOADCOUNT_3 (TIMER6BASE_3 + TIMERLOADCOUNTOFF_3)
+#define TIMER6CURRENTVAL_3 (TIMER6BASE_3 + TIMERCURRENTVALOFF_3)
+#define TIMER6CONTROLREG_3 (TIMER6BASE_3 + TIMERCONTROLREGOFF_3)
+#define TIMER6EOI_3 (TIMER6BASE_3 + TIMEREOIOFF_3)
+#define TIMER6INTSTAT_3 (TIMER6BASE_3 + TIMERINTSTATOFF_3)
+#define TIMER7LOADCOUNT_3 (TIMER7BASE_3 + TIMERLOADCOUNTOFF_3)
+#define TIMER7CURRENTVAL_3 (TIMER7BASE_3 + TIMERCURRENTVALOFF_3)
+#define TIMER7CONTROLREG_3 (TIMER7BASE_3 + TIMERCONTROLREGOFF_3)
+#define TIMER7EOI_3 (TIMER7BASE_3 + TIMEREOIOFF_3)
+#define TIMER7INTSTAT_3 (TIMER7BASE_3 + TIMERINTSTATOFF_3)
+#define TIMER8LOADCOUNT_3 (TIMER8BASE_3 + TIMERLOADCOUNTOFF_3)
+#define TIMER8CURRENTVAL_3 (TIMER8BASE_3 + TIMERCURRENTVALOFF_3)
+#define TIMER8CONTROLREG_3 (TIMER8BASE_3 + TIMERCONTROLREGOFF_3)
+#define TIMER8EOI_3 (TIMER8BASE_3 + TIMEREOIOFF_3)
+#define TIMER8INTSTAT_3 (TIMER8BASE_3 + TIMERINTSTATOFF_3)
+#define TIMERSEOI_3 (ARM_TIMER3_BASE + TIMERSEOIOFF_3)
+#define TIMERSINTSTAT_3 (ARM_TIMER3_BASE + TIMERSINTSTATOFF_3)
+#define TIMERSRAWINTSTAT_3 (ARM_TIMER3_BASE + TIMERSRAWINTSTATOFF_3)
+
+#define TIMERPING_1BIT_WR_3 (TIMER1LOADCOUNT_3)
+
+#define CC_TIM_APB_DATA_WIDTH_3 32
+#define CC_NUM_TIMERS_3 4
+#define CC_TIM_INTRPT_PLRITY_3 1
+#define CC_TIM_INTR_IO_3 1
+#define CC_TIMER_WIDTH_2_3 32
+#define CC_TIMER_HAS_TOGGLE_2_3 0
+#define CC_TIM_METASTABLE_2_3 1
+#define CC_TIM_PULSE_EXTD_2_3 0
+#define CC_TIM_COHERENCY_2_3 0
+#define CC_TIMER_WIDTH_3_3 32
+#define CC_TIMER_HAS_TOGGLE_3_3 0
+#define CC_TIM_METASTABLE_3_3 1
+#define CC_TIM_PULSE_EXTD_3_3 0
+#define CC_TIM_COHERENCY_3_3 0
+#define CC_TIMER_WIDTH_4_3 32
+#define CC_TIMER_HAS_TOGGLE_4_3 0
+#define CC_TIM_METASTABLE_4_3 1
+#define CC_TIM_PULSE_EXTD_4_3 0
+#define CC_TIM_COHERENCY_4_3 0
+#define CC_TIMER_WIDTH_5_3 32
+#define CC_TIMER_HAS_TOGGLE_5_3 0
+#define CC_TIM_METASTABLE_5_3 0
+#define CC_TIM_PULSE_EXTD_5_3 0
+#define CC_TIM_COHERENCY_5_3 0
+#define CC_TIMER_WIDTH_6_3 32
+#define CC_TIMER_HAS_TOGGLE_6_3 0
+#define CC_TIM_METASTABLE_6_3 0
+#define CC_TIM_PULSE_EXTD_6_3 0
+#define CC_TIM_COHERENCY_6_3 0
+#define CC_TIMER_WIDTH_7_3 32
+#define CC_TIMER_HAS_TOGGLE_7_3 0
+#define CC_TIM_METASTABLE_7_3 0
+#define CC_TIM_PULSE_EXTD_7_3 0
+#define CC_TIM_COHERENCY_7_3 0
+#define CC_TIMER_WIDTH_8_3 32
+#define CC_TIMER_HAS_TOGGLE_8_3 0
+#define CC_TIM_METASTABLE_8_3 0
+#define CC_TIM_PULSE_EXTD_8_3 0
+#define CC_TIM_COHERENCY_8_3 0
+
+#endif /* __ASM_ARCH_IPS_HW_ARM_TIMER3_H */
+
diff --git a/common/include/asm/arch/ips/hardware/arm_timer4.h b/common/include/asm/arch/ips/hardware/arm_timer4.h
new file mode 100644
index 0000000000..1b9efdc8d1
--- /dev/null
+++ b/common/include/asm/arch/ips/hardware/arm_timer4.h
@@ -0,0 +1,132 @@
+/*
+ * include/asm/arch/ips/hardware/arm_timer4.h
+ *
+ * Copyright (C) 2012 MStar Semiconductor.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
+ */
+#ifndef __ASM_ARCH_IPS_HW_ARM_TIMER4_H
+#define __ASM_ARCH_IPS_HW_ARM_TIMER4_H
+
+#ifndef ARM_TIMER4_BASE
+ #error "ARM_TIMER4_BASE macro needs to be defined before including file arm_timer4.h"
+#endif
+
+#define TIMERLOADCOUNTOFF_4 0x00
+#define TIMERCURRENTVALOFF_4 0x04
+#define TIMERCONTROLREGOFF_4 0x08
+#define TIMEREOIOFF_4 0x0c
+#define TIMERINTSTATOFF_4 0x10
+#define TIMERSINTSTATOFF_4 0xa0
+#define TIMERSEOIOFF_4 0xa4
+#define TIMERSRAWINTSTATOFF_4 0xa8
+#define TIMERVERSIONIDOFF_4 0xac
+
+#define TIMER1BASE_4 (ARM_TIMER3_BASE + TIMERLOADCOUNTOFF_4)
+#define TIMER2BASE_4 (ARM_TIMER3_BASE + 0x14)
+#define TIMER3BASE_4 (ARM_TIMER3_BASE + 0x28)
+#define TIMER4BASE_4 (ARM_TIMER3_BASE + 0x3c)
+#define TIMER5BASE_4 (ARM_TIMER3_BASE + 0x50)
+#define TIMER6BASE_4 (ARM_TIMER3_BASE + 0x64)
+#define TIMER7BASE_4 (ARM_TIMER3_BASE + 0x78)
+#define TIMER8BASE_4 (ARM_TIMER3_BASE + 0x8c )
+#define TIMER1LOADCOUNT_4 (TIMER1BASE_4 + TIMERLOADCOUNTOFF_4)
+#define TIMER1CURRENTVAL_4 (TIMER1BASE_4 + TIMERCURRENTVALOFF_4)
+#define TIMER1CONTROLREG_4 (TIMER1BASE_4 + TIMERCONTROLREGOFF_4)
+#define TIMER1EOI_4 (TIMER1BASE_4 + TIMEREOIOFF_4)
+#define TIMER1INTSTAT_4 (TIMER1BASE_4 + TIMERINTSTATOFF_4)
+#define TIMER2LOADCOUNT_4 (TIMER2BASE_4 + TIMERLOADCOUNTOFF_4)
+#define TIMER2CURRENTVAL_4 (TIMER2BASE_4 + TIMERCURRENTVALOFF_4)
+#define TIMER2CONTROLREG_4 (TIMER2BASE_4 + TIMERCONTROLREGOFF_4)
+#define TIMER2EOI_4 (TIMER2BASE_4 + TIMEREOIOFF_4)
+#define TIMER2INTSTAT_4 (TIMER2BASE_4 + TIMERINTSTATOFF_4)
+#define TIMER3LOADCOUNT_4 (TIMER3BASE_4 + TIMERLOADCOUNTOFF_4)
+#define TIMER3CURRENTVAL_4 (TIMER3BASE_4 + TIMERCURRENTVALOFF_4)
+#define TIMER3CONTROLREG_4 (TIMER3BASE_4 + TIMERCONTROLREGOFF_4)
+#define TIMER3EOI_4 (TIMER3BASE_4 + TIMEREOIOFF_4)
+#define TIMER3INTSTAT_4 (TIMER3BASE_4 + TIMERINTSTATOFF_4)
+#define TIMER4LOADCOUNT_4 (TIMER4BASE_4 + TIMERLOADCOUNTOFF_4)
+#define TIMER4CURRENTVAL_4 (TIMER4BASE_4 + TIMERCURRENTVALOFF_4)
+#define TIMER4CONTROLREG_4 (TIMER4BASE_4 + TIMERCONTROLREGOFF_4)
+#define TIMER4EOI_4 (TIMER4BASE_4 + TIMEREOIOFF_4)
+#define TIMER4INTSTAT_4 (TIMER4BASE_4 + TIMERINTSTATOFF_4)
+#define TIMER5LOADCOUNT_4 (TIMER5BASE_4 + TIMERLOADCOUNTOFF_4)
+#define TIMER5CURRENTVAL_4 (TIMER5BASE_4 + TIMERCURRENTVALOFF_4)
+#define TIMER5CONTROLREG_4 (TIMER5BASE_4 + TIMERCONTROLREGOFF_4)
+#define TIMER5EOI_4 (TIMER5BASE_4 + TIMEREOIOFF_4)
+#define TIMER5INTSTAT_4 (TIMER5BASE_4 + TIMERINTSTATOFF_4)
+#define TIMER6LOADCOUNT_4 (TIMER6BASE_4 + TIMERLOADCOUNTOFF_4)
+#define TIMER6CURRENTVAL_4 (TIMER6BASE_4 + TIMERCURRENTVALOFF_4)
+#define TIMER6CONTROLREG_4 (TIMER6BASE_4 + TIMERCONTROLREGOFF_4)
+#define TIMER6EOI_4 (TIMER6BASE_4 + TIMEREOIOFF_4)
+#define TIMER6INTSTAT_4 (TIMER6BASE_4 + TIMERINTSTATOFF_4)
+#define TIMER7LOADCOUNT_4 (TIMER7BASE_4 + TIMERLOADCOUNTOFF_4)
+#define TIMER7CURRENTVAL_4 (TIMER7BASE_4 + TIMERCURRENTVALOFF_4)
+#define TIMER7CONTROLREG_4 (TIMER7BASE_4 + TIMERCONTROLREGOFF_4)
+#define TIMER7EOI_4 (TIMER7BASE_4 + TIMEREOIOFF_4)
+#define TIMER7INTSTAT_4 (TIMER7BASE_4 + TIMERINTSTATOFF_4)
+#define TIMER8LOADCOUNT_4 (TIMER8BASE_4 + TIMERLOADCOUNTOFF_4)
+#define TIMER8CURRENTVAL_4 (TIMER8BASE_4 + TIMERCURRENTVALOFF_4)
+#define TIMER8CONTROLREG_4 (TIMER8BASE_4 + TIMERCONTROLREGOFF_4)
+#define TIMER8EOI_4 (TIMER8BASE_4 + TIMEREOIOFF_4)
+#define TIMER8INTSTAT_4 (TIMER8BASE_4 + TIMERINTSTATOFF_4)
+#define TIMERSEOI_4 (ARM_TIMER3_BASE + TIMERSEOIOFF_4)
+#define TIMERSINTSTAT_4 (ARM_TIMER3_BASE + TIMERSINTSTATOFF_4)
+#define TIMERSRAWINTSTAT_4 (ARM_TIMER3_BASE + TIMERSRAWINTSTATOFF_4)
+
+#define TIMERPING_1BIT_WR_4 (TIMER1LOADCOUNT_4)
+
+#define CC_TIM_APB_DATA_WIDTH_4 32
+#define CC_NUM_TIMERS_4 4
+#define CC_TIM_INTRPT_PLRITY_4 1
+#define CC_TIM_INTR_IO_4 1
+#define CC_TIMER_WIDTH_2_4 32
+#define CC_TIMER_HAS_TOGGLE_2_4 0
+#define CC_TIM_METASTABLE_2_4 1
+#define CC_TIM_PULSE_EXTD_2_4 0
+#define CC_TIM_COHERENCY_2_4 0
+#define CC_TIMER_WIDTH_3_4 32
+#define CC_TIMER_HAS_TOGGLE_3_4 0
+#define CC_TIM_METASTABLE_3_4 1
+#define CC_TIM_PULSE_EXTD_3_4 0
+#define CC_TIM_COHERENCY_4_4 0
+#define CC_TIMER_WIDTH_4_4 32
+#define CC_TIMER_HAS_TOGGLE_4_4 0
+#define CC_TIM_METASTABLE_4_4 1
+#define CC_TIM_PULSE_EXTD_4_4 0
+#define CC_TIM_COHERENCY_4_4 0
+#define CC_TIMER_WIDTH_5_4 32
+#define CC_TIMER_HAS_TOGGLE_5_4 0
+#define CC_TIM_METASTABLE_5_4 0
+#define CC_TIM_PULSE_EXTD_5_4 0
+#define CC_TIM_COHERENCY_5_4 0
+#define CC_TIMER_WIDTH_6_4 32
+#define CC_TIMER_HAS_TOGGLE_6_4 0
+#define CC_TIM_METASTABLE_6_4 0
+#define CC_TIM_PULSE_EXTD_6_4 0
+#define CC_TIM_COHERENCY_6_4 0
+#define CC_TIMER_WIDTH_7_4 32
+#define CC_TIMER_HAS_TOGGLE_7_4 0
+#define CC_TIM_METASTABLE_7_4 0
+#define CC_TIM_PULSE_EXTD_7_4 0
+#define CC_TIM_COHERENCY_7_4 0
+#define CC_TIMER_WIDTH_8_4 32
+#define CC_TIMER_HAS_TOGGLE_8_4 0
+#define CC_TIM_METASTABLE_8_4 0
+#define CC_TIM_PULSE_EXTD_8_4 0
+#define CC_TIM_COHERENCY_8_4 0
+
+#endif /* __ASM_ARCH_IPS_HW_ARM_TIMER4_H */
+
diff --git a/common/include/asm/arch/ips/timer.h b/common/include/asm/arch/ips/timer.h
index 430e6442dc..2f434d69d3 100644
--- a/common/include/asm/arch/ips/timer.h
+++ b/common/include/asm/arch/ips/timer.h
@@ -90,6 +90,76 @@
#define TIMERSEOI_2_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_TIMER2_BASE) + TIMERSEOIOFF_2)))
#define TIMERSINTSTAT_2_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_TIMER2_BASE) + TIMERSINTSTATOFF_2)))
#define TIMERSRAWINTSTAT_2_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_TIMER2_BASE) + TIMERSRAWINTSTATOFF_2)))
+
+/** Virtual Address for timer 3 */
+#define TIMER1BASE_3_VA (IO_ADDRESS(ARM_TIMER3_BASE) + 0x00)
+#define TIMER2BASE_3_VA (IO_ADDRESS(ARM_TIMER3_BASE) + 0x14)
+#define TIMER3BASE_3_VA (IO_ADDRESS(ARM_TIMER3_BASE) + 0x28)
+#define TIMER4BASE_3_VA (IO_ADDRESS(ARM_TIMER3_BASE) + 0x3c)
+#define TIMER5BASE_3_VA (IO_ADDRESS(ARM_TIMER3_BASE) + 0x50)
+#define TIMER6BASE_3_VA (IO_ADDRESS(ARM_TIMER3_BASE) + 0x64)
+#define TIMER7BASE_3_VA (IO_ADDRESS(ARM_TIMER3_BASE) + 0x78)
+#define TIMER8BASE_3_VA (IO_ADDRESS(ARM_TIMER3_BASE) + 0x8c)
+
+#define TIMER1LOADCOUNT_3_VA (*((volatile uint32_t *)(TIMER1BASE_3_VA + TIMERLOADCOUNTOFF_3)))
+#define TIMER1CURRENTVAL_3_VA (*((volatile uint32_t *)(TIMER1BASE_3_VA + TIMERCURRENTVALOFF_3)))
+#define TIMER1CONTROLREG_3_VA (*((volatile uint32_t *)(TIMER1BASE_3_VA + TIMERCONTROLREGOFF_3)))
+#define TIMER1EOI_3_VA (*((volatile uint32_t *)(TIMER1BASE_3_VA + TIMEREOIOFF_3)))
+#define TIMER1INTSTAT_3_VA (*((volatile uint32_t *)(TIMER1BASE_3_VA + TIMERINTSTATOFF_3)))
+#define TIMER2LOADCOUNT_3_VA (*((volatile uint32_t *)(TIMER2BASE_3_VA + TIMERLOADCOUNTOFF_3)))
+#define TIMER2CURRENTVAL_3_VA (*((volatile uint32_t *)(TIMER2BASE_3_VA + TIMERCURRENTVALOFF_3)))
+#define TIMER2CONTROLREG_3_VA (*((volatile uint32_t *)(TIMER2BASE_3_VA + TIMERCONTROLREGOFF_3)))
+#define TIMER2EOI_3_VA (*((volatile uint32_t *)(TIMER2BASE_3_VA + TIMEREOIOFF_3)))
+#define TIMER2INTSTAT_3_VA (*((volatile uint32_t *)(TIMER2BASE_3_VA + TIMERINTSTATOFF_3)))
+#define TIMER3LOADCOUNT_3_VA (*((volatile uint32_t *)(TIMER3BASE_3_VA + TIMERLOADCOUNTOFF_3)))
+#define TIMER3CURRENTVAL_3_VA (*((volatile uint32_t *)(TIMER3BASE_3_VA + TIMERCURRENTVALOFF_3)))
+#define TIMER3CONTROLREG_3_VA (*((volatile uint32_t *)(TIMER3BASE_3_VA + TIMERCONTROLREGOFF_3)))
+#define TIMER3EOI_3_VA (*((volatile uint32_t *)(TIMER3BASE_3_VA + TIMEREOIOFF_3)))
+#define TIMER3INTSTAT_3_VA (*((volatile uint32_t *)(TIMER3BASE_3_VA + TIMERINTSTATOFF_3)))
+#define TIMER4LOADCOUNT_3_VA (*((volatile uint32_t *)(TIMER4BASE_3_VA + TIMERLOADCOUNTOFF_3)))
+#define TIMER4CURRENTVAL_3_VA (*((volatile uint32_t *)(TIMER4BASE_3_VA + TIMERCURRENTVALOFF_3)))
+#define TIMER4CONTROLREG_3_VA (*((volatile uint32_t *)(TIMER4BASE_3_VA + TIMERCONTROLREGOFF_3)))
+#define TIMER4EOI_3_VA (*((volatile uint32_t *)(TIMER4BASE_3_VA + TIMEREOIOFF_3)))
+#define TIMER4INTSTAT_3_VA (*((volatile uint32_t *)(TIMER4BASE_3_VA + TIMERINTSTATOFF_3)))
+#define TIMERSEOI_3_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_TIMER3_BASE) + TIMERSEOIOFF_3)))
+#define TIMERSINTSTAT_3_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_TIMER3_BASE) + TIMERSINTSTATOFF_3)))
+#define TIMERSRAWINTSTAT_3_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_TIMER3_BASE) + TIMERSRAWINTSTATOFF_3)))
+
+/** Virtual Address for timer 4 */
+#define TIMER1BASE_4_VA (IO_ADDRESS(ARM_TIMER4_BASE) + 0x00)
+#define TIMER2BASE_4_VA (IO_ADDRESS(ARM_TIMER4_BASE) + 0x14)
+#define TIMER3BASE_4_VA (IO_ADDRESS(ARM_TIMER4_BASE) + 0x28)
+#define TIMER4BASE_4_VA (IO_ADDRESS(ARM_TIMER4_BASE) + 0x3c)
+#define TIMER5BASE_4_VA (IO_ADDRESS(ARM_TIMER4_BASE) + 0x50)
+#define TIMER6BASE_4_VA (IO_ADDRESS(ARM_TIMER4_BASE) + 0x64)
+#define TIMER7BASE_4_VA (IO_ADDRESS(ARM_TIMER4_BASE) + 0x78)
+#define TIMER8BASE_4_VA (IO_ADDRESS(ARM_TIMER4_BASE) + 0x8c)
+
+#define TIMER1LOADCOUNT_4_VA (*((volatile uint32_t *)(TIMER1BASE_4_VA + TIMERLOADCOUNTOFF_4)))
+#define TIMER1CURRENTVAL_4_VA (*((volatile uint32_t *)(TIMER1BASE_4_VA + TIMERCURRENTVALOFF_4)))
+#define TIMER1CONTROLREG_4_VA (*((volatile uint32_t *)(TIMER1BASE_4_VA + TIMERCONTROLREGOFF_4)))
+#define TIMER1EOI_4_VA (*((volatile uint32_t *)(TIMER1BASE_4_VA + TIMEREOIOFF_4)))
+#define TIMER1INTSTAT_4_VA (*((volatile uint32_t *)(TIMER1BASE_4_VA + TIMERINTSTATOFF_4)))
+#define TIMER2LOADCOUNT_4_VA (*((volatile uint32_t *)(TIMER2BASE_4_VA + TIMERLOADCOUNTOFF_4)))
+#define TIMER2CURRENTVAL_4_VA (*((volatile uint32_t *)(TIMER2BASE_4_VA + TIMERCURRENTVALOFF_4)))
+#define TIMER2CONTROLREG_4_VA (*((volatile uint32_t *)(TIMER2BASE_4_VA + TIMERCONTROLREGOFF_4)))
+#define TIMER2EOI_4_VA (*((volatile uint32_t *)(TIMER2BASE_4_VA + TIMEREOIOFF_4)))
+#define TIMER2INTSTAT_4_VA (*((volatile uint32_t *)(TIMER2BASE_4_VA + TIMERINTSTATOFF_4)))
+#define TIMER3LOADCOUNT_4_VA (*((volatile uint32_t *)(TIMER3BASE_4_VA + TIMERLOADCOUNTOFF_4)))
+#define TIMER3CURRENTVAL_4_VA (*((volatile uint32_t *)(TIMER3BASE_4_VA + TIMERCURRENTVALOFF_4)))
+#define TIMER3CONTROLREG_4_VA (*((volatile uint32_t *)(TIMER3BASE_4_VA + TIMERCONTROLREGOFF_4)))
+#define TIMER3EOI_4_VA (*((volatile uint32_t *)(TIMER3BASE_4_VA + TIMEREOIOFF_4)))
+#define TIMER3INTSTAT_4_VA (*((volatile uint32_t *)(TIMER3BASE_4_VA + TIMERINTSTATOFF_4)))
+#define TIMER4LOADCOUNT_4_VA (*((volatile uint32_t *)(TIMER4BASE_4_VA + TIMERLOADCOUNTOFF_4)))
+#define TIMER4CURRENTVAL_4_VA (*((volatile uint32_t *)(TIMER4BASE_4_VA + TIMERCURRENTVALOFF_4)))
+#define TIMER4CONTROLREG_4_VA (*((volatile uint32_t *)(TIMER4BASE_4_VA + TIMERCONTROLREGOFF_4)))
+#define TIMER4EOI_4_VA (*((volatile uint32_t *)(TIMER4BASE_4_VA + TIMEREOIOFF_4)))
+#define TIMER4INTSTAT_4_VA (*((volatile uint32_t *)(TIMER4BASE_4_VA + TIMERINTSTATOFF_4)))
+#define TIMERSEOI_4_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_TIMER4_BASE) + TIMERSEOIOFF_4)))
+#define TIMERSINTSTAT_4_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_TIMER4_BASE) + TIMERSINTSTATOFF_4)))
+#define TIMERSRAWINTSTAT_4_VA (*((volatile uint32_t *)(IO_ADDRESS(ARM_TIMER4_BASE) + TIMERSRAWINTSTATOFF_4)))
+
+
#endif /* __ASSEMBLY__ */
#define TIMER_ENABLE_MASK (1<<0)
diff --git a/common/include/asm/arch/irqs.h b/common/include/asm/arch/irqs.h
index 8be86ee7c4..4b8f0fdb15 100644
--- a/common/include/asm/arch/irqs.h
+++ b/common/include/asm/arch/irqs.h
@@ -97,6 +97,8 @@
#define INT_SPC200_PLC_RX 29
#define INT_SPC200_PLC_ERR 30
#define INT_WDT 31
+#define INT_TIMER_3 32
+#define INT_TIMER_4 33
#define INTMASK_TIMER_1 (1 << INT_TIMER_1)
#define INTMASK_TIMER_2 (1 << INT_TIMER_2)