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authorsave2009-11-26 18:30:10 +0000
committersave2009-11-26 18:30:10 +0000
commit4184532f6f0748a4187de283a810857310991955 (patch)
tree263b4b4226805c03b787627f0a21e32be16a555e /cleopatre
parent68df164f9f488cc3e93d22b0f1a412467addce41 (diff)
cleo/tools/openocd: add config file for spk300g and scr310 boards
git-svn-id: svn+ssh://pessac/svn/cesar/trunk@6485 017c9cb6-072f-447c-8318-d5b54f68fe89
Diffstat (limited to 'cleopatre')
-rw-r--r--cleopatre/tools/openocd-r668/config/scr310.cfg47
-rw-r--r--cleopatre/tools/openocd-r668/config/scr310.ocd85
-rw-r--r--cleopatre/tools/openocd-r668/config/spk300g.cfg47
-rw-r--r--cleopatre/tools/openocd-r668/config/spk300g.ocd84
4 files changed, 263 insertions, 0 deletions
diff --git a/cleopatre/tools/openocd-r668/config/scr310.cfg b/cleopatre/tools/openocd-r668/config/scr310.cfg
new file mode 100644
index 0000000000..d9f7e44a09
--- /dev/null
+++ b/cleopatre/tools/openocd-r668/config/scr310.cfg
@@ -0,0 +1,47 @@
+#DAEMON CONFIGURATION
+telnet_port 4444
+gdb_port 3333
+
+#INTERFACE
+interface ft2232
+#Baiwen
+ft2232_layout jtagkey
+ft2232_vid_pid 0x1457 0x5118
+#Olimex
+#ft2232_layout olimex-jtag
+#ft2232_vid_pid 0x15ba 0x0003
+#Amontec
+#ft2232_layout jtagkey
+#ft2232_vid_pid 0x0403 0xcff8
+
+#JTAG SPEED
+jtag_khz 5000
+
+#TARGET RESET DELAY
+jtag_nsrst_delay 0
+jtag_ntrst_delay 0
+
+#TARGET RESET SCHEME
+#use combined on interfaces or targets that can set trst/srst separately
+reset_config srst_only srst_pulls_trst
+
+#JTAG SCAN CHAIN
+#jtag_device <Length> <IR Capture> <IR Capture Mask> <IDCODE>
+jtag_device 4 0x1 0xf 0xe
+
+#TARGET CONFIGURATION
+daemon_startup reset
+
+#target <type> <endianness> <reset mode> <chainpos> <variant>
+target arm926ejs little reset_and_init 0 arm926ejs
+target_script 0 reset /opt/spidcom/bundle/tools/openocd-r668/config/scr310.ocd
+
+#WORKING AREA
+working_area 0 0x40000000 0x0000F000 nobackup # SDRAM
+
+#FLASH CONFIGURATION
+#flash bank cfi <base> <size> <chip_width> <bus_width> <target#> <device> <freq> <mode>
+flash bank spc300 0x30000000 0x800000 1 1 0 at26df321 12500000 0
+
+# For more information about the configuration files, take a look at:
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
diff --git a/cleopatre/tools/openocd-r668/config/scr310.ocd b/cleopatre/tools/openocd-r668/config/scr310.ocd
new file mode 100644
index 0000000000..a5c2afb496
--- /dev/null
+++ b/cleopatre/tools/openocd-r668/config/scr310.ocd
@@ -0,0 +1,85 @@
+#
+#***********************************************************************
+# memory configuration
+# SPI FLASH : 0x30000000
+# SDRAM : 0x40000000
+#***********************************************************************
+#
+
+
+#***********************************************************************
+# stop processor
+#***********************************************************************
+halt
+soft_reset_halt
+
+#
+#***********************************************************************
+# INIT_PLL
+# PLLs configuration set to bypass
+#***********************************************************************
+#
+# spll bypass
+mww 0xC8040580 1
+
+# dpll bypass
+mww 0xC8040560 1
+
+# ppll bypass
+mww 0xC8040540 1
+
+# sys_remapped
+mww 0xC8040100 0
+
+#***********************************************************************
+# reset processor
+#***********************************************************************
+# reset group
+mww 0xC8040708 0xe
+
+# reset all IPs
+mww 0xC804070C 0x1fff
+mww 0xC804070C 0x1000
+
+# restart code
+reg pc 0
+reg cpsr 0xd3
+arm926ejs cp15 0 0 1 0 0
+
+#
+#***********************************************************************
+# INIT_SDRAM
+# SDRAM Memory configuration
+#***********************************************************************
+#
+# Set SDRAM Architecture : SCONR
+mww 0xE0000000 0x001C3168
+
+# Set SDRAM Chip Select : SCSLR0_LOW
+mww 0xE0000014 0x00000000
+
+# Set SDRAM Mask to 128MB : SMSKR0
+mww 0xE0000054 0x0000000C
+
+# Set SDRAM Timings : STMGR0
+mww 0xE0000004 0x022E5699
+
+# Activate SDRAM Configuration : SCTLR
+mww 0xE000000C 0x00003089
+
+# Wait Activation
+# ---> wait @0xE000000C = 0x3088
+sleep 4
+
+
+#***********************************************************************
+# Flash probe
+#***********************************************************************
+flash probe 0
+flash protect 0 0 3 off
+
+
+#***********************************************************************
+# Stop processor
+#***********************************************************************
+halt
diff --git a/cleopatre/tools/openocd-r668/config/spk300g.cfg b/cleopatre/tools/openocd-r668/config/spk300g.cfg
new file mode 100644
index 0000000000..4ac0722a6b
--- /dev/null
+++ b/cleopatre/tools/openocd-r668/config/spk300g.cfg
@@ -0,0 +1,47 @@
+#DAEMON CONFIGURATION
+telnet_port 4444
+gdb_port 3333
+
+#INTERFACE
+interface ft2232
+#Baiwen
+ft2232_layout jtagkey
+ft2232_vid_pid 0x1457 0x5118
+#Olimex
+#ft2232_layout olimex-jtag
+#ft2232_vid_pid 0x15ba 0x0003
+#Amontec
+#ft2232_layout jtagkey
+#ft2232_vid_pid 0x0403 0xcff8
+
+#JTAG SPEED
+jtag_khz 5000
+
+#TARGET RESET DELAY
+jtag_nsrst_delay 0
+jtag_ntrst_delay 0
+
+#TARGET RESET SCHEME
+#use combined on interfaces or targets that can set trst/srst separately
+reset_config srst_only srst_pulls_trst
+
+#JTAG SCAN CHAIN
+#jtag_device <Length> <IR Capture> <IR Capture Mask> <IDCODE>
+jtag_device 4 0x1 0xf 0xe
+
+#TARGET CONFIGURATION
+daemon_startup reset
+
+#target <type> <endianness> <reset mode> <chainpos> <variant>
+target arm926ejs little reset_and_init 0 arm926ejs
+target_script 0 reset /opt/spidcom/bundle/tools/openocd-r668/config/spk300g.ocd
+
+#WORKING AREA
+working_area 0 0x40000000 0x0000F000 nobackup # SDRAM
+
+#FLASH CONFIGURATION
+#flash bank cfi <base> <size> <chip_width> <bus_width> <target#> <device> <freq> <mode>
+flash bank spc300 0x30000000 0x800000 1 1 0 m25p64 12500000 0
+
+# For more information about the configuration files, take a look at:
+# http://openfacts.berlios.de/index-en.phtml?title=Open+On-Chip+Debugger
diff --git a/cleopatre/tools/openocd-r668/config/spk300g.ocd b/cleopatre/tools/openocd-r668/config/spk300g.ocd
new file mode 100644
index 0000000000..7a402522f1
--- /dev/null
+++ b/cleopatre/tools/openocd-r668/config/spk300g.ocd
@@ -0,0 +1,84 @@
+#
+#***********************************************************************
+# memory configuration
+# SPI FLASH : 0x30000000
+# SDRAM : 0x40000000
+#***********************************************************************
+#
+
+
+#***********************************************************************
+# stop processor
+#***********************************************************************
+halt
+soft_reset_halt
+
+#
+#***********************************************************************
+# INIT_PLL
+# PLLs configuration set to bypass
+#***********************************************************************
+#
+# spll bypass
+mww 0xC8040580 1
+
+# dpll bypass
+mww 0xC8040560 1
+
+# ppll bypass
+mww 0xC8040540 1
+
+# sys_remapped
+mww 0xC8040100 0
+
+#***********************************************************************
+# reset processor
+#***********************************************************************
+# reset group
+mww 0xC8040708 0xe
+
+# reset all IPs
+mww 0xC804070C 0x1fff
+mww 0xC804070C 0x1000
+
+# restart code
+reg pc 0
+reg cpsr 0xd3
+arm926ejs cp15 0 0 1 0 0
+
+#
+#***********************************************************************
+# INIT_SDRAM
+# SDRAM Memory configuration
+#***********************************************************************
+#
+# Set SDRAM Architecture : SCONR
+mww 0xE0000000 0x001C3168
+
+# Set SDRAM Chip Select : SCSLR0_LOW
+mww 0xE0000014 0x00000000
+
+# Set SDRAM Mask to 128MB : SMSKR0
+mww 0xE0000054 0x0000000C
+
+# Set SDRAM Timings : STMGR0
+mww 0xE0000004 0x022E5699
+
+# Activate SDRAM Configuration : SCTLR
+mww 0xE000000C 0x00003089
+
+# Wait Activation
+# ---> wait @0xE000000C = 0x3088
+sleep 4
+
+
+#***********************************************************************
+# Flash probe
+#***********************************************************************
+flash probe 0
+
+
+#***********************************************************************
+# Stop processor
+#***********************************************************************
+halt