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authorYacine Belkadi2012-12-10 17:11:52 +0100
committerYacine Belkadi2012-12-20 11:47:11 +0100
commit16b04281b3187fbc09282e7b10b84deeccd9c56d (patch)
tree4b9805452362838478e5b8c173b4579bbe4d14c5 /cleopatre
parentd129f4b80bdcb703e31d4045cbac34c724b047d5 (diff)
cleo/u-boot/drv/netspcmac: add a reset() to phy_device
Add a reset() to phy_device to prepare for the handling of PHY-specific reset code.
Diffstat (limited to 'cleopatre')
-rw-r--r--cleopatre/u-boot-1.1.6/drivers/netspcmac_eth.c40
1 files changed, 24 insertions, 16 deletions
diff --git a/cleopatre/u-boot-1.1.6/drivers/netspcmac_eth.c b/cleopatre/u-boot-1.1.6/drivers/netspcmac_eth.c
index ac680e6281..2b6406f680 100644
--- a/cleopatre/u-boot-1.1.6/drivers/netspcmac_eth.c
+++ b/cleopatre/u-boot-1.1.6/drivers/netspcmac_eth.c
@@ -114,6 +114,7 @@ static uchar *rx_packets[CONFIG_DMA_RX_SIZE];
struct phy_device {
int addr;
unsigned int id;
+ int (*reset) (const struct phy_device *phy_dev);
};
static inline int spcmac_phy_wait_link_up (int phy_addr)
@@ -246,14 +247,14 @@ static unsigned int spcmac_phy_check_speed (int phy_addr)
}
#endif
-int spcmac_phy_reset (int phy_addr, unsigned long phy_id)
+static int spcmac_phy_gen_reset (const struct phy_device *phy_dev)
{
int loop = 100000;
int tmp;
/* check if we find a switch */
- if ((PHYSID_GET_OUI (phy_id) == ICPLUS_OUI) &&
- (PHYSID_GET_MODEL (phy_id) == ICPLUS_IP175))
+ if ((PHYSID_GET_OUI (phy_dev->id) == ICPLUS_OUI) &&
+ (PHYSID_GET_MODEL (phy_dev->id) == ICPLUS_IP175))
{
/* check if it is an IP175D */
if (spcmac_mii_read (20, 0) == ICPLUS_ID_IP175D)
@@ -264,10 +265,10 @@ int spcmac_phy_reset (int phy_addr, unsigned long phy_id)
}
}
- spcmac_mii_write (phy_addr, MII_BMCR, BMCR_RESET);
+ spcmac_mii_write (phy_dev->addr, MII_BMCR, BMCR_RESET);
do {
udelay (10);
- tmp = spcmac_mii_read (phy_addr, MII_BMCR);
+ tmp = spcmac_mii_read (phy_dev->addr, MII_BMCR);
loop--;
} while ((loop > 0) && (tmp & BMCR_RESET));
@@ -279,27 +280,27 @@ int spcmac_phy_reset (int phy_addr, unsigned long phy_id)
#ifdef CONFIG_CHIP_FEATURE_SYNOP3504_PHY_DINI
/* The PHY used on MSE500 DINI is VSC8601. */
- if ((PHYSID_GET_OUI (phy_id) != VITESSE_OUI)
- ||(PHYSID_GET_MODEL (phy_id) != VITESSE_VSC8601))
+ if ((PHYSID_GET_OUI (phy_dev->id) != VITESSE_OUI)
+ ||(PHYSID_GET_MODEL (phy_dev->id) != VITESSE_VSC8601))
BUG();
/* Add a 2ns delay for TX and RX clock */
/* In register 23 "Extended Phy Control 1", enable "RGMII skew timing
* compensation". */
- spcmac_mii_write (phy_addr, 23, 0x0100);
+ spcmac_mii_write (phy_dev->addr, 23, 0x0100);
/* To access the extended register 28E, put 1 in register 31 "Extended
* Page Access". */
- spcmac_mii_write (phy_addr, 31, 0x0001);
+ spcmac_mii_write (phy_dev->addr, 31, 0x0001);
/* In register 28E "RGMII Skew Control", set both TX and RX RGMII Skew
* compensation to 2ns. */
- spcmac_mii_write (phy_addr, 28, 0xf000);
+ spcmac_mii_write (phy_dev->addr, 28, 0xf000);
/* Switch back to main register space, by putting 0 in register 31
* "Extended Page Access". */
- spcmac_mii_write (phy_addr, 31, 0x0000);
+ spcmac_mii_write (phy_dev->addr, 31, 0x0000);
#endif /* CONFIG_CHIP_FEATURE_SYNOP3504_PHY_DINI */
@@ -309,10 +310,10 @@ int spcmac_phy_reset (int phy_addr, unsigned long phy_id)
spidcom_nvram_t *nvram = (spidcom_nvram_t *)(gd->bd->bi_nvram_addr);
if ((NVRAM_BFEXT (ETH1_MODE, nvram->pkg_cfg) == NVRAM_ETH_MODE_GMII) &&
- (PHYSID_GET_OUI (phy_id) == ICPLUS_OUI) &&
- (PHYSID_GET_MODEL (phy_id) == ICPLUS_IP1001))
- spcmac_mii_write (phy_addr, 16,
- spcmac_mii_read (phy_addr, 16) & ~(2));
+ (PHYSID_GET_OUI (phy_dev->id) == ICPLUS_OUI) &&
+ (PHYSID_GET_MODEL (phy_dev->id) == ICPLUS_IP1001))
+ spcmac_mii_write (phy_dev->addr, 16,
+ spcmac_mii_read (phy_dev->addr, 16) & ~(2));
}
return 0;
@@ -390,6 +391,8 @@ static int spcmac_phy_init_dev (struct phy_device *phy_dev)
phy_dev->addr = phy_addr;
phy_dev->id = spcmac_phy_get_id (phy_dev->addr);
+ /* Set generic (default) functions. */
+ phy_dev->reset = spcmac_phy_gen_reset;
/* Determine the PHY's model to replace some functions, if necessary. */
phy_oui = PHYSID_GET_OUI (phy_dev->id);
@@ -412,6 +415,11 @@ static int spcmac_phy_init_dev (struct phy_device *phy_dev)
return 0;
}
+static int spcmac_phy_reset (const struct phy_device *phy_dev)
+{
+ return phy_dev->reset (phy_dev);
+}
+
static int spcmac_phy_init (void)
{
uint advertised_caps, value, lp_an_able;
@@ -427,7 +435,7 @@ static int spcmac_phy_init (void)
value = (unsigned int) spcmac_mii_read (phy_dev->addr, MII_EXPANSION);
lp_an_able = value & ANEXP_LP_AUTONEG_ABLE;
- spcmac_phy_reset (phy_dev->addr, phy_dev->id);
+ spcmac_phy_reset (phy_dev);
#ifndef FORCE_10_HD
if ((ICPLUS_OUI == PHYSID_GET_OUI (phy_dev->id)) &&