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authorCyril Jourdan2013-01-29 11:20:35 +0100
committerCyril Jourdan2013-02-05 15:57:27 +0100
commit3dd5dbe09cb26be9c7b043bc268e2c7b9ce5df8a (patch)
treedf5a2d6883d04bf2ed85d5cc36247e2e29eb1e1f /cleopatre/u-boot-1.1.6/include/configs/CPCI4052.h
parent9a771e7e55a47620bd371c5741ef20980b713d19 (diff)
cleo/uboot/cpu/spc300: remove mode dependant PLL init, refs #3694
Now that System PLL is set up in spidboot command, PLL init in msepll.S is only needed for uboot to work correctly. In this case, we can use the default value of 492 MHz.
Diffstat (limited to 'cleopatre/u-boot-1.1.6/include/configs/CPCI4052.h')
0 files changed, 0 insertions, 0 deletions