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authorCyril Jourdan2013-01-29 09:17:20 +0100
committerCyril Jourdan2013-02-05 15:57:22 +0100
commitf60196ad63b11acfde358f7be626b99d9c09a2a9 (patch)
tree251f8e6c335416faba1ec49f2b1acebe9ffaf00b /cleopatre/u-boot-1.1.6/common
parent2d13abc34d861dd699bd8b3a861677a28d073e5c (diff)
cleo/uboot/common: minor refactoring, no refs
Comments refactoring, warning suppression...
Diffstat (limited to 'cleopatre/u-boot-1.1.6/common')
-rw-r--r--cleopatre/u-boot-1.1.6/common/cmd_spidboot.c8
1 files changed, 3 insertions, 5 deletions
diff --git a/cleopatre/u-boot-1.1.6/common/cmd_spidboot.c b/cleopatre/u-boot-1.1.6/common/cmd_spidboot.c
index e7e1edac6d..1825cf4dba 100644
--- a/cleopatre/u-boot-1.1.6/common/cmd_spidboot.c
+++ b/cleopatre/u-boot-1.1.6/common/cmd_spidboot.c
@@ -217,8 +217,6 @@ static void setup_uart (uint32_t speed)
*/
static void setup_system_pll (uint32_t speed, uint32_t type)
{
- uint32_t regval = 0;
-
/* Make sure the value is in the bounds. */
if (speed < 96 || speed > 276)
{
@@ -231,8 +229,8 @@ static void setup_system_pll (uint32_t speed, uint32_t type)
}
/* Check image type. If we find a 200 image, we set SPLL to 96MHz.
- ** Otherwise we keep the default, which is the value that should work
- ** in all cases (MSE500 with ARM CLK at 444 or 492MHz). */
+ * Otherwise we keep the default, which is the value that should work
+ * in all cases (MSE500 with ARM CLK at 444 or 492MHz). */
if (type == SPIDCOM_IMG_DESC_IMAGE_TYPE_200)
speed = 96;
else
@@ -268,7 +266,7 @@ static void setup_system_pll (uint32_t speed, uint32_t type)
*((volatile uint32_t *)(MSEPLL_SPLL_BASE + MSEPLL_SPPLL_CTRL_OFFSET)) &= ~MSEPLL_BIT(SPPLL_CTRL_PD);
- *((volatile uint32_t *) RB_SPLL_BYPASS) = PLL_CMD_PLL;
+ *((volatile uint32_t *) RB_SPLL_BYPASS) = PLL_CMD_PLL;
while (*((volatile uint32_t *) RB_SPLL_BYPASS_STAT) != PLL_IS_PLL)
;