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authorMSE500 Team2011-11-10 15:22:14 +0100
committerNicolas Schodet2012-05-09 10:41:16 +0200
commit57bda5174d6f811c2ef6675844b45cc8d54457d7 (patch)
treef114c6d717bdb088c252a25c9773c6ff13461fa4 /cleopatre/linux-2.6.25.10-spc300/drivers/net
parentedc9957c99d3aca147616345f13978da423f4226 (diff)
cleo/linux/drv: make ethernet work on spc300dini, refs #2759
- Prevent advertising of 1000Base-T capability because the spc300dini doesn't support Gigabit Ethernet. - Apply a specific configuration to the phy (2ns delay for TX and RX clock).
Diffstat (limited to 'cleopatre/linux-2.6.25.10-spc300/drivers/net')
-rw-r--r--cleopatre/linux-2.6.25.10-spc300/drivers/net/arm/Kconfig8
-rw-r--r--cleopatre/linux-2.6.25.10-spc300/drivers/net/arm/synop3504.c34
2 files changed, 40 insertions, 2 deletions
diff --git a/cleopatre/linux-2.6.25.10-spc300/drivers/net/arm/Kconfig b/cleopatre/linux-2.6.25.10-spc300/drivers/net/arm/Kconfig
index 381698ae6a..dad7128469 100644
--- a/cleopatre/linux-2.6.25.10-spc300/drivers/net/arm/Kconfig
+++ b/cleopatre/linux-2.6.25.10-spc300/drivers/net/arm/Kconfig
@@ -62,3 +62,11 @@ config SYNOP3504
To compile this driver as a module, choose M here: The module
will be called synop3504.
+config SYNOP3504_NO_GIGABIT
+ def_bool n
+config SYNOP3504_NO_TX_TIMEOUT
+ def_bool n
+# Special configuration used on Dini proto (different phy, clock hacks).
+config SYNOP3504_PHY_DINI
+ def_bool n
+
diff --git a/cleopatre/linux-2.6.25.10-spc300/drivers/net/arm/synop3504.c b/cleopatre/linux-2.6.25.10-spc300/drivers/net/arm/synop3504.c
index c93772bdfa..d34d109a98 100644
--- a/cleopatre/linux-2.6.25.10-spc300/drivers/net/arm/synop3504.c
+++ b/cleopatre/linux-2.6.25.10-spc300/drivers/net/arm/synop3504.c
@@ -588,7 +588,7 @@ static void synop3504_set_multicast(struct net_device *dev)
* This will control transmission timeout.
* \param dev net device.
*/
-#ifndef CONFIG_CHIP_SPC300ARIZONA
+#ifndef CONFIG_SYNOP3504_NO_TX_TIMEOUT
static void synop3504_tx_timeout(struct net_device *dev)
{
dev->stats.tx_errors++;
@@ -1383,6 +1383,11 @@ static int synop3504_mii_probe(struct net_device *dev)
phydev->supported &= PHY_GBIT_FEATURES;
phydev->advertising = phydev->supported;
+#ifdef CONFIG_SYNOP3504_NO_GIGABIT
+ phydev->advertising &= ~(SUPPORTED_1000baseT_Half
+ | SUPPORTED_1000baseT_Full);
+#endif
+
priv->link = 0;
priv->speed = 0;
priv->duplex = -1;
@@ -1479,6 +1484,31 @@ static int synop3504_open(struct net_device *dev)
mdio_write(dev, priv->phy_addr, MII_BMCR, BMCR_RESET);
while(mdio_read(dev, priv->phy_addr, MII_BMCR) & BMCR_RESET);
+#ifdef CONFIG_SYNOP3504_PHY_DINI
+
+ //The PHY used on SPC300DINI is VSC8601. Its phy_id is 0x70421.
+ BUG_ON(priv->phydev->phy_id != 0x70421);
+
+ //Add a 2ns delay for TX and RX clock.
+
+ //In register 23 "Extended Phy Control 1", enable "RGMII skew timing
+ //compensation".
+ mdio_write(dev, priv->phy_addr, 23, 0x0100);
+
+ //To access the extended register 28E, put 1 in register 31 "Extended Page
+ //Access".
+ mdio_write(dev, priv->phy_addr, 31, 0x0001);
+
+ //In register 28E "RGMII Skew Control", set both TX and RX RGMII Skew
+ //compensation to 2ns.
+ mdio_write(dev, priv->phy_addr, 28, 0xf000);
+
+ //Switch back to main register space, by putting 0 in register 31 "Extended
+ //Page Access".
+ mdio_write(dev, priv->phy_addr, 31, 0x0000);
+
+#endif /* CONFIG_SYNOP3504_PHY_DINI */
+
//Initialise DMA descriptors
synop3504_txdesc_init(dev);
synop3504_rxdesc_init(dev);
@@ -1597,7 +1627,7 @@ static int synop3504_init(struct net_device *dev)
dev->hard_start_xmit = synop3504_tx;
dev->get_stats = synop3504_stats;
dev->set_multicast_list = synop3504_set_multicast;
-#ifndef CONFIG_CHIP_SPC300ARIZONA
+#ifndef CONFIG_SYNOP3504_NO_TX_TIMEOUT
dev->tx_timeout = synop3504_tx_timeout;
dev->watchdog_timeo = TX_TIMEOUT;
#endif