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authorFisher Cheng2013-05-24 16:54:08 +0800
committerJulien Lacour2013-10-01 12:12:48 +0200
commit8c1eb022607c0aba81d93b961abbfb47a2dcc325 (patch)
tree13b1cd55172e93b3d1e5baa7141ba259fd71b0af /cleopatre/devkit/mt7601udrv/mcu
parent9e4d9d72dcac9686f1b4720e46e3bb88f6375a1e (diff)
cleo/devkit: add MTK MT7601U drv source code, refs #4011
- Enable Wireless LAN and Wireless extension in linux26.config
Diffstat (limited to 'cleopatre/devkit/mt7601udrv/mcu')
-rw-r--r--cleopatre/devkit/mt7601udrv/mcu/bin/MT7601.binbin0 -> 45412 bytes
-rw-r--r--cleopatre/devkit/mt7601udrv/mcu/bin/MT7601_formal_1.5.binbin0 -> 45412 bytes
-rw-r--r--cleopatre/devkit/mt7601udrv/mcu/bin/MT7601_formal_1.5_Debug.binbin0 -> 49784 bytes
-rw-r--r--cleopatre/devkit/mt7601udrv/mcu/rtmp_M51.c710
-rw-r--r--cleopatre/devkit/mt7601udrv/mcu/rtmp_and.c2071
-rw-r--r--cleopatre/devkit/mt7601udrv/mcu/rtmp_mcu.c77
6 files changed, 2858 insertions, 0 deletions
diff --git a/cleopatre/devkit/mt7601udrv/mcu/bin/MT7601.bin b/cleopatre/devkit/mt7601udrv/mcu/bin/MT7601.bin
new file mode 100644
index 0000000000..62b3894310
--- /dev/null
+++ b/cleopatre/devkit/mt7601udrv/mcu/bin/MT7601.bin
Binary files differ
diff --git a/cleopatre/devkit/mt7601udrv/mcu/bin/MT7601_formal_1.5.bin b/cleopatre/devkit/mt7601udrv/mcu/bin/MT7601_formal_1.5.bin
new file mode 100644
index 0000000000..62b3894310
--- /dev/null
+++ b/cleopatre/devkit/mt7601udrv/mcu/bin/MT7601_formal_1.5.bin
Binary files differ
diff --git a/cleopatre/devkit/mt7601udrv/mcu/bin/MT7601_formal_1.5_Debug.bin b/cleopatre/devkit/mt7601udrv/mcu/bin/MT7601_formal_1.5_Debug.bin
new file mode 100644
index 0000000000..ac487d1aec
--- /dev/null
+++ b/cleopatre/devkit/mt7601udrv/mcu/bin/MT7601_formal_1.5_Debug.bin
Binary files differ
diff --git a/cleopatre/devkit/mt7601udrv/mcu/rtmp_M51.c b/cleopatre/devkit/mt7601udrv/mcu/rtmp_M51.c
new file mode 100644
index 0000000000..e1972add58
--- /dev/null
+++ b/cleopatre/devkit/mt7601udrv/mcu/rtmp_M51.c
@@ -0,0 +1,710 @@
+/*
+ ***************************************************************************
+ * Ralink Tech Inc.
+ * 4F, No. 2 Technology 5th Rd.
+ * Science-based Industrial Park
+ * Hsin-chu, Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2004, Ralink Technology, Inc.
+ *
+ * All rights reserved. Ralink's source code is an unpublished work and the
+ * use of a copyright notice does not imply otherwise. This source code
+ * contains confidential trade secret material of Ralink Tech. Any attemp
+ * or participation in deciphering, decoding, reverse engineering or in any
+ * way altering the source code is stricitly prohibited, unless the prior
+ * written consent of Ralink Technology, Inc. is obtained.
+ ***************************************************************************
+
+ Module Name:
+ rtmp_M51.c
+
+ Abstract:
+
+ Revision History:
+ Who When What
+ -------- ---------- ----------------------------------------------
+*/
+
+
+#include "rt_config.h"
+#include "firmware.h"
+
+
+#ifdef RTMP_MAC_USB
+
+/* RT2870 Firmware Spec only used 1 oct for version expression*/
+
+#define FIRMWARE_MINOR_VERSION 7
+#endif /* RTMP_MAC_USB */
+
+/* New 8k byte firmware size for RT3071/RT3072*/
+#define FIRMWAREIMAGE_MAX_LENGTH 0x2000
+#ifdef WOW_SUPPORT
+#define FIRMWAREIMAGE_WOW_LENGTH 0x3000 /* WOW support firmware(12KB) */
+#endif/*WOW_SUPPORT*/
+#define FIRMWAREIMAGE_LENGTH (sizeof (FirmwareImage) / sizeof(UCHAR))
+#define FIRMWARE_MAJOR_VERSION 0
+
+#define FIRMWAREIMAGEV1_LENGTH 0x1000
+#define FIRMWAREIMAGEV2_LENGTH 0x1000
+#ifdef WOW_SUPPORT
+#define FIRMWAREIMAGEV3_LENGTH 0x2000 /* WOW support firmware */
+#endif/*WOW_SUPPORT*/
+
+
+const unsigned short ccitt_16Table[] = {
+ 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
+ 0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
+ 0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
+ 0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
+ 0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
+ 0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
+ 0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
+ 0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
+ 0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
+ 0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
+ 0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
+ 0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
+ 0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
+ 0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
+ 0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
+ 0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
+ 0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
+ 0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
+ 0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
+ 0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
+ 0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
+ 0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+ 0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
+ 0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
+ 0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
+ 0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
+ 0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
+ 0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
+ 0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
+ 0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
+ 0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
+ 0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
+};
+#define ByteCRC16(v, crc) \
+ (unsigned short)((crc << 8) ^ ccitt_16Table[((crc >> 8) ^ (v)) & 255])
+
+unsigned char BitReverse(unsigned char x)
+{
+ int i;
+ unsigned char Temp=0;
+ for(i=0; ; i++)
+ {
+ if(x & 0x80) Temp |= 0x80;
+ if(i==7) break;
+ x <<= 1;
+ Temp >>= 1;
+ }
+ return Temp;
+}
+
+
+/*
+ ========================================================================
+
+ Routine Description:
+ erase 8051 firmware image in MAC ASIC
+
+ Arguments:
+ Adapter Pointer to our adapter
+
+ IRQL = PASSIVE_LEVEL
+
+ ========================================================================
+*/
+INT RtmpAsicEraseFirmware(
+ IN PRTMP_ADAPTER pAd)
+{
+ UINT32 i;
+
+ for(i = 0; i < MAX_FIRMWARE_IMAGE_SIZE; i += 4)
+ RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
+
+ return 0;
+}
+
+NDIS_STATUS isMCUNeedToLoadFIrmware(
+ IN PRTMP_ADAPTER pAd)
+{
+ NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
+ ULONG Index;
+ UINT32 MacReg;
+
+ Index = 0;
+
+ do {
+ if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
+ return NDIS_STATUS_FAILURE;
+
+ RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
+
+ if (MacReg & 0x100) /* check bit 8*/
+ break;
+
+ RTMPusecDelay(1000);
+ } while (Index++ < 100);
+
+ if (Index >= 100)
+ Status = NDIS_STATUS_FAILURE;
+
+ return Status;
+}
+
+NDIS_STATUS isMCUnotReady(
+ IN PRTMP_ADAPTER pAd)
+{
+ NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
+ ULONG Index;
+ UINT32 MacReg;
+
+#ifdef RT65xx
+ // TODO: shiang-6590, fix me, currently firmware is not ready yet, so ignore it!
+ if (IS_RT65XX(pAd)) {
+ DBGPRINT(RT_DEBUG_ERROR, ("%s(): Ignore for MCU status check for 6590 now!\n", __FUNCTION__));
+ return Status;
+ }
+#endif /* RT65xx */
+
+#ifdef MT7601
+ if (IS_MT7601(pAd)) {
+ DBGPRINT(RT_DEBUG_ERROR, ("%s(): Ignore for MCU status check for MT7601 now!\n", __FUNCTION__));
+ return Status;
+ }
+#endif /* MT7601 */
+
+ Index = 0;
+
+ do {
+ if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
+ return NDIS_STATUS_FAILURE;
+
+ RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
+
+ if (MacReg & 0x80) /* check bit 7*/
+ break;
+
+ RTMPusecDelay(1000);
+ } while (Index++ < 1000);
+
+ if (Index >= 1000)
+ Status = NDIS_STATUS_FAILURE;
+
+ return Status;
+}
+/*
+ ========================================================================
+
+ Routine Description:
+ Load 8051 firmware file into MAC ASIC
+
+ Arguments:
+ Adapter Pointer to our adapter
+
+ Return Value:
+ NDIS_STATUS_SUCCESS firmware image load ok
+ NDIS_STATUS_FAILURE image not found
+
+ IRQL = PASSIVE_LEVEL
+
+ ========================================================================
+*/
+NDIS_STATUS RtmpAsicLoadFirmware(
+ IN PRTMP_ADAPTER pAd)
+{
+#ifdef BIN_IN_FILE
+#define NICLF_DEFAULT_USE() \
+ flg_default_firm_use = TRUE; \
+ DBGPRINT(RT_DEBUG_OFF, ("%s - Use default firmware!\n", __FUNCTION__));
+
+ NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
+ PUCHAR src;
+ RTMP_OS_FD srcf;
+ INT retval, i;
+ PUCHAR pFirmwareImage;
+ INT FileLength = 0;
+ UINT32 MacReg;
+ ULONG Index;
+ ULONG firm;
+ BOOLEAN flg_default_firm_use = FALSE;
+ RTMP_OS_FS_INFO osFSInfo;
+
+ DBGPRINT(RT_DEBUG_TRACE, ("===> %s\n", __FUNCTION__));
+
+ /* init */
+ pFirmwareImage = NULL;
+ src = RTMP_FIRMWARE_FILE_NAME;
+
+ RtmpOSFSInfoChange(&osFSInfo, TRUE);
+
+ pAd->FirmwareVersion = (FIRMWARE_MAJOR_VERSION << 8) + \
+ FIRMWARE_MINOR_VERSION;
+
+
+ /* allocate firmware buffer */
+/* pFirmwareImage = kmalloc(MAX_FIRMWARE_IMAGE_SIZE, MEM_ALLOC_FLAG);*/
+ os_alloc_mem(pAd, (UCHAR **)&pFirmwareImage, MAX_FIRMWARE_IMAGE_SIZE);
+ if (pFirmwareImage == NULL)
+ {
+ /* allocate fail, use default firmware array in firmware.h */
+ DBGPRINT(RT_DEBUG_ERROR, ("%s - Allocate memory fail!\n", __FUNCTION__));
+ NICLF_DEFAULT_USE();
+ }
+ else
+ {
+ /* allocate ok! zero the firmware buffer */
+ memset(pFirmwareImage, 0x00, MAX_FIRMWARE_IMAGE_SIZE);
+ }
+
+
+ /* if ok, read firmware file from *.bin file */
+ if (flg_default_firm_use == FALSE)
+ {
+ do
+ {
+ /* open the bin file */
+ srcf = RtmpOSFileOpen(src, O_RDONLY, 0);
+
+ if (IS_FILE_OPEN_ERR(srcf))
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("%s - Error opening file %s\n", __FUNCTION__, src));
+ NICLF_DEFAULT_USE();
+ break;
+ }
+
+
+ /* read the firmware from the file *.bin */
+ FileLength = RtmpOSFileRead(srcf, pFirmwareImage, MAX_FIRMWARE_IMAGE_SIZE);
+ if (FileLength != MAX_FIRMWARE_IMAGE_SIZE)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("%s: error file length (=%d) in RT2860AP.BIN\n",
+ __FUNCTION__, FileLength));
+ NICLF_DEFAULT_USE();
+ break;
+ }
+ else
+ {
+ PUCHAR ptr = pFirmwareImage;
+ USHORT crc = 0xffff;
+
+
+ /* calculate firmware CRC */
+ for(i=0; i<(MAX_FIRMWARE_IMAGE_SIZE-2); i++, ptr++)
+ crc = ByteCRC16(BitReverse(*ptr), crc);
+
+ if ((pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2] != \
+ (UCHAR)BitReverse((UCHAR)(crc>>8))) ||
+ (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1] != \
+ (UCHAR)BitReverse((UCHAR)crc)))
+ {
+ /* CRC fail */
+ DBGPRINT(RT_DEBUG_ERROR, ("%s: CRC = 0x%02x 0x%02x "
+ "error, should be 0x%02x 0x%02x\n",
+ __FUNCTION__,
+ pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2],
+ pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1],
+ (UCHAR)(crc>>8), (UCHAR)(crc)));
+ NICLF_DEFAULT_USE();
+ break;
+ }
+ else
+ {
+ /* firmware is ok */
+ pAd->FirmwareVersion = \
+ (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4] << 8) +
+ pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3];
+
+ /* check if firmware version of the file is too old */
+ if ((pAd->FirmwareVersion) < \
+ ((FIRMWARE_MAJOR_VERSION << 8) +
+ FIRMWARE_MINOR_VERSION))
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("%s: firmware version too old!\n", __FUNCTION__));
+ NICLF_DEFAULT_USE();
+ break;
+ }
+ }
+
+ DBGPRINT(RT_DEBUG_TRACE,
+ ("NICLoadFirmware: CRC ok, ver=%d.%d\n",
+ pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4],
+ pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3]));
+ }
+ break;
+ } while(TRUE);
+
+ /* close firmware file */
+ if (IS_FILE_OPEN_ERR(srcf))
+ ;
+ else
+ {
+ retval = RtmpOSFileClose(srcf);
+ if (retval)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("--> Error %d closing %s\n", -retval, src));
+ }
+ }
+ }
+
+
+ /* write firmware to ASIC */
+ if (flg_default_firm_use == TRUE)
+ {
+ /* use default fimeware, free allocated buffer */
+ if (pFirmwareImage != NULL)
+ os_free_mem(NULL, pFirmwareImage);
+
+ /* use default *.bin array */
+ pFirmwareImage = FirmwareImage;
+ FileLength = sizeof(FirmwareImage);
+ }
+
+ /* enable Host program ram write selection */
+ RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x10000);
+
+ for(i=0; i<FileLength; i+=4)
+ {
+ firm = pFirmwareImage[i] +
+ (pFirmwareImage[i+3] << 24) +
+ (pFirmwareImage[i+2] << 16) +
+ (pFirmwareImage[i+1] << 8);
+
+ RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, firm);
+ }
+
+ RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00000);
+ RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00001);
+
+ /* initialize BBP R/W access agent */
+ RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0);
+ RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
+
+ if (flg_default_firm_use == FALSE)
+ {
+ /* use file firmware, free allocated buffer */
+ if (pFirmwareImage != NULL)
+ os_free_mem(NULL, pFirmwareImage);
+ }
+
+ RtmpOSFSInfoChange(&osFSInfo, FALSE);
+#else
+
+ NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
+ PUCHAR pFirmwareImage;
+ ULONG FileLength;
+ UINT32 Version = (pAd->MACVersion >> 16);
+#ifdef RTMP_MAC_USB
+ BOOLEAN Equal = TRUE;
+ UINT32 MacReg1 = 0;
+ UCHAR FVer;
+ UINT16 FCS;
+#endif
+
+
+ pFirmwareImage = FirmwareImage;
+ FileLength = sizeof(FirmwareImage);
+
+#ifdef RTMP_MAC_USB
+ /* check firmware version and checksum in RAM and firmware.h */
+ /* if they are equal, then will skip firmware load procedure */
+ if (isMCUNeedToLoadFIrmware(pAd) == NDIS_STATUS_SUCCESS)
+ {
+ RTMP_IO_READ32(pAd, 0x3FFC, &MacReg1);
+ FVer = (MacReg1 >> 8) & 0x00FF;
+ FCS = (MacReg1 >> 16) & 0xFFFF;
+
+
+#ifdef WOW_SUPPORT
+ if (pAd->WOW_Cfg.bWOWFirmware == TRUE)
+ {
+ UCHAR ver = FirmwareImage[FIRMWAREIMAGEV3_LENGTH+0xFFD];
+ UINT16 sum ;
+
+ NdisCopyMemory(&sum, &FirmwareImage[FIRMWAREIMAGEV3_LENGTH+0xFFE], 2);
+ printk("%s: ver %x/%x, sum %x/%x, mac %x\n", __FUNCTION__, FVer, ver, FCS, sum, MacReg1);
+ if ( FVer != ver || FCS != sum )
+ Equal = FALSE;
+ }
+ else
+#endif /* WOW_SUPPORT */
+ {
+ UCHAR ver = FirmwareImage[FIRMWAREIMAGEV2_LENGTH+0xFFD];
+ UINT16 sum ;
+
+ NdisCopyMemory(&sum, &FirmwareImage[FIRMWAREIMAGEV2_LENGTH+0xFFE], 2);
+ printk("%s: ver %x/%x, sum %x/%x, mac %x\n", __FUNCTION__, FVer, ver, FCS, sum, MacReg1);
+ if ( FVer != ver || FCS != sum )
+ Equal = FALSE;
+ }
+
+ /* do not need to load firmware */
+ if (Equal == FALSE)
+ {
+ DBGPRINT(RT_DEBUG_OFF, ("%s: WOW stops to go into 4K ram codes ...\n", __FUNCTION__));
+
+#ifdef WOW_SUPPORT
+ /* Disable MAC TX/RX */
+ RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacReg1);
+ MacReg1 &= ~0xC;
+ RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacReg1);
+
+ /* Disable USB TX/RX DMA */
+ RTMP_IO_READ32(pAd, USB_DMA_CFG, &MacReg1);
+ MacReg1 &= ~0xC00000;
+ RTMP_IO_WRITE32(pAd, USB_DMA_CFG, MacReg1);
+
+ /* Clear Firmware(bit 8) ready bit to force firmware download*/
+ RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg1);
+ MacReg1 &= ~0x100;
+ RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacReg1);
+
+#endif /* WOW_SUPPORT */
+
+ /* prevent CPU to run in 4K ram codes */
+ /* only allow USB vendor request */
+ Status = RTUSB_VendorRequest(
+ pAd,
+ USBD_TRANSFER_DIRECTION_OUT,
+ DEVICE_VENDOR_REQUEST_OUT,
+ 0x14,
+ 0x0,
+ 0,
+ NULL,
+ 0);
+
+ /* disable external functions */
+ Status = RTUSB_VendorRequest(
+ pAd,
+ USBD_TRANSFER_DIRECTION_OUT,
+ DEVICE_VENDOR_REQUEST_OUT,
+ 0x12,
+ 0x0,
+ 0,
+ NULL,
+ 0);
+ }
+ }
+
+#endif /* RTMP_MAC_USB */
+
+ /* New 8k byte firmware size for RT3071/RT3072*/
+ /*DBGPRINT(RT_DEBUG_TRACE, ("Usb Chip\n"));*/
+ if (FIRMWAREIMAGE_LENGTH == FIRMWAREIMAGE_MAX_LENGTH)
+ /*The firmware image consists of two parts. One is the origianl and the other is the new.*/
+ /*Use Second Part*/
+ {
+#ifdef RTMP_MAC_USB
+ if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070))
+ { /* Use Firmware V2.*/
+ /*printk("KH:Use New Version,part2\n");*/
+ pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV1_LENGTH];
+ FileLength = FIRMWAREIMAGEV2_LENGTH;
+ }
+ else
+ {
+ /*printk("KH:Use New Version,part1\n");*/
+ pFirmwareImage = FirmwareImage;
+ FileLength = FIRMWAREIMAGEV1_LENGTH;
+ }
+#endif /* RTMP_MAC_USB */
+ }
+ else
+ {
+#if defined(WOW_SUPPORT) && defined(RTMP_MAC_USB)
+ /* WOW firmware is 12KB */
+ if ((Version != 0x2860) && (Version != 0x2872) && (Version != 0x3070))
+ {
+ if (FIRMWAREIMAGE_LENGTH == FIRMWAREIMAGE_WOW_LENGTH) /* size 0x3000 */
+ {
+ if (pAd->WOW_Cfg.bWOWFirmware == TRUE)
+ {
+ pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV3_LENGTH]; /* WOW offset: 0x2000 */
+ FileLength = FIRMWAREIMAGEV1_LENGTH; /* 0x1000 */
+ DBGPRINT(RT_DEBUG_OFF, ("%s: Load WOW firmware!!\n", __FUNCTION__));
+ }
+ else
+ {
+ pFirmwareImage = (PUCHAR)&FirmwareImage[FIRMWAREIMAGEV2_LENGTH]; /* normal offset: 0x1000 */
+ FileLength = FIRMWAREIMAGEV1_LENGTH; /* 0x1000 */
+ DBGPRINT(RT_DEBUG_OFF, ("%s: Load normal firmware!!\n", __FUNCTION__));
+ }
+
+ }
+ }
+ else
+#endif /* defined(WOW_SUPPORT) && defined(RTMP_MAC_USB) */
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("KH: bin file should be 8KB.\n"));
+ Status = NDIS_STATUS_FAILURE;
+ }
+ }
+
+#ifdef RTMP_MAC_USB
+ /* firmware is never loaded or the loadable firmware is different with the firmware in the RAM */
+ if (isMCUNeedToLoadFIrmware(pAd) || Equal == FALSE )
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: We need to load firmware\n"));
+ RTMP_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength); /* FirmwareRun VndReq 0x1/0x8 --> initDone = 1 */
+ }
+ else {
+ DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: firmware loaded already\n"));
+ RTUSB_VendorRequest(
+ pAd,
+ USBD_TRANSFER_DIRECTION_OUT,
+ DEVICE_VENDOR_REQUEST_OUT,
+ 0x01,
+ 0x8,
+ 0,
+ NULL,
+ 0);
+ }
+#else
+ RTMP_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
+#endif /* RTMP_MAC_USB */
+
+#endif
+
+ if (isMCUnotReady(pAd))
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("%s(): MCU is not ready!\n\n\n", __FUNCTION__));
+ Status = NDIS_STATUS_FAILURE;
+ }
+#ifdef RTMP_USB_SUPPORT
+ else
+ {
+ RTUSBWriteMACRegister(pAd, H2M_BBP_AGENT, 0, FALSE); /* initialize BBP R/W access agent. */
+ RTUSBWriteMACRegister(pAd,H2M_MAILBOX_CSR,0, FALSE);
+ RTUSBWriteMACRegister(pAd, H2M_INT_SRC, 0, FALSE);
+ AsicSendCommandToMcu(pAd, 0x72, 0x00, 0x00, 0x00, FALSE); /* reset rf by MCU supported by new firmware */
+ }
+#ifdef WOW_SUPPORT
+ if (pAd->WOW_Cfg.bEnable == TRUE)
+ {
+ /* Enable MAC TX/RX */
+ RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacReg1);
+ MacReg1 |= 0xC;
+ RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacReg1);
+
+ /* Enble USB TX/RX DMA */
+ RTMP_IO_READ32(pAd, USB_DMA_CFG, &MacReg1);
+ MacReg1 |= 0xC00000;
+ RTMP_IO_WRITE32(pAd, USB_DMA_CFG, MacReg1);
+
+ /* Set Firmware ready bit(bit8) */
+ RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg1);
+ MacReg1 |= 0x100;
+ RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, MacReg1);
+
+ /* need to reset, because interface-up will be normal firmware */
+ pAd->WOW_Cfg.bWOWFirmware = FALSE;
+
+ }
+#endif /* WOW_SUPPORT */
+
+ if (Equal == FALSE)
+ {
+ /* allow all requests (USB vendor request, sleep, wake up, led) */
+ Status = RTUSB_VendorRequest(
+ pAd,
+ USBD_TRANSFER_DIRECTION_OUT,
+ DEVICE_VENDOR_REQUEST_OUT,
+ 0x13,
+ 0x0,
+ 0,
+ NULL,
+ 0);
+ }
+
+#endif /* RTMP_USB_SUPPORT */
+
+ DBGPRINT(RT_DEBUG_TRACE, ("<=== %s (status=%d)\n", __FUNCTION__, Status));
+
+ return Status;
+}
+
+
+INT RtmpAsicSendCommandToMcu(
+ IN PRTMP_ADAPTER pAd,
+ IN UCHAR Command,
+ IN UCHAR Token,
+ IN UCHAR Arg0,
+ IN UCHAR Arg1,
+ IN BOOLEAN FlgIsNeedLocked)
+{
+ HOST_CMD_CSR_STRUC H2MCmd;
+ H2M_MAILBOX_STRUC H2MMailbox;
+ INT i = 0;
+ int ret;
+
+
+
+
+
+ {
+
+#ifdef RTMP_MAC_USB
+ if (IS_USB_INF(pAd) && (!FlgIsNeedLocked))
+ {
+ RTMP_SEM_EVENT_WAIT(&pAd->reg_atomic, ret);
+ if (ret != 0)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("reg_atomic get failed(ret=%d)\n", ret));
+ return FALSE;
+ }
+ }
+#endif /* RTMP_MAC_USB */
+
+ ret = FALSE;
+ do
+ {
+ RTMP_IO_READ32(pAd, H2M_MAILBOX_CSR, &H2MMailbox.word);
+ if (H2MMailbox.field.Owner == 0)
+ break;
+
+ if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))
+ {
+ goto done;
+ }
+ RTMPusecDelay(2);
+ } while(i++ < 100);
+
+ if (i >= 100)
+ {
+ {
+ DBGPRINT_ERR(("H2M_MAILBOX still hold by MCU. command fail\n"));
+ }
+ goto done;
+ }
+
+ H2MMailbox.field.Owner = 1; /* pass ownership to MCU*/
+ H2MMailbox.field.CmdToken = Token;
+ H2MMailbox.field.HighByte = Arg1;
+ H2MMailbox.field.LowByte = Arg0;
+ RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, H2MMailbox.word);
+
+ H2MCmd.word = 0;
+ H2MCmd.field.HostCommand = Command;
+ RTMP_IO_WRITE32(pAd, HOST_CMD_CSR, H2MCmd.word);
+}
+
+
+ if (Command == WAKE_MCU_CMD)
+ pAd->LastMCUCmd = Command;
+
+ ret = TRUE;
+
+done:
+#ifdef RTMP_MAC_USB
+ if (IS_USB_INF(pAd) && (!FlgIsNeedLocked))
+ {
+ RTMP_SEM_EVENT_UP(&pAd->reg_atomic);
+ }
+#endif /* RTMP_MAC_USB */
+
+ return ret;
+}
+
diff --git a/cleopatre/devkit/mt7601udrv/mcu/rtmp_and.c b/cleopatre/devkit/mt7601udrv/mcu/rtmp_and.c
new file mode 100644
index 0000000000..4f81e1940b
--- /dev/null
+++ b/cleopatre/devkit/mt7601udrv/mcu/rtmp_and.c
@@ -0,0 +1,2071 @@
+/*
+ ***************************************************************************
+ * Ralink Tech Inc.
+ * 4F, No. 2 Technology 5th Rd.
+ * Science-based Industrial Park
+ * Hsin-chu, Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2004, Ralink Technology, Inc.
+ *
+ * All rights reserved. Ralink's source code is an unpublished work and the
+ * use of a copyright notice does not imply otherwise. This source code
+ * contains confidential trade secret material of Ralink Tech. Any attemp
+ * or participation in deciphering, decoding, reverse engineering or in any
+ * way altering the source code is stricitly prohibited, unless the prior
+ * written consent of Ralink Technology, Inc. is obtained.
+ ***************************************************************************
+
+ Module Name:
+ rtmp_and.c
+
+ Abstract:
+ on-chip CPU related codes
+
+ Revision History:
+ Who When What
+ -------- ---------- ----------------------------------------------
+*/
+
+#include "rt_config.h"
+
+
+#ifdef RT_BIG_ENDIAN
+typedef struct GNU_PACKED _TXINFO_NMAC_CMD_PKT{
+ UINT32 info_type:2;
+ UINT32 d_port:3;
+ UINT32 cmd_type:7;
+ UINT32 cmd_seq:4;
+ UINT32 pkt_len:16;
+}TXINFO_NMAC_CMD_PKT;
+#else
+typedef struct GNU_PACKED _TXINFO_NMAC_CMD_PKT {
+ UINT32 pkt_len:16;
+ UINT32 cmd_seq:4;
+ UINT32 cmd_type:7;
+ UINT32 d_port:3;
+ UINT32 info_type:2;
+}TXINFO_NMAC_CMD_PKT;
+#endif /* RT_BIG_ENDIAN */
+
+
+
+
+#ifdef RTMP_USB_SUPPORT
+
+USBHST_STATUS USBUploadFWComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs)
+{
+ VOID *SentToMCUDone = RTMP_OS_USB_CONTEXT_GET(pURB);
+
+ RtmpComplete(SentToMCUDone);
+}
+
+
+static NDIS_STATUS USBLoadIVB(RTMP_ADAPTER *pAd)
+{
+ NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
+ UINT32 i;
+ USHORT Value;
+ USHORT Index;
+ USHORT Temp;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+
+ Status = RTUSB_VendorRequest(pAd,
+ USBD_TRANSFER_DIRECTION_OUT,
+ DEVICE_VENDOR_REQUEST_OUT,
+ 0x01,
+ 0x12,
+ 0x00,
+ pChipCap->FWImageName + 32,
+ 64);
+
+ if (Status)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("Upload IVB Fail\n"));
+ return Status;
+ }
+
+ return Status;
+}
+
+
+NDIS_STATUS USBLoadFirmwareToAndes(RTMP_ADAPTER *pAd)
+{
+ PURB pURB;
+ NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
+ POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie;
+ ra_dma_addr_t DataDMA;
+ PUCHAR DataBuffer;
+ TXINFO_NMAC_CMD *TxInfoCmd;
+ INT32 SentLen;
+ UINT32 CurLen;
+ UINT32 MACValue, Loop = 0;
+ USHORT Value;
+ INT Ret;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+ USB_DMA_CFG_STRUC UsbCfg;
+ struct MCU_CTRL *MCtrl = &pAd->MCUCtrl;
+ //struct completion SentToMCUDone;
+ VOID *SentToMCUDone;
+ UINT32 ILMLen, DLMLen;
+ USHORT FWVersion, BuildVersion;
+
+ DBGPRINT(RT_DEBUG_TRACE, ("%s\n", __FUNCTION__));
+
+ if (pChipCap->IsComboChip)
+ {
+loadfw_protect:
+ RTUSBReadMACRegister(pAd, SEMAPHORE_00, &MACValue);
+ Loop++;
+
+ if (((MACValue & 0x01) == 0) && (Loop < 10000))
+ goto loadfw_protect;
+ }
+
+ /* Enable USB_DMA_CFG */
+ RTUSBWriteMACRegister(pAd, USB_DMA_CFG, 0xC00000, FALSE);
+
+ /* Check MCU if ready */
+ RTUSBReadMACRegister(pAd, COM_REG0, &MACValue);
+
+ if (MACValue == 0x01)
+ goto error0;
+
+ RTUSBVenderReset(pAd);
+ //mdelay(5);
+ RtmpOsMsDelay(5);
+
+ ILMLen = (*(pChipCap->FWImageName + 3) << 24) | (*(pChipCap->FWImageName + 2) << 16) |
+ (*(pChipCap->FWImageName + 1) << 8) | (*pChipCap->FWImageName);
+
+ DLMLen = (*(pChipCap->FWImageName + 7) << 24) | (*(pChipCap->FWImageName + 6) << 16) |
+ (*(pChipCap->FWImageName + 5) << 8) | (*(pChipCap->FWImageName + 4));
+
+ FWVersion = (*(pChipCap->FWImageName + 11) << 8) | (*(pChipCap->FWImageName + 10));
+
+ BuildVersion = (*(pChipCap->FWImageName + 9) << 8) | (*(pChipCap->FWImageName + 8));
+
+ DBGPRINT(RT_DEBUG_OFF, ("FW Version:%d.%d.%02d ", (FWVersion & 0xf000) >> 8,
+ (FWVersion & 0x0f00) >> 8, FWVersion & 0x00ff));
+ DBGPRINT(RT_DEBUG_OFF, ("Build:%x\n", BuildVersion));
+ DBGPRINT(RT_DEBUG_OFF, ("Build Time:"));
+
+ for (Loop = 0; Loop < 16; Loop++)
+ DBGPRINT(RT_DEBUG_OFF, ("%c", *(pChipCap->FWImageName + 16 + Loop)));
+
+ DBGPRINT(RT_DEBUG_OFF, ("\n"));
+
+ DBGPRINT(RT_DEBUG_OFF, ("ILM Length = %d(bytes)\n", ILMLen));
+ DBGPRINT(RT_DEBUG_OFF, ("DLM Length = %d(bytes)\n", DLMLen));
+
+ RTMP_IO_WRITE32(pAd, 0xa44, 0x0);
+
+ RTMP_IO_WRITE32(pAd, 0x230, 0x84210);
+ //RTMP_IO_WRITE32(pAd, 0x230, 0x41210);
+
+ RTMP_IO_WRITE32(pAd, 0x400, 0x80c00);
+
+ RTMP_IO_WRITE32(pAd, 0x800, 0x01);
+
+ RTMP_IO_READ32(pAd, 0x0404, &MACValue);
+ MACValue |= 0xF;
+ RTMP_IO_WRITE32(pAd, 0x0404, MACValue);
+
+ /* Enable FCE */
+ RTMP_IO_WRITE32(pAd, FCE_PSE_CTRL, 0x01);
+
+ /* Enable USB_DMA_CFG */
+ RTMP_IO_WRITE32(pAd, USB_DMA_CFG, 0xC00000);
+
+#ifdef MT7601
+ if ( IS_MT7601(pAd) )
+ {
+ USB_DMA_CFG_STRUC UsbCfg;
+
+ RTMP_IO_READ32(pAd, USB_DMA_CFG, &UsbCfg.word);
+ UsbCfg.field.TxClear = 1;
+ RTMP_IO_WRITE32(pAd, USB_DMA_CFG, UsbCfg.word);
+ UsbCfg.field.TxClear = 0;
+ RTMP_IO_WRITE32(pAd, USB_DMA_CFG, UsbCfg.word);
+ }
+#endif /* MT7601 */
+
+ /* FCE tx_fs_base_ptr */
+ RTMP_IO_WRITE32(pAd, TX_CPU_PORT_FROM_FCE_BASE_PTR, 0x400230);
+
+ /* FCE tx_fs_max_cnt */
+ RTMP_IO_WRITE32(pAd, TX_CPU_PORT_FROM_FCE_MAX_COUNT, 0x01);
+
+ /* FCE pdma enable */
+ RTMP_IO_WRITE32(pAd, FCE_PDMA_GLOBAL_CONF, 0x44);
+
+ /* FCE skip_fs_en */
+ RTMP_IO_WRITE32(pAd, FCE_SKIP_FS, 0x03);
+
+ /* Allocate URB */
+ pURB = RTUSB_ALLOC_URB(0);
+
+ if (!pURB)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("Can not allocate URB\n"));
+ Status = NDIS_STATUS_RESOURCES;
+ goto error0;
+ }
+
+ /* Allocate TransferBuffer */
+ DataBuffer = RTUSB_URB_ALLOC_BUFFER(pObj->pUsb_Dev, 14592, &DataDMA);
+
+ if (!DataBuffer)
+ {
+ Status = NDIS_STATUS_RESOURCES;
+ goto error1;
+ }
+
+
+ DBGPRINT(RT_DEBUG_OFF, ("Loading FW"));
+
+ //init_completion(&SentToMCUDone);
+ SentToMCUDone = RtmpInitCompletion();
+
+ CurLen = 0x40;
+
+ /* Loading ILM */
+ while (1)
+ {
+/* ++ dump firmware ++ */
+/* ++ dump firmware ++ */
+
+ SentLen = (ILMLen - CurLen) >= 14336 ? 14336 : (ILMLen - CurLen);
+
+ if (SentLen > 0)
+ {
+ TxInfoCmd = (TXINFO_NMAC_CMD *)DataBuffer;
+ TxInfoCmd->info_type = CMD_PACKET;
+ TxInfoCmd->pkt_len = SentLen;
+ TxInfoCmd->d_port = CPU_TX_PORT;
+
+/* ++ dump firmware ++ */
+/* ++ dump firmware ++ */
+
+
+#ifdef RT_BIG_ENDIAN
+ RTMPDescriptorEndianChange((PUCHAR)TxInfoCmd, TYPE_TXINFO);
+#endif
+ NdisMoveMemory(DataBuffer + sizeof(*TxInfoCmd), pChipCap->FWImageName + 32 + CurLen, SentLen);
+
+ NdisZeroMemory(DataBuffer + sizeof(*TxInfoCmd) + SentLen, 4);
+
+ Value = CurLen & 0xFFFF;
+
+ /* Set FCE DMA descriptor */
+ Status = RTUSB_VendorRequest(pAd,
+ USBD_TRANSFER_DIRECTION_OUT,
+ DEVICE_VENDOR_REQUEST_OUT,
+ 0x42,
+ Value,
+ 0x230,
+ NULL,
+ 0);
+
+
+ if (Status)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("Set FCE DMA descriptor fail\n"));
+ goto error2;
+ }
+
+ Value = ((CurLen & 0xFFFF0000) >> 16);
+
+ /* Set FCE DMA descriptor */
+ Status = RTUSB_VendorRequest(pAd,
+ USBD_TRANSFER_DIRECTION_OUT,
+ DEVICE_VENDOR_REQUEST_OUT,
+ 0x42,
+ Value,
+ 0x232,
+ NULL,
+ 0);
+
+ if (Status)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("Set FCE DMA descriptor fail\n"));
+ goto error2;
+ }
+
+
+
+ CurLen += SentLen;
+
+ while ((SentLen % 4) != 0)
+ SentLen++;
+
+ Value = ((SentLen << 16) & 0xFFFF);
+
+ /* Set FCE DMA length */
+ Status = RTUSB_VendorRequest(pAd,
+ USBD_TRANSFER_DIRECTION_OUT,
+ DEVICE_VENDOR_REQUEST_OUT,
+ 0x42,
+ Value,
+ 0x234,
+ NULL,
+ 0);
+
+ if (Status)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("Set FCE DMA length fail\n"));
+ goto error2;
+ }
+
+ Value = (((SentLen << 16) & 0xFFFF0000) >> 16);
+
+ /* Set FCE DMA length */
+ Status = RTUSB_VendorRequest(pAd,
+ USBD_TRANSFER_DIRECTION_OUT,
+ DEVICE_VENDOR_REQUEST_OUT,
+ 0x42,
+ Value,
+ 0x236,
+ NULL,
+ 0);
+
+ if (Status)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("Set FCE DMA length fail\n"));
+ goto error2;
+ }
+
+ /* Initialize URB descriptor */
+ RTUSB_FILL_HTTX_BULK_URB(pURB,
+ pObj->pUsb_Dev,
+ pChipCap->CommandBulkOutAddr,
+ DataBuffer,
+ SentLen + sizeof(*TxInfoCmd) + 4,
+ USBUploadFWComplete,
+ //&SentToMCUDone,
+ SentToMCUDone,
+ DataDMA);
+
+ Status = RTUSB_SUBMIT_URB(pURB);
+
+ if (Status)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("SUBMIT URB fail\n"));
+ goto error2;
+ }
+
+ DBGPRINT(RT_DEBUG_INFO, ("%s: submit URB, SentLen = %d, ILMLen = %d, CurLen = %d\n", __FUNCTION__, SentLen, ILMLen, CurLen));
+
+ //if (!wait_for_completion_timeout(&SentToMCUDone, msecs_to_jiffies(1000)))
+ if (!RtmpWaitForCompletionTimeout(SentToMCUDone, RtmpMsecsToJiffies(1000)))
+ {
+ RTUSB_UNLINK_URB(pURB);
+ Ret = NDIS_STATUS_FAILURE;
+ DBGPRINT(RT_DEBUG_ERROR, ("Upload FW timeout\n"));
+ goto error2;
+ }
+ DBGPRINT(RT_DEBUG_OFF, ("."));
+
+ RTMP_IO_READ32(pAd, TX_CPU_PORT_FROM_FCE_CPU_DESC_INDEX, &MACValue);
+ MACValue++;
+ RTMP_IO_WRITE32(pAd, TX_CPU_PORT_FROM_FCE_CPU_DESC_INDEX, MACValue);
+
+/* ++ dump firmware ++ */
+/* ++ dump firmware ++ */
+
+ }
+ else
+ {
+ break;
+ }
+
+ /* Check if DMA done */
+ Loop = 0;
+ do
+ {
+ RTMP_IO_READ32(pAd, COM_REG1, &MACValue);
+ if (MACValue & 0x80000000) // DDONE 0x400234, bit[31]
+ break;
+ Loop++;
+ RtmpOsMsDelay(5);
+ } while (Loop <= 100);
+
+ }
+
+ os_free_mem(NULL, SentToMCUDone);
+
+ //init_completion(&SentToMCUDone);
+ SentToMCUDone = RtmpInitCompletion();
+ CurLen = 0x00;
+
+ /* Loading DLM */
+ while (1)
+ {
+ SentLen = (DLMLen - CurLen) >= 14336 ? 14336 : (DLMLen - CurLen);
+
+ if (SentLen > 0)
+ {
+ TxInfoCmd = (TXINFO_NMAC_CMD *)DataBuffer;
+ TxInfoCmd->info_type = CMD_PACKET;
+ TxInfoCmd->pkt_len = SentLen;
+ TxInfoCmd->d_port = CPU_TX_PORT;
+
+#ifdef RT_BIG_ENDIAN
+ RTMPDescriptorEndianChange((PUCHAR)TxInfoCmd, TYPE_TXINFO);
+#endif
+ NdisMoveMemory(DataBuffer + sizeof(*TxInfoCmd), pChipCap->FWImageName + 32 + ILMLen + CurLen, SentLen);
+
+ NdisZeroMemory(DataBuffer + sizeof(*TxInfoCmd) + SentLen + 4, 4);
+
+ Value = ((CurLen + 0x80000) & 0xFFFF);
+
+ /* Set FCE DMA descriptor */
+ Status = RTUSB_VendorRequest(pAd,
+ USBD_TRANSFER_DIRECTION_OUT,
+ DEVICE_VENDOR_REQUEST_OUT,
+ 0x42,
+ Value,
+ 0x230,
+ NULL,
+ 0);
+
+
+ if (Status)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("Set FCE DMA descriptor fail\n"));
+ goto error2;
+ }
+
+ Value = (((CurLen + 0x80000) & 0xFFFF0000) >> 16);
+
+ /* Set FCE DMA descriptor */
+ Status = RTUSB_VendorRequest(pAd,
+ USBD_TRANSFER_DIRECTION_OUT,
+ DEVICE_VENDOR_REQUEST_OUT,
+ 0x42,
+ Value,
+ 0x232,
+ NULL,
+ 0);
+
+ if (Status)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("Set FCE DMA descriptor fail\n"));
+ goto error2;
+ }
+
+
+
+ CurLen += SentLen;
+
+ while ((SentLen % 4) != 0)
+ SentLen++;
+
+ Value = ((SentLen << 16) & 0xFFFF);
+
+ /* Set FCE DMA length */
+ Status = RTUSB_VendorRequest(pAd,
+ USBD_TRANSFER_DIRECTION_OUT,
+ DEVICE_VENDOR_REQUEST_OUT,
+ 0x42,
+ Value,
+ 0x234,
+ NULL,
+ 0);
+
+ if (Status)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("Set FCE DMA length fail\n"));
+ goto error2;
+ }
+
+ Value = (((SentLen << 16) & 0xFFFF0000) >> 16);
+
+ /* Set FCE DMA length */
+ Status = RTUSB_VendorRequest(pAd,
+ USBD_TRANSFER_DIRECTION_OUT,
+ DEVICE_VENDOR_REQUEST_OUT,
+ 0x42,
+ Value,
+ 0x236,
+ NULL,
+ 0);
+
+ if (Status)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("Set FCE DMA length fail\n"));
+ goto error2;
+ }
+
+ /* Initialize URB descriptor */
+ RTUSB_FILL_HTTX_BULK_URB(pURB,
+ pObj->pUsb_Dev,
+ pChipCap->CommandBulkOutAddr,
+ DataBuffer,
+ SentLen + sizeof(*TxInfoCmd) + 4,
+ USBUploadFWComplete,
+ //&SentToMCUDone,
+ SentToMCUDone,
+ DataDMA);
+
+ Status = RTUSB_SUBMIT_URB(pURB);
+
+ if (Status)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("SUBMIT URB fail\n"));
+ goto error2;
+ }
+
+ DBGPRINT(RT_DEBUG_INFO, ("%s: submit URB, SentLen = %d, DLMLen = %d, CurLen = %d\n", __FUNCTION__, SentLen, DLMLen, CurLen));
+
+ //if (!wait_for_completion_timeout(&SentToMCUDone, msecs_to_jiffies(1000)))
+ if (!RtmpWaitForCompletionTimeout(SentToMCUDone, RtmpMsecsToJiffies(1000)))
+ {
+ RTUSB_UNLINK_URB(pURB);
+ Ret = NDIS_STATUS_FAILURE;
+ DBGPRINT(RT_DEBUG_ERROR, ("Upload FW timeout\n"));
+ goto error2;
+ }
+ DBGPRINT(RT_DEBUG_OFF, ("."));
+
+ RTUSBReadMACRegister(pAd, TX_CPU_PORT_FROM_FCE_CPU_DESC_INDEX, &MACValue);
+ MACValue++;
+ RTUSBWriteMACRegister(pAd, TX_CPU_PORT_FROM_FCE_CPU_DESC_INDEX, MACValue, FALSE);
+ }
+ else
+ {
+ break;
+ }
+
+ //mdelay(5);
+ RtmpOsMsDelay(5);
+ }
+
+ os_free_mem(NULL, SentToMCUDone);
+
+ /* Upload new 64 bytes interrupt vector */
+ DBGPRINT(RT_DEBUG_OFF, ("\n"));
+ Status = USBLoadIVB(pAd);
+
+ /* Check MCU if ready */
+ Loop = 0;
+ do
+ {
+ RTMP_IO_READ32(pAd, COM_REG0, &MACValue);
+ if (MACValue == 0x1)
+ break;
+ RtmpOsMsDelay(10);
+ Loop++;
+ } while (Loop <= 100);
+
+
+ DBGPRINT(RT_DEBUG_TRACE, ("%s: COM_REG0(0x%x) = 0x%x\n", __FUNCTION__, COM_REG0, MACValue));
+
+ if (MACValue != 0x1)
+ Status = NDIS_STATUS_FAILURE;
+
+error2:
+ /* Free TransferBuffer */
+ RTUSB_URB_FREE_BUFFER(pObj->pUsb_Dev, 14592,
+ DataBuffer, DataDMA);
+
+error1:
+ /* Free URB */
+ RTUSB_FREE_URB(pURB);
+
+error0:
+ if (pChipCap->IsComboChip)
+ RTUSBWriteMACRegister(pAd, SEMAPHORE_00, 0x1, FALSE);
+ return Status;
+}
+#endif /* RTMP_USB_SUPPORT */
+
+
+VOID MCUCtrlInit(PRTMP_ADAPTER pAd)
+{
+ struct MCU_CTRL *MCtrl = &pAd->MCUCtrl;
+
+ RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_POLL_IDLE);
+ NdisZeroMemory(MCtrl, sizeof(*MCtrl));
+ MCtrl->CmdSeq = 0;
+ RTMP_CLEAR_FLAG(pAd, fRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD);
+ NdisAllocateSpinLock(pAd, &MCtrl->CmdRspEventListLock);
+ DlListInit(&MCtrl->CmdRspEventList);
+}
+
+
+VOID MCUCtrlExit(PRTMP_ADAPTER pAd)
+{
+ struct MCU_CTRL *MCtrl = &pAd->MCUCtrl;
+ struct CMD_RSP_EVENT *CmdRspEvent, *CmdRspEventTmp;
+ INT32 Ret;
+ unsigned long IrqFlags;
+
+ RtmpOsMsDelay(30);
+
+ RTMP_IRQ_LOCK(&MCtrl->CmdRspEventListLock, IrqFlags);
+ DlListForEachSafe(CmdRspEvent, CmdRspEventTmp, &MCtrl->CmdRspEventList, struct CMD_RSP_EVENT, List)
+ {
+ if (!CmdRspEvent->NeedWait)
+ {
+ DlListDel(&CmdRspEvent->List);
+ os_free_mem(NULL, CmdRspEvent);
+ }
+ }
+ RTMP_IRQ_UNLOCK(&MCtrl->CmdRspEventListLock, IrqFlags);
+
+ NdisFreeSpinLock(&MCtrl->CmdRspEventListLock);
+ NdisZeroMemory(MCtrl, sizeof(*MCtrl));
+}
+
+
+BOOLEAN IsInBandCmdProcessing(PRTMP_ADAPTER pAd)
+{
+ struct MCU_CTRL *MCtrl = &pAd->MCUCtrl;
+ unsigned long IrqFlags;
+ BOOLEAN Ret;
+
+ RTMP_IRQ_LOCK(&MCtrl->CmdRspEventListLock, IrqFlags);
+
+ if (DlListEmpty(&MCtrl->CmdRspEventList))
+ Ret = FALSE;
+ else
+ Ret = TRUE;
+
+ RTMP_IRQ_UNLOCK(&MCtrl->CmdRspEventListLock, IrqFlags);
+
+ return Ret;
+}
+
+
+UCHAR GetCmdRspNum(PRTMP_ADAPTER pAd)
+{
+ struct MCU_CTRL *MCtrl = &pAd->MCUCtrl;
+ unsigned long IrqFlags;
+ UCHAR Num = 0;
+ Num = DlListLen(&MCtrl->CmdRspEventList);
+
+ return Num;
+}
+
+
+static inline UCHAR GetCmdSeq(PRTMP_ADAPTER pAd)
+{
+ struct MCU_CTRL *MCtrl = &pAd->MCUCtrl;
+ struct CMD_RSP_EVENT *CmdRspEvent, *CmdRspEventTmp;
+ unsigned long IrqFlags;
+ UCHAR TryCount = 0;
+
+ RTMP_IRQ_LOCK(&MCtrl->CmdRspEventListLock, IrqFlags);
+get_seq:
+ MCtrl->CmdSeq >= 0xf ? MCtrl->CmdSeq = 1 : MCtrl->CmdSeq++;
+ TryCount++;
+ DlListForEachSafe(CmdRspEvent, CmdRspEventTmp, &MCtrl->CmdRspEventList, struct CMD_RSP_EVENT, List)
+ {
+ if (CmdRspEvent->CmdSeq == MCtrl->CmdSeq)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("Command(seq: %d) is still running\n", MCtrl->CmdSeq));
+
+ if (TryCount > 128)
+ {
+ break;
+ }
+ else
+ {
+ printk("CmdRspNum = %d\n", GetCmdRspNum(pAd));
+ goto get_seq;
+ }
+ }
+ }
+ RTMP_IRQ_UNLOCK(&MCtrl->CmdRspEventListLock, IrqFlags);
+
+ return MCtrl->CmdSeq;
+}
+
+
+#ifdef RTMP_MAC_USB
+
+
+USBHST_STATUS USBKickOutCmdComplete(URBCompleteStatus Status, purbb_t pURB, pregs *pt_regs)
+{
+ //struct completion *SentToMCUDone = (struct completion *)RTMP_OS_USB_CONTEXT_GET(pURB);
+
+ //complete(SentToMCUDone);
+
+ VOID *SentToMCUDone = RTMP_OS_USB_CONTEXT_GET(pURB);
+
+ RtmpComplete(SentToMCUDone);
+}
+
+
+INT USBKickOutCmd(PRTMP_ADAPTER pAd, UCHAR *Buf, UINT32 Len)
+{
+ PURB pURB;
+ NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
+ POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie;
+ PCHAR DataBuffer;
+ ra_dma_addr_t DataDMA;
+ INT Ret;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+ //struct completion SentToMCUDone;
+ VOID *SentToMCUDone;
+
+ //if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST | fRTMP_ADAPTER_RADIO_OFF | fRTMP_ADAPTER_HALT_IN_PROGRESS))
+ //return NDIS_STATUS_FAILURE;
+
+ /* Allocate URB */
+ pURB = RTUSB_ALLOC_URB(0);
+
+ if (!pURB)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("Can not allocate URB\n"));
+ Status = NDIS_STATUS_RESOURCES;
+ goto error0;
+ }
+
+ /* Allocate TransferBuffer */
+ DataBuffer = RTUSB_URB_ALLOC_BUFFER(pObj->pUsb_Dev, 512, &DataDMA);
+
+ if (!DataBuffer)
+ {
+ Status = NDIS_STATUS_RESOURCES;
+ goto error1;
+ }
+
+ NdisMoveMemory(DataBuffer, Buf, Len);
+
+ NdisZeroMemory(DataBuffer + Len, 4);
+
+
+ //init_completion(&SentToMCUDone);
+ SentToMCUDone = RtmpInitCompletion();
+
+ /* Initialize URB descriptor */
+ RTUSB_FILL_HTTX_BULK_URB(pURB,
+ pObj->pUsb_Dev,
+ pChipCap->CommandBulkOutAddr,
+ DataBuffer,
+ Len + 4,
+ USBKickOutCmdComplete,
+ //&SentToMCUDone,
+ SentToMCUDone,
+ DataDMA);
+
+ Status = RTUSB_SUBMIT_URB(pURB);
+
+ if (Status)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("SUBMIT URB fail\n"));
+ goto error2;
+ }
+
+ //if (!wait_for_completion_timeout(&SentToMCUDone, msecs_to_jiffies(500)))
+ if (!RtmpWaitForCompletionTimeout(SentToMCUDone, RtmpMsecsToJiffies(500)))
+ {
+ RTUSB_UNLINK_URB(pURB);
+ Ret = NDIS_STATUS_FAILURE;
+ DBGPRINT(RT_DEBUG_ERROR, ("%s Timeout\n", __FUNCTION__));
+ hex_dump("CmdBuffer", (char *)DataBuffer, Len + 4);
+ }
+
+error2:
+ /* Free TransferBuffer */
+ RTUSB_URB_FREE_BUFFER(pObj->pUsb_Dev, 512,
+ DataBuffer, DataDMA);
+
+ os_free_mem(NULL, SentToMCUDone);
+
+
+error1:
+ /* Free URB */
+ RTUSB_FREE_URB(pURB);
+
+error0:
+ return Status;
+}
+#endif /* RTMP_MAC_USB */
+
+
+INT AsicSendCmdToAndes(PRTMP_ADAPTER pAd, struct CMD_UNIT *CmdUnit)
+{
+ UINT32 VarLen;
+ UCHAR *Pos, *Buf;
+ TXINFO_NMAC_CMD *TxInfoCmd;
+ INT32 Ret = NDIS_STATUS_SUCCESS;
+ struct MCU_CTRL *MCtrl = &pAd->MCUCtrl;
+ struct CMD_RSP_EVENT *CmdRspEvent;
+ ULONG Expire;
+ unsigned long IrqFlags;
+
+ if (!RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD))
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("%s: !fRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD && fRTMP_ADAPTER_IDLE_RADIO_OFF\n", __FUNCTION__));
+ return NDIS_STATUS_FAILURE;
+ }
+
+ if (pAd->PM_FlgSuspend)
+ return NDIS_STATUS_FAILURE;
+
+ if (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST | fRTMP_ADAPTER_IDLE_RADIO_OFF | fRTMP_ADAPTER_HALT_IN_PROGRESS))
+ return NDIS_STATUS_FAILURE;
+
+ VarLen = sizeof(*TxInfoCmd) + CmdUnit->u.ANDES.CmdPayloadLen;
+
+ os_alloc_mem(pAd, (UCHAR **)&Buf, VarLen);
+
+ NdisZeroMemory(Buf, VarLen);
+
+ Pos = Buf;
+ TxInfoCmd = (TXINFO_NMAC_CMD *)Pos;
+ TxInfoCmd->info_type = CMD_PACKET;
+ TxInfoCmd->d_port = CPU_TX_PORT;
+ TxInfoCmd->cmd_type = CmdUnit->u.ANDES.Type;
+
+ if (CmdUnit->u.ANDES.NeedRsp)
+ {
+ TxInfoCmd->cmd_seq = GetCmdSeq(pAd);
+
+ //printk("cmd seq = %d\n", TxInfoCmd->cmd_seq);
+
+ os_alloc_mem(NULL, (UCHAR **)&CmdRspEvent, sizeof(*CmdRspEvent));
+
+ if (!CmdRspEvent)
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("%s Not available memory\n", __FUNCTION__));
+ Ret = NDIS_STATUS_RESOURCES;
+ goto error;
+ }
+
+ NdisZeroMemory(CmdRspEvent, sizeof(*CmdRspEvent));
+
+ CmdRspEvent->CmdSeq = TxInfoCmd->cmd_seq;
+ CmdRspEvent->Timeout = CmdUnit->u.ANDES.Timeout;
+ CmdRspEvent->RspPayload = &CmdUnit->u.ANDES.RspPayload;
+ CmdRspEvent->RspPayloadLen = &CmdUnit->u.ANDES.RspPayloadLen;
+
+ if (CmdUnit->u.ANDES.NeedWait)
+ {
+ CmdRspEvent->NeedWait = TRUE;
+ CmdRspEvent->AckDone = RtmpInitCompletion();
+ }
+
+ RTMP_IRQ_LOCK(&MCtrl->CmdRspEventListLock, IrqFlags);
+ DlListAddTail(&MCtrl->CmdRspEventList, &CmdRspEvent->List);
+ RTMP_IRQ_UNLOCK(&MCtrl->CmdRspEventListLock, IrqFlags);
+ }
+ else
+ {
+ TxInfoCmd->cmd_seq = 0;
+ }
+
+ TxInfoCmd->pkt_len = CmdUnit->u.ANDES.CmdPayloadLen;
+
+#ifdef RT_BIG_ENDIAN
+ RTMPDescriptorEndianChange((PUCHAR)TxInfoCmd, TYPE_TXINFO);
+#endif
+
+ Pos += sizeof(*TxInfoCmd);
+
+ NdisMoveMemory(Pos, CmdUnit->u.ANDES.CmdPayload, CmdUnit->u.ANDES.CmdPayloadLen);
+
+#ifdef RTMP_USB_SUPPORT
+ USBKickOutCmd(pAd, Buf, VarLen);
+#endif
+
+
+ /* Wait for Command Rsp */
+ if (CmdUnit->u.ANDES.NeedWait) {
+ ULONG Timeout = CmdUnit->u.ANDES.Timeout;
+ Expire = Timeout ? RtmpMsecsToJiffies(Timeout) : RtmpMsecsToJiffies(300);
+ if (!RtmpWaitForCompletionTimeout(CmdRspEvent->AckDone, Expire))
+ {
+ Ret = NDIS_STATUS_FAILURE;
+ DBGPRINT(RT_DEBUG_ERROR, ("Wait for command response timeout(300ms)\n"));
+ }
+
+ RTMP_IRQ_LOCK(&MCtrl->CmdRspEventListLock, IrqFlags);
+ DlListDel(&CmdRspEvent->List);
+ os_free_mem(NULL, CmdRspEvent->AckDone);
+ os_free_mem(NULL, CmdRspEvent);
+ RTMP_IRQ_UNLOCK(&MCtrl->CmdRspEventListLock, IrqFlags);
+ }
+
+error:
+ os_free_mem(NULL, Buf);
+
+ return Ret;
+}
+
+static VOID CmdDoneHandler(PRTMP_ADAPTER pAd, UCHAR *Data)
+{
+
+
+}
+
+
+static VOID CmdErrorHandler(PRTMP_ADAPTER pAd, UCHAR *Data)
+{
+
+
+}
+
+
+static VOID CmdRetryHandler(PRTMP_ADAPTER pAd, UCHAR *Data)
+{
+
+
+}
+
+
+static VOID PwrRspEventHandler(PRTMP_ADAPTER pAd, UCHAR *Data)
+{
+
+
+}
+
+
+static VOID WowRspEventHandler(PRTMP_ADAPTER pAd, UCHAR *Data)
+{
+
+
+}
+
+
+static VOID CarrierDetectRspEventHandler(PRTMP_ADAPTER pAd, UCHAR *Data)
+{
+
+
+
+}
+
+
+static VOID DFSDetectRspEventHandler(PRTMP_ADAPTER pAd, UCHAR *Data)
+{
+
+
+
+}
+
+
+CMD_RSP_HANDLER CmdRspHandlerTable[] =
+{
+ CmdDoneHandler,
+ CmdErrorHandler,
+ CmdRetryHandler,
+ PwrRspEventHandler,
+ WowRspEventHandler,
+ CarrierDetectRspEventHandler,
+ DFSDetectRspEventHandler,
+};
+
+
+INT AndesBurstWrite(PRTMP_ADAPTER pAd, UINT32 Offset, UINT32 *Data, UINT32 Cnt)
+{
+ struct CMD_UNIT CmdUnit;
+ CHAR *Pos, *Buf, *CurHeader;
+ UINT32 VarLen, OffsetNum, CurLen = 0, SentLen;
+ UINT32 Value, i, CurIndex = 0;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+ INT32 Ret;
+ BOOLEAN LastPacket = FALSE;
+
+ OffsetNum = Cnt / ((pChipCap->InbandPacketMaxLen - sizeof(Offset)) / 4);
+
+ if (Cnt % ((pChipCap->InbandPacketMaxLen - sizeof(Offset)) / 4))
+ VarLen = sizeof(Offset) * (OffsetNum + 1) + 4 * Cnt;
+ else
+ VarLen = sizeof(Offset) * OffsetNum + 4 * Cnt;
+
+ os_alloc_mem(pAd, (UCHAR **)&Buf, VarLen);
+
+ Pos = Buf;
+
+ while (CurLen < VarLen)
+ {
+ SentLen = (VarLen - CurLen) > pChipCap->InbandPacketMaxLen
+ ? pChipCap->InbandPacketMaxLen : (VarLen - CurLen);
+
+ if ((SentLen < pChipCap->InbandPacketMaxLen) || (CurLen + pChipCap->InbandPacketMaxLen) == VarLen)
+ LastPacket = TRUE;
+
+ CurHeader = Pos;
+
+ Value = cpu2le32(Offset + pChipCap->WlanMemmapOffset + CurIndex * 4);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ for (i = 0; i < ((SentLen - 4) / 4); i++)
+ {
+ Value = cpu2le32(Data[i + CurIndex]);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+ };
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+
+ CmdUnit.u.ANDES.Type = CMD_BURST_WRITE;
+ CmdUnit.u.ANDES.CmdPayloadLen = SentLen;
+ CmdUnit.u.ANDES.CmdPayload = CurHeader;
+
+ if (LastPacket && (Cnt > 1))
+ {
+ CmdUnit.u.ANDES.NeedRsp = TRUE;
+ CmdUnit.u.ANDES.NeedWait = TRUE;
+ CmdUnit.u.ANDES.Timeout = 0;
+ }
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ if (Ret != NDIS_STATUS_SUCCESS)
+ goto error;
+
+ CurIndex += ((SentLen - 4) / 4);
+ CurLen += pChipCap->InbandPacketMaxLen;
+ }
+
+error:
+ os_free_mem(NULL, Buf);
+
+ return NDIS_STATUS_SUCCESS;
+}
+
+
+INT AndesBurstRead(PRTMP_ADAPTER pAd, UINT32 Offset, UINT32 Cnt, UINT32 *Data)
+{
+ struct CMD_UNIT CmdUnit;
+ UINT32 CurLen = 0, CmdLen, RspLen, OffsetNum, ReceiveLen;
+ CHAR *Pos, *Pos1, *CmdBuf, *RspBuf, *CurCmdHeader, *CurRspHeader;
+ UINT32 i, Value, Status = NDIS_STATUS_SUCCESS, CurIndex = 0;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+ INT32 Ret;
+
+ OffsetNum = Cnt / ((pChipCap->InbandPacketMaxLen - sizeof(Offset)) / 4);
+
+ if (Cnt % ((pChipCap->InbandPacketMaxLen - sizeof(Offset)) / 4))
+ {
+ CmdLen = 8 * (OffsetNum + 1);
+ RspLen = sizeof(Offset) * (OffsetNum + 1) + 4 * Cnt;
+ }
+ else
+ {
+ CmdLen = 8 * OffsetNum;
+ RspLen = sizeof(Offset) * OffsetNum + 4 * Cnt;
+ }
+
+ os_alloc_mem(pAd, (UCHAR **)&CmdBuf, CmdLen);
+ os_alloc_mem(pAd, (UCHAR **)&RspBuf, RspLen);
+
+ Pos = CmdBuf;
+ Pos1 = RspBuf;
+
+ while (CurLen < RspLen)
+ {
+ ReceiveLen = (RspLen - CurLen) > pChipCap->InbandPacketMaxLen
+ ? pChipCap->InbandPacketMaxLen
+ : (RspLen - CurLen);
+
+ CurCmdHeader = Pos;
+ CurRspHeader = Pos1;
+
+ Value = cpu2le32(Offset + pChipCap->WlanMemmapOffset + CurIndex * 4);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ Value = cpu2le32((ReceiveLen - 4) / 4);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+ CmdUnit.u.ANDES.Type = CMD_BURST_READ;
+ CmdUnit.u.ANDES.CmdPayloadLen = 8;
+ CmdUnit.u.ANDES.CmdPayload = CurCmdHeader;
+ CmdUnit.u.ANDES.RspPayload = CurRspHeader;
+ CmdUnit.u.ANDES.RspPayloadLen = ReceiveLen;
+ CmdUnit.u.ANDES.NeedRsp = TRUE;
+ CmdUnit.u.ANDES.NeedWait = TRUE;
+ CmdUnit.u.ANDES.Timeout = 0;
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ if (Ret != NDIS_STATUS_SUCCESS)
+ goto error;
+
+ if (CmdUnit.u.ANDES.RspPayloadLen == ReceiveLen)
+ {
+ NdisMoveMemory(&Data[CurIndex], CmdUnit.u.ANDES.RspPayload + 4, CmdUnit.u.ANDES.RspPayloadLen - 4);
+ Pos1 += ReceiveLen;
+
+ for (i = 0; i < (ReceiveLen - 4) / 4; i++)
+ {
+ Data[i + CurIndex] = le2cpu32(Data[i + CurIndex]);
+ }
+ }
+ else
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("%s: Rsp len(%d) != Expect len (%d)\n",
+ __FUNCTION__, CmdUnit.u.ANDES.RspPayloadLen, ReceiveLen));
+
+ Status = NDIS_STATUS_FAILURE;
+
+ goto error;
+ }
+
+ CurIndex += ((ReceiveLen - 4) / 4);
+ CurLen += pChipCap->InbandPacketMaxLen;
+ }
+
+error:
+
+ os_free_mem(NULL, CmdBuf);
+ os_free_mem(NULL, RspBuf);
+
+ return Status;
+}
+
+
+INT AndesRandomRead(PRTMP_ADAPTER pAd, RTMP_REG_PAIR *RegPair, UINT32 Num)
+{
+ struct CMD_UNIT CmdUnit;
+ UINT32 VarLen = Num * 8, CurLen = 0, ReceiveLen;
+ CHAR *Pos, *Pos1, *CmdBuf, *RspBuf, *CurCmdHeader, *CurRspHeader;
+ UINT32 i, Value, Status = NDIS_STATUS_SUCCESS, CurIndex = 0;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+ INT32 Ret;
+
+ os_alloc_mem(pAd, (UCHAR **)&CmdBuf, VarLen);
+ os_alloc_mem(pAd, (UCHAR **)&RspBuf, VarLen);
+
+ NdisZeroMemory(CmdBuf, VarLen);
+
+ Pos = CmdBuf;
+ Pos1 = RspBuf;
+
+ while (CurLen < VarLen)
+ {
+ ReceiveLen = (VarLen - CurLen) > pChipCap->InbandPacketMaxLen
+ ? pChipCap->InbandPacketMaxLen
+ : (VarLen - CurLen);
+
+ CurCmdHeader = Pos;
+ CurRspHeader = Pos1;
+
+ for (i = 0; i < ReceiveLen / 8; i++)
+ {
+ Value = cpu2le32(RegPair[i + CurIndex].Register + pChipCap->WlanMemmapOffset);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 8;
+ }
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+ CmdUnit.u.ANDES.Type = CMD_RANDOM_READ;
+ CmdUnit.u.ANDES.CmdPayloadLen = ReceiveLen;
+ CmdUnit.u.ANDES.CmdPayload = CurCmdHeader;
+ CmdUnit.u.ANDES.RspPayload = CurRspHeader;
+ CmdUnit.u.ANDES.RspPayloadLen = ReceiveLen;
+ CmdUnit.u.ANDES.NeedRsp = TRUE;
+ CmdUnit.u.ANDES.NeedWait = TRUE;
+ CmdUnit.u.ANDES.Timeout = 0;
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ if (Ret != NDIS_STATUS_SUCCESS)
+ goto error;
+
+ if (CmdUnit.u.ANDES.RspPayloadLen == ReceiveLen)
+ {
+ for (i = 0; i < ReceiveLen / 8; i++)
+ {
+ NdisMoveMemory(&RegPair[i + CurIndex].Value, CmdUnit.u.ANDES.RspPayload + 8 * i + 4, 4);
+ RegPair[i + CurIndex].Value = le2cpu32(RegPair[i + CurIndex].Value);
+ }
+ }
+ else
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("%s: Rsp len(%d) != Expect len (%d)\n",
+ __FUNCTION__, CmdUnit.u.ANDES.RspPayloadLen, ReceiveLen));
+
+ Status = NDIS_STATUS_FAILURE;
+
+ goto error;
+ }
+
+ CurIndex += ReceiveLen / 8;
+ CurLen += pChipCap->InbandPacketMaxLen;
+ }
+
+error:
+ os_free_mem(NULL, CmdBuf);
+ os_free_mem(NULL, RspBuf);
+
+ return Status;
+}
+
+
+INT AndesRFRandomRead(PRTMP_ADAPTER pAd, BANK_RF_REG_PAIR *RegPair, UINT32 Num)
+{
+ struct CMD_UNIT CmdUnit;
+ UINT32 VarLen = Num * 8, CurLen = 0, ReceiveLen;
+ CHAR *Pos, *Pos1, *CmdBuf, *RspBuf, *CurCmdHeader, *CurRspHeader;
+ UINT32 i, Value, Status = NDIS_STATUS_SUCCESS, CurIndex = 0;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+ INT32 Ret;
+
+ os_alloc_mem(pAd, (UCHAR **)&CmdBuf, VarLen);
+ os_alloc_mem(pAd, (UCHAR **)&RspBuf, VarLen);
+
+ NdisZeroMemory(CmdBuf, VarLen);
+ Pos = CmdBuf;
+ Pos1 = RspBuf;
+
+ while (CurLen < VarLen)
+ {
+ ReceiveLen = (VarLen - CurLen) > pChipCap->InbandPacketMaxLen
+ ? pChipCap->InbandPacketMaxLen
+ : (VarLen - CurLen);
+
+ CurCmdHeader = Pos;
+ CurRspHeader = Pos1;
+
+ for (i = 0; i < ReceiveLen / 8; i++)
+ {
+ Value = 0;
+
+ /* RF selection */
+ Value = (Value & ~0x80000000) | 0x80000000;
+
+ /* RF bank */
+ Value = (Value & ~0x00ff0000) | (RegPair[i + CurIndex].Bank << 16);
+
+ /* RF Index */
+ Value = (Value & ~0x0000ffff) | RegPair[i + CurIndex].Register;
+
+ Value = cpu2le32(Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 8;
+ }
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+ CmdUnit.u.ANDES.Type = CMD_RANDOM_READ;
+ CmdUnit.u.ANDES.CmdPayloadLen = ReceiveLen;
+ CmdUnit.u.ANDES.CmdPayload = CurCmdHeader;
+ CmdUnit.u.ANDES.RspPayload = CurRspHeader;
+ CmdUnit.u.ANDES.RspPayloadLen = ReceiveLen;
+ CmdUnit.u.ANDES.NeedRsp = TRUE;
+ CmdUnit.u.ANDES.NeedWait = TRUE;
+ CmdUnit.u.ANDES.Timeout = 0;
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ if (Ret != NDIS_STATUS_SUCCESS)
+ goto error;
+
+
+ if (CmdUnit.u.ANDES.RspPayloadLen == ReceiveLen)
+ {
+ for (i = 0; i < ReceiveLen / 8; i++)
+ {
+ NdisMoveMemory(&RegPair[i + CurIndex].Value, CmdUnit.u.ANDES.RspPayload + 8 * i + 4, 1);
+ }
+ }
+ else
+ {
+ DBGPRINT(RT_DEBUG_ERROR, ("%s: Rsp len(%d) != Expect len (%d)\n",
+ __FUNCTION__, CmdUnit.u.ANDES.RspPayloadLen, ReceiveLen));
+
+ Status = NDIS_STATUS_FAILURE;
+
+ goto error;
+ }
+
+ CurIndex += ReceiveLen / 8;
+ CurLen += pChipCap->InbandPacketMaxLen;
+ }
+
+error:
+ os_free_mem(NULL, CmdBuf);
+ os_free_mem(NULL, RspBuf);
+
+ return Status;
+}
+
+
+INT AndesReadModifyWrite(PRTMP_ADAPTER pAd, R_M_W_REG *RegPair, UINT32 Num)
+{
+ struct CMD_UNIT CmdUnit;
+ CHAR *Pos, *Buf, *CurHeader;
+ UINT32 VarLen = Num * 12, CurLen = 0, SentLen;
+ UINT32 Value, i, CurIndex = 0;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+ INT32 Ret;
+ BOOLEAN LastPacket = FALSE;
+
+ os_alloc_mem(pAd, (UCHAR **)&Buf, VarLen);
+
+ Pos = Buf;
+
+ while (CurLen < VarLen)
+ {
+ SentLen = (VarLen - CurLen) > pChipCap->InbandPacketMaxLen
+ ? pChipCap->InbandPacketMaxLen : (VarLen - CurLen);
+
+ if ((SentLen < pChipCap->InbandPacketMaxLen) || (CurLen + pChipCap->InbandPacketMaxLen) == VarLen)
+ LastPacket = TRUE;
+
+ CurHeader = Pos;
+
+ for (i = 0; i < (SentLen / 12); i++)
+ {
+ /* Address */
+ Value = cpu2le32(RegPair[i + CurIndex].Register + pChipCap->WlanMemmapOffset);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ /* ClearBitMask */
+ Value = cpu2le32(RegPair[i + CurIndex].ClearBitMask);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ /* UpdateData */
+ Value = cpu2le32(RegPair[i + CurIndex].Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+ }
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+
+ CmdUnit.u.ANDES.Type = CMD_READ_MODIFY_WRITE;
+ CmdUnit.u.ANDES.CmdPayloadLen = SentLen;
+ CmdUnit.u.ANDES.CmdPayload = CurHeader;
+
+ if (LastPacket)
+ {
+ CmdUnit.u.ANDES.NeedRsp = TRUE;
+ CmdUnit.u.ANDES.NeedWait = TRUE;
+ CmdUnit.u.ANDES.Timeout = 0;
+ }
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ if (Ret != NDIS_STATUS_SUCCESS)
+ goto error;
+
+ CurIndex += (SentLen / 12);
+ CurLen += pChipCap->InbandPacketMaxLen;
+ }
+
+error:
+ os_free_mem(NULL, Buf);
+
+ return NDIS_STATUS_SUCCESS;
+}
+
+
+INT AndesRFReadModifyWrite(PRTMP_ADAPTER pAd, RF_R_M_W_REG *RegPair, UINT32 Num)
+{
+ struct CMD_UNIT CmdUnit;
+ CHAR *Pos, *Buf, *CurHeader;
+ UINT32 VarLen = Num * 12, CurLen = 0, SentLen;
+ UINT32 Value, i, CurIndex = 0;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+ INT32 Ret;
+ BOOLEAN LastPacket = FALSE;
+
+ os_alloc_mem(pAd, (UCHAR **)&Buf, VarLen);
+
+ Pos = Buf;
+
+ while (CurLen < VarLen)
+ {
+ SentLen = (VarLen - CurLen) > pChipCap->InbandPacketMaxLen
+ ? pChipCap->InbandPacketMaxLen : (VarLen - CurLen);
+
+ if ((SentLen < pChipCap->InbandPacketMaxLen) || (CurLen + pChipCap->InbandPacketMaxLen) == VarLen)
+ LastPacket = TRUE;
+
+ CurHeader = Pos;
+
+ for (i = 0; i < SentLen / 12; i++)
+ {
+ Value = 0;
+ /* RF selection */
+ Value = (Value & ~0x80000000) | 0x80000000;
+
+ /* RF bank */
+ Value = (Value & ~0x00ff0000) | (RegPair[i + CurIndex].Bank << 16);
+
+ /* RF Index */
+ Value = (Value & ~0x000000ff) | RegPair[i + CurIndex].Register;
+
+ Value = cpu2le32(Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ Value = 0;
+ /* ClearBitMask */
+ Value = (Value & ~0x000000ff) | RegPair[i + CurIndex].ClearBitMask;
+
+ Value = cpu2le32(Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ Value = 0;
+ /* UpdateData */
+ Value = (Value & ~0x000000ff) | RegPair[i + CurIndex].Value;
+
+ Value = cpu2le32(Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+ }
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+
+ CmdUnit.u.ANDES.Type = CMD_READ_MODIFY_WRITE;
+ CmdUnit.u.ANDES.CmdPayloadLen = SentLen;
+ CmdUnit.u.ANDES.CmdPayload = CurHeader;
+
+ if (LastPacket)
+ {
+ CmdUnit.u.ANDES.NeedRsp = TRUE;
+ CmdUnit.u.ANDES.NeedWait = TRUE;
+ CmdUnit.u.ANDES.Timeout = 0;
+ }
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ if (Ret != NDIS_STATUS_SUCCESS)
+ goto error;
+
+ CurIndex += (SentLen / 12);
+ CurLen += pChipCap->InbandPacketMaxLen;
+ }
+
+error:
+ os_free_mem(NULL, Buf);
+
+ return NDIS_STATUS_SUCCESS;
+}
+
+
+INT AndesRandomWritePair(PRTMP_ADAPTER pAd, RTMP_REG_PAIR *RegPair, UINT32 Num)
+{
+ struct CMD_UNIT CmdUnit;
+ CHAR *Pos, *Buf, *CurHeader;
+ UINT32 VarLen = Num * 8, CurLen = 0, SentLen;
+ UINT32 Value, i, CurIndex = 0;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+ INT32 Ret;
+ BOOLEAN LastPacket = FALSE;
+
+ os_alloc_mem(pAd, (UCHAR **)&Buf, VarLen);
+
+ Pos = Buf;
+
+ while (CurLen < VarLen)
+ {
+ SentLen = (VarLen - CurLen) > pChipCap->InbandPacketMaxLen
+ ? pChipCap->InbandPacketMaxLen : (VarLen - CurLen);
+
+ if ((SentLen < pChipCap->InbandPacketMaxLen) || (CurLen + pChipCap->InbandPacketMaxLen) == VarLen)
+ LastPacket = TRUE;
+
+ CurHeader = Pos;
+
+ for (i = 0; i < (SentLen / 8); i++)
+ {
+ /* Address */
+ Value = cpu2le32(RegPair[i + CurIndex].Register + pChipCap->WlanMemmapOffset);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ /* UpdateData */
+ Value = cpu2le32(RegPair[i + CurIndex].Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+ };
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+
+ CmdUnit.u.ANDES.Type = CMD_RANDOM_WRITE;
+ CmdUnit.u.ANDES.CmdPayloadLen = SentLen;
+ CmdUnit.u.ANDES.CmdPayload = CurHeader;
+
+ if (LastPacket)
+ {
+ CmdUnit.u.ANDES.NeedRsp = TRUE;
+ CmdUnit.u.ANDES.NeedWait = TRUE;
+ CmdUnit.u.ANDES.Timeout = 0;
+ }
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ if (Ret != NDIS_STATUS_SUCCESS)
+ goto error;
+
+ CurIndex += (SentLen / 8);
+ CurLen += pChipCap->InbandPacketMaxLen;
+ }
+
+error:
+ os_free_mem(NULL, Buf);
+
+ return NDIS_STATUS_SUCCESS;
+}
+
+
+INT AndesRandomWrite(PRTMP_ADAPTER pAd, UINT32 Num, ...)
+{
+ struct CMD_UNIT CmdUnit;
+ CHAR *Pos, *Buf, *CurHeader;
+ UINT32 VarLen = Num * 8, CurLen = 0, SentLen;
+ UINT32 Value, i, CurIndex = 0;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+ INT32 Ret;
+ va_list argptr;
+ BOOLEAN LastPacket = FALSE;
+
+ va_start(argptr, Num);
+
+ os_alloc_mem(pAd, (UCHAR **)&Buf, VarLen);
+
+ Pos = Buf;
+
+ while (CurLen < VarLen)
+ {
+ SentLen = (VarLen - CurLen) > pChipCap->InbandPacketMaxLen
+ ? pChipCap->InbandPacketMaxLen : (VarLen - CurLen);
+
+ if ((SentLen < pChipCap->InbandPacketMaxLen) || (CurLen + pChipCap->InbandPacketMaxLen) == VarLen)
+ LastPacket = TRUE;
+
+ CurHeader = Pos;
+
+ for (i = 0; i < (SentLen / 8); i++)
+ {
+ /* Address */
+ Value = cpu2le32( va_arg(argptr, UINT32) +pChipCap->WlanMemmapOffset);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ /* UpdateData */
+ Value = cpu2le32(va_arg(argptr, UINT32));
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+ };
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+
+ CmdUnit.u.ANDES.Type = CMD_RANDOM_WRITE;
+ CmdUnit.u.ANDES.CmdPayloadLen = SentLen;
+ CmdUnit.u.ANDES.CmdPayload = CurHeader;
+
+ if (LastPacket)
+ {
+ CmdUnit.u.ANDES.NeedRsp = TRUE;
+ CmdUnit.u.ANDES.NeedWait = TRUE;
+ CmdUnit.u.ANDES.Timeout = 0;
+ }
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ if (Ret != NDIS_STATUS_SUCCESS)
+ goto error;
+
+ CurIndex += (SentLen / 8);
+ CurLen += pChipCap->InbandPacketMaxLen;
+ }
+
+error:
+ os_free_mem(NULL, Buf);
+ va_end(argptr);
+
+ return NDIS_STATUS_SUCCESS;
+}
+
+
+INT AndesRFRandomWritePair(PRTMP_ADAPTER pAd, BANK_RF_REG_PAIR *RegPair, UINT32 Num)
+{
+ struct CMD_UNIT CmdUnit;
+ CHAR *Pos, *Buf, *CurHeader;
+ UINT32 VarLen = Num * 8, CurLen = 0, SentLen;
+ UINT32 Value, i, CurIndex = 0;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+ INT32 Ret;
+ BOOLEAN LastPacket = FALSE;
+
+ os_alloc_mem(pAd, (UCHAR **)&Buf, VarLen);
+
+ Pos = Buf;
+
+ while (CurLen < VarLen)
+ {
+ SentLen = (VarLen - CurLen) > pChipCap->InbandPacketMaxLen
+ ? pChipCap->InbandPacketMaxLen : (VarLen - CurLen);
+
+ if ((SentLen < pChipCap->InbandPacketMaxLen) || (CurLen + pChipCap->InbandPacketMaxLen) == VarLen)
+ LastPacket = TRUE;
+
+ CurHeader = Pos;
+
+ for (i = 0; i < (SentLen / 8); i++)
+ {
+ Value = 0;
+ /* RF selection */
+ Value = (Value & ~0x80000000) | 0x80000000;
+
+ /* RF bank */
+ Value = (Value & ~0x00ff0000) | (RegPair[i + CurIndex].Bank << 16);
+
+ /* RF Index */
+ Value = (Value & ~0x000000ff) | RegPair[i + CurIndex].Register;
+
+ //printk("Value = %x RF Bank = %d and Index = %d\n", Value, RegPair[i + CurIndex].Bank, RegPair[i + CurIndex].Register);
+
+ Value = cpu2le32(Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ Value = 0;
+ /* UpdateData */
+ Value = (Value & ~0x000000ff) | RegPair[i + CurIndex].Value;
+
+ Value = cpu2le32(Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+ }
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+
+ CmdUnit.u.ANDES.Type = CMD_RANDOM_WRITE;
+ CmdUnit.u.ANDES.CmdPayloadLen = SentLen;
+ CmdUnit.u.ANDES.CmdPayload = CurHeader;
+
+ if (LastPacket)
+ {
+ CmdUnit.u.ANDES.NeedRsp = TRUE;
+ CmdUnit.u.ANDES.NeedWait = TRUE;
+ CmdUnit.u.ANDES.Timeout = 0;
+ }
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ if (Ret != NDIS_STATUS_SUCCESS)
+ goto error;
+
+ CurIndex += (SentLen / 8);
+ CurLen += pChipCap->InbandPacketMaxLen;
+ }
+
+
+error:
+ os_free_mem(NULL, Buf);
+
+ return NDIS_STATUS_SUCCESS;
+}
+
+
+INT AndesRFRandomWrite(PRTMP_ADAPTER pAd, UINT32 Num, ...)
+{
+ struct CMD_UNIT CmdUnit;
+ CHAR *Pos, *Buf, *CurHeader;
+ UINT32 VarLen = Num * 8, CurLen = 0, SentLen;
+ UINT32 Value, i, CurIndex = 0;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+ INT32 Ret;
+ va_list argptr;
+ BOOLEAN LastPacket = FALSE;
+
+ va_start(argptr, Num);
+
+ os_alloc_mem(pAd, (UCHAR **)&Buf, VarLen);
+
+ Pos = Buf;
+
+ while (CurLen < VarLen)
+ {
+ SentLen = (VarLen - CurLen) > pChipCap->InbandPacketMaxLen
+ ? pChipCap->InbandPacketMaxLen : (VarLen - CurLen);
+
+ if ((SentLen < pChipCap->InbandPacketMaxLen) || (CurLen + pChipCap->InbandPacketMaxLen) == VarLen)
+ LastPacket = TRUE;
+
+ CurHeader = Pos;
+
+ for (i = 0; i < (SentLen / 8); i++)
+ {
+ Value = 0;
+ /* RF selection */
+ Value = (Value & ~0x80000000) | 0x80000000;
+
+ /* RF bank */
+ Value = (Value & ~0x00ff0000) | (va_arg(argptr, UINT) << 16);
+
+ /* RF Index */
+ Value = (Value & ~0x000000ff) | va_arg(argptr, UINT);
+
+ //printk("Value = %x RF Bank = %d and Index = %d\n", Value, RegPair[i + CurIndex].Bank, RegPair[i + CurIndex].Register);
+
+ Value = cpu2le32(Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ Value = 0;
+ /* UpdateData */
+ Value = (Value & ~0x000000ff) | va_arg(argptr, UINT);
+
+ Value = cpu2le32(Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+ }
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+
+ CmdUnit.u.ANDES.Type = CMD_RANDOM_WRITE;
+ CmdUnit.u.ANDES.CmdPayloadLen = SentLen;
+ CmdUnit.u.ANDES.CmdPayload = CurHeader;
+
+ if (LastPacket)
+ {
+ CmdUnit.u.ANDES.NeedRsp = TRUE;
+ CmdUnit.u.ANDES.NeedWait = TRUE;
+ CmdUnit.u.ANDES.Timeout = 0;
+ }
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ if (Ret != NDIS_STATUS_SUCCESS)
+ goto error;
+
+ CurIndex += (SentLen / 8);
+ CurLen += pChipCap->InbandPacketMaxLen;
+ }
+
+
+error:
+ os_free_mem(NULL, Buf);
+ va_end(argptr);
+
+ return NDIS_STATUS_SUCCESS;
+}
+
+
+#ifdef MT7601
+INT AndesBBPRandomWritePair(PRTMP_ADAPTER pAd, RTMP_REG_PAIR *RegPair, UINT32 Num)
+{
+ struct CMD_UNIT CmdUnit;
+ CHAR *Pos, *Buf, *CurHeader;
+ UINT32 VarLen = Num * 8, CurLen = 0, SentLen;
+ UINT32 Value, i, CurIndex = 0;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+ INT32 Ret;
+ BOOLEAN LastPacket = FALSE;
+
+ os_alloc_mem(pAd, (UCHAR **)&Buf, VarLen);
+
+ Pos = Buf;
+
+ while (CurLen < VarLen)
+ {
+ SentLen = (VarLen - CurLen) > pChipCap->InbandPacketMaxLen
+ ? pChipCap->InbandPacketMaxLen : (VarLen - CurLen);
+
+ if ((SentLen < pChipCap->InbandPacketMaxLen) || (CurLen + pChipCap->InbandPacketMaxLen) == VarLen)
+ LastPacket = TRUE;
+
+ CurHeader = Pos;
+
+ for (i = 0; i < (SentLen / 8); i++)
+ {
+ Value = 0;
+ /* BBP selection */
+ Value = (Value & ~0x40000000) | 0x40000000;
+
+ /* BBP Index */
+ Value = (Value & ~0x000000ff) | RegPair[i + CurIndex].Register;
+
+ Value = cpu2le32(Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ Value = 0;
+ /* UpdateData */
+ Value = (Value & ~0x000000ff) | RegPair[i + CurIndex].Value;
+
+ Value = cpu2le32(Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+ }
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+
+ CmdUnit.u.ANDES.Type = CMD_RANDOM_WRITE;
+ CmdUnit.u.ANDES.CmdPayloadLen = SentLen;
+ CmdUnit.u.ANDES.CmdPayload = CurHeader;
+
+ if (LastPacket)
+ {
+ CmdUnit.u.ANDES.NeedRsp = TRUE;
+ CmdUnit.u.ANDES.NeedWait = TRUE;
+ CmdUnit.u.ANDES.Timeout = 0;
+ }
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ if (Ret != NDIS_STATUS_SUCCESS)
+ goto error;
+
+ CurIndex += (SentLen / 8);
+ CurLen += pChipCap->InbandPacketMaxLen;
+ }
+
+error:
+ os_free_mem(NULL, Buf);
+
+ return NDIS_STATUS_SUCCESS;
+}
+
+
+INT AndesBBPRandomWrite(PRTMP_ADAPTER pAd, UINT32 Num, ...)
+{
+ struct CMD_UNIT CmdUnit;
+ CHAR *Pos, *Buf, *CurHeader;
+ UINT32 VarLen = Num * 8, CurLen = 0, SentLen;
+ UINT32 Value, i, CurIndex = 0;
+ RTMP_CHIP_CAP *pChipCap = &pAd->chipCap;
+ INT32 Ret;
+ va_list argptr;
+ BOOLEAN LastPacket = FALSE;
+
+ va_start(argptr, Num);
+
+ os_alloc_mem(pAd, (UCHAR **)&Buf, VarLen);
+
+ Pos = Buf;
+
+ while (CurLen < VarLen)
+ {
+ SentLen = (VarLen - CurLen) > pChipCap->InbandPacketMaxLen
+ ? pChipCap->InbandPacketMaxLen : (VarLen - CurLen);
+
+ if ((SentLen < pChipCap->InbandPacketMaxLen) || (CurLen + pChipCap->InbandPacketMaxLen) == VarLen)
+ LastPacket = TRUE;
+
+ CurHeader = Pos;
+
+ for (i = 0; i < (SentLen / 8); i++)
+ {
+ Value = 0;
+ /* BBP selection */
+ Value = (Value & ~0x40000000) | 0x40000000;
+
+ /* BBP Index */
+ Value = (Value & ~0x000000ff) | va_arg(argptr, UINT);
+
+ Value = cpu2le32(Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ Value = 0;
+ /* UpdateData */
+ Value = (Value & ~0x000000ff) | va_arg(argptr, UINT);
+
+ Value = cpu2le32(Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+ }
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+
+ CmdUnit.u.ANDES.Type = CMD_RANDOM_WRITE;
+ CmdUnit.u.ANDES.CmdPayloadLen = SentLen;
+ CmdUnit.u.ANDES.CmdPayload = CurHeader;
+
+ if (LastPacket)
+ {
+ CmdUnit.u.ANDES.NeedRsp = TRUE;
+ CmdUnit.u.ANDES.NeedWait = TRUE;
+ CmdUnit.u.ANDES.Timeout = 0;
+ }
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ if (Ret != NDIS_STATUS_SUCCESS)
+ goto error;
+
+ CurIndex += (SentLen / 8);
+ CurLen += pChipCap->InbandPacketMaxLen;
+ }
+
+error:
+ os_free_mem(NULL, Buf);
+ va_end(argptr);
+
+ return NDIS_STATUS_SUCCESS;
+}
+
+#endif
+
+
+INT AndesPwrSavingOP(PRTMP_ADAPTER pAd, UINT32 PwrOP, UINT32 PwrLevel,
+ UINT32 ListenInterval, UINT32 PreTBTTLeadTime,
+ UINT8 TIMByteOffset, UINT8 TIMBytePattern)
+{
+ struct CMD_UNIT CmdUnit;
+ CHAR *Pos, *Buf;
+ UINT32 VarLen;
+ UINT32 Value;
+ INT32 Ret;
+
+ /* Power operation and Power Level */
+ VarLen = 8;
+
+ if (PwrOP == RADIO_OFF_ADVANCE)
+ {
+ /* Listen interval, Pre-TBTT, TIM info */
+ VarLen += 12;
+ }
+
+ os_alloc_mem(pAd, (UCHAR **)&Buf, VarLen);
+
+ Pos = Buf;
+
+ /* Power operation */
+ Value = cpu2le32(PwrOP);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ /* Power Level */
+ Value = cpu2le32(PwrLevel);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ if ( (PwrOP == RADIO_OFF_ADVANCE) || (PwrOP == RADIO_OFF_AUTO_WAKEUP))
+ {
+ /* Listen interval */
+ Value = cpu2le32(ListenInterval);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+
+ /* Pre TBTT lead time */
+ Value = cpu2le32(PreTBTTLeadTime);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+ }
+
+ if (PwrOP == RADIO_OFF_ADVANCE)
+ {
+ /* TIM Info */
+ Value = (Value & ~0x000000ff) | TIMBytePattern;
+ Value = (Value & ~0x0000ff00) | (TIMByteOffset << 8);
+ Value = cpu2le32(Value);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+ }
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+
+ CmdUnit.u.ANDES.Type = CMD_POWER_SAVING_OP;
+ CmdUnit.u.ANDES.CmdPayloadLen = VarLen;
+ CmdUnit.u.ANDES.CmdPayload = Buf;
+
+ CmdUnit.u.ANDES.NeedRsp = FALSE;
+ CmdUnit.u.ANDES.NeedWait = FALSE;
+
+ CmdUnit.u.ANDES.Timeout = 0;
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ os_free_mem(NULL, Buf);
+
+ return NDIS_STATUS_SUCCESS;
+}
+
+
+INT AndesFunSetOP(PRTMP_ADAPTER pAd, UINT32 FunID, UINT32 Param)
+{
+ struct CMD_UNIT CmdUnit;
+ CHAR *Pos, *Buf;
+ UINT32 VarLen;
+ UINT32 Value;
+ INT32 Ret;
+
+ /* Function ID and Parameter */
+ VarLen = 8;
+
+ os_alloc_mem(pAd, (UCHAR **)&Buf, VarLen);
+
+ Pos = Buf;
+
+ /* Function ID */
+ Value = cpu2le32(FunID);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ /* Parameter */
+ Value = cpu2le32(Param);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+
+ CmdUnit.u.ANDES.Type = CMD_FUN_SET_OP;
+ CmdUnit.u.ANDES.CmdPayloadLen = VarLen;
+ CmdUnit.u.ANDES.CmdPayload = Buf;
+
+ if ( FunID == 5 )
+ {
+ CmdUnit.u.ANDES.NeedRsp = TRUE;
+ CmdUnit.u.ANDES.NeedWait = TRUE;
+ CmdUnit.u.ANDES.Timeout = 0;
+ }
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ os_free_mem(NULL, Buf);
+
+ return NDIS_STATUS_SUCCESS;
+}
+
+
+INT AndesCalibrationOP(PRTMP_ADAPTER pAd, UINT32 CalibrationID, UINT32 Param)
+{
+
+ struct CMD_UNIT CmdUnit;
+ CHAR *Pos, *Buf;
+ UINT32 VarLen;
+ UINT32 Value;
+ INT32 Ret;
+
+ /* Calibration ID and Parameter */
+ VarLen = 8;
+
+ os_alloc_mem(pAd, (UCHAR **)&Buf, VarLen);
+
+ Pos = Buf;
+
+ /* Calibration ID */
+ Value = cpu2le32(CalibrationID);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ /* Parameter */
+ Value = cpu2le32(Param);
+ NdisMoveMemory(Pos, &Value, 4);
+ Pos += 4;
+
+ NdisZeroMemory(&CmdUnit, sizeof(CmdUnit));
+
+ CmdUnit.u.ANDES.Type = CMD_CALIBRATION_OP;
+ CmdUnit.u.ANDES.CmdPayloadLen = VarLen;
+ CmdUnit.u.ANDES.CmdPayload = Buf;
+
+ CmdUnit.u.ANDES.NeedRsp = TRUE;
+ CmdUnit.u.ANDES.NeedWait = TRUE;
+ CmdUnit.u.ANDES.Timeout = 0;
+
+ Ret = AsicSendCmdToAndes(pAd, &CmdUnit);
+
+ os_free_mem(NULL, Buf);
+
+ return NDIS_STATUS_SUCCESS;
+}
+
diff --git a/cleopatre/devkit/mt7601udrv/mcu/rtmp_mcu.c b/cleopatre/devkit/mt7601udrv/mcu/rtmp_mcu.c
new file mode 100644
index 0000000000..4359bc312c
--- /dev/null
+++ b/cleopatre/devkit/mt7601udrv/mcu/rtmp_mcu.c
@@ -0,0 +1,77 @@
+/*
+ ***************************************************************************
+ * Ralink Tech Inc.
+ * 4F, No. 2 Technology 5th Rd.
+ * Science-based Industrial Park
+ * Hsin-chu, Taiwan, R.O.C.
+ *
+ * (c) Copyright 2002-2004, Ralink Technology, Inc.
+ *
+ * All rights reserved. Ralink's source code is an unpublished work and the
+ * use of a copyright notice does not imply otherwise. This source code
+ * contains confidential trade secret material of Ralink Tech. Any attemp
+ * or participation in deciphering, decoding, reverse engineering or in any
+ * way altering the source code is stricitly prohibited, unless the prior
+ * written consent of Ralink Technology, Inc. is obtained.
+ ***************************************************************************
+
+ Module Name:
+ rtmp_mcu.c
+
+ Abstract:
+
+ Revision History:
+ Who When What
+ -------- ---------- ----------------------------------------------
+*/
+
+
+#include "rt_config.h"
+
+INT MCUBurstWrite(PRTMP_ADAPTER pAd, UINT32 Offset, UINT32 *Data, UINT32 Cnt)
+{
+ RTUSBMultiWrite_nBytes(pAd, Offset, Data, Cnt * 4, 64);
+}
+
+INT MCURandomWrite(PRTMP_ADAPTER pAd, RTMP_REG_PAIR *RegPair, UINT32 Num)
+{
+ UINT32 Index;
+
+ for (Index = 0; Index < Num; Index++)
+ RTMP_IO_WRITE32(pAd, RegPair->Register, RegPair->Value);
+}
+
+VOID ChipOpsMCUHook(PRTMP_ADAPTER pAd, enum MCU_TYPE MCUType)
+{
+
+ RTMP_CHIP_OP *pChipOps = &pAd->chipOps;
+
+
+ if (MCUType == M8051)
+ {
+ pChipOps->sendCommandToMcu = RtmpAsicSendCommandToMcu;
+ pChipOps->BurstWrite = MCUBurstWrite;
+ pChipOps->RandomWrite = MCURandomWrite;
+ }
+
+#ifdef CONFIG_ANDES_SUPPORT
+ if (MCUType == ANDES)
+ {
+
+#ifdef RTMP_USB_SUPPORT
+ pChipOps->loadFirmware = USBLoadFirmwareToAndes;
+#endif
+ //pChipOps->sendCommandToMcu = AsicSendCmdToAndes;
+ pChipOps->Calibration = AndesCalibrationOP;
+ pChipOps->BurstWrite = AndesBurstWrite;
+ pChipOps->BurstRead = AndesBurstRead;
+ pChipOps->RandomRead = AndesRandomRead;
+ pChipOps->RFRandomRead = AndesRFRandomRead;
+ pChipOps->ReadModifyWrite = AndesReadModifyWrite;
+ pChipOps->RFReadModifyWrite = AndesRFReadModifyWrite;
+ pChipOps->RandomWrite = AndesRandomWrite;
+ pChipOps->RFRandomWrite = AndesRFRandomWrite;
+ pChipOps->PwrSavingOP = AndesPwrSavingOP;
+ }
+#endif
+}