summaryrefslogtreecommitdiff
path: root/cesar/hal
diff options
context:
space:
mode:
authorNicolas Schodet2012-09-28 17:05:50 +0200
committerNicolas Schodet2012-11-30 14:26:54 +0100
commit3b7606680ca85cc52374e2b7fbbc76548bebbe12 (patch)
tree2c5c4af00070d49a323ecdeff64f19cdd68fdc76 /cesar/hal
parenta65e0893141571822627aaf94c28f7e7d489aaca (diff)
cesar/{hal/arch,ecos}: use a faster and smaller ISR lock, closes #3404
Original eCos code used a trap to atomically change PSR. This is not needed on our system as PSR is always restored after an ISR execution, therefore read/modify/write sequence is safe. ET bit is cleared to lock ISR. This is acceptable as: - trap instruction is never used in our code, - on error trap, the CPU will stop, but this is the case yet due to DSU configuration (break on error), - no save or restore is used in flat mode, and therefore no window under/overflow. Clearing ET is simpler and faster. This is actually the solution which is used today on phy VSR which never sets ET.
Diffstat (limited to 'cesar/hal')
-rw-r--r--cesar/hal/arch/inc/ecos.h50
1 files changed, 11 insertions, 39 deletions
diff --git a/cesar/hal/arch/inc/ecos.h b/cesar/hal/arch/inc/ecos.h
index bfb5a1254c..01bb119621 100644
--- a/cesar/hal/arch/inc/ecos.h
+++ b/cesar/hal/arch/inc/ecos.h
@@ -21,41 +21,19 @@
extern inline uint
arch_isr_lock (void)
{
-#ifdef __sparc__
- /* On SPARC, processor stops if traps are disabled. */
- uint lock;
- HAL_QUERY_TRAPS (lock);
-#else
- uint lock = 1;
-#endif
- if (lock)
- {
- uint flags;
- HAL_DISABLE_INTERRUPTS (flags);
- HAL_REORDER_BARRIER ();
- hal_trace_isr_locked (true);
- return flags;
- }
- else
- return 0;
+ uint flags;
+ HAL_DISABLE_INTERRUPTS (flags);
+ HAL_REORDER_BARRIER ();
+ hal_trace_isr_locked (true);
+ return flags;
}
extern inline void
arch_isr_unlock (uint flags)
{
-#ifdef __sparc__
- /* On SPARC, processor stops if traps are disabled. */
- uint unlock;
- HAL_QUERY_TRAPS (unlock);
-#else
- uint unlock = 1;
-#endif
- if (unlock)
- {
- hal_trace_isr_locked (false);
- HAL_RESTORE_INTERRUPTS (flags);
- HAL_REORDER_BARRIER ();
- }
+ hal_trace_isr_locked (false);
+ HAL_RESTORE_INTERRUPTS (flags);
+ HAL_REORDER_BARRIER ();
}
extern inline void
@@ -77,16 +55,10 @@ arch_dsr_unlock (void)
extern inline void
arch_stop (void)
{
-#ifdef __sparc__
- /* On SPARC, processor stops if traps are disabled. */
- uint et;
- HAL_QUERY_TRAPS (et);
- if (et)
- cyg_drv_isr_lock ();
-#else
- cyg_drv_isr_lock ();
-#endif
+ uint flags;
+ HAL_DISABLE_INTERRUPTS (flags);
cyg_drv_dsr_lock ();
+ HAL_REORDER_BARRIER ();
}
#define arch_reorder_barrier HAL_REORDER_BARRIER