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authorschodet2008-11-26 10:13:47 +0000
committerschodet2008-11-26 10:13:47 +0000
commit19d19cfcbd894d2a2fa70d4f730df2856a73b8ac (patch)
tree5be462d225173348fd4fdf8bb67f816dc81aa3ea /cesar/ecos/packages/hal/sparc
parenta4120b78075a99d890605dcfa92a053ff7db98e6 (diff)
* ecos/packages/hal/sparc/leon:
- added support for program in AHB local ram. git-svn-id: svn+ssh://pessac/svn/cesar/trunk@3522 017c9cb6-072f-447c-8318-d5b54f68fe89
Diffstat (limited to 'cesar/ecos/packages/hal/sparc')
-rw-r--r--cesar/ecos/packages/hal/sparc/leon/current/cdl/hal_sparc_leon.cdl13
-rw-r--r--cesar/ecos/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ahbram.h27
-rw-r--r--cesar/ecos/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ahbram.ldi28
3 files changed, 66 insertions, 2 deletions
diff --git a/cesar/ecos/packages/hal/sparc/leon/current/cdl/hal_sparc_leon.cdl b/cesar/ecos/packages/hal/sparc/leon/current/cdl/hal_sparc_leon.cdl
index 2f13423345..1e1dd56821 100644
--- a/cesar/ecos/packages/hal/sparc/leon/current/cdl/hal_sparc_leon.cdl
+++ b/cesar/ecos/packages/hal/sparc/leon/current/cdl/hal_sparc_leon.cdl
@@ -77,6 +77,15 @@ cdl_package CYGPKG_HAL_SPARC_LEON {
description "
When targetting the LEON processor only the RAM startup type
is usable."
+
+ cdl_option CYG_HAL_RAM_MLT {
+ display "Memory layout for RAM Startup"
+ flavor data
+ legal_values {"ram" "ahbram"}
+ default_value {"ram"}
+ description "
+ Select which memory layout to use."
+ }
}
# Real-time clock/counter specifics
@@ -231,7 +240,7 @@ cdl_package CYGPKG_HAL_SPARC_LEON {
flavor data
no_define
define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
- calculated { "<pkgconf/mlt_sparc_leon_ram.ldi>" }
+ calculated { "<pkgconf/mlt_sparc_leon_".get_data(CYG_HAL_RAM_MLT).".ldi>" }
}
cdl_option CYGHWR_MEMORY_LAYOUT_H {
@@ -239,7 +248,7 @@ cdl_package CYGPKG_HAL_SPARC_LEON {
flavor data
no_define
define -file system.h CYGHWR_MEMORY_LAYOUT_H
- calculated { "<pkgconf/mlt_sparc_leon_ram.h>" }
+ calculated { "<pkgconf/mlt_sparc_leon_".get_data(CYG_HAL_RAM_MLT).".h>" }
}
}
}
diff --git a/cesar/ecos/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ahbram.h b/cesar/ecos/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ahbram.h
new file mode 100644
index 0000000000..0a7d67922e
--- /dev/null
+++ b/cesar/ecos/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ahbram.h
@@ -0,0 +1,27 @@
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+
+#endif
+#define CYGMEM_REGION_ram (0x00000000)
+#define CYGMEM_REGION_ram_SIZE (0x04000000)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#define CYGMEM_REGION_ram_nocache (0x40000000)
+#define CYGMEM_REGION_ram_nocache_SIZE (0x04000000)
+#define CYGMEM_REGION_ram_nocache_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#define CYGMEM_REGION_ilram (0x70000000)
+#define CYGMEM_REGION_ilram_SIZE (0x10000)
+#define CYGMEM_REGION_ilram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#define CYGMEM_REGION_dlram (0x71000000)
+#define CYGMEM_REGION_dlram_SIZE (0x10000)
+#define CYGMEM_REGION_dlram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#define CYGMEM_REGION_ahbram (0x60000000)
+#define CYGMEM_REGION_ahbram_SIZE (0x00010000)
+#define CYGMEM_REGION_ahbram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (CYGMEM_REGION_ahbram_SIZE - (size_t) CYG_LABEL_NAME (__heap1))
+
+#define CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
diff --git a/cesar/ecos/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ahbram.ldi b/cesar/ecos/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ahbram.ldi
new file mode 100644
index 0000000000..89c390c8e9
--- /dev/null
+++ b/cesar/ecos/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ahbram.ldi
@@ -0,0 +1,28 @@
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+ ram : ORIGIN = 0x00000000, LENGTH = 0x4000000
+ tclri : ORIGIN = 0x70000000, LENGTH = 0x10000
+ tclrd : ORIGIN = 0x71000000, LENGTH = 0x10000
+ ahbram : ORIGIN = 0x60000000, LENGTH = 0x10000
+}
+
+SECTIONS
+{
+ SECTIONS_BEGIN
+ SECTION_ilram (tclri, 0x70000000, LMA_EQ_VMA)
+ SECTION_dlram (tclrd, 0x71000000, LMA_EQ_VMA)
+ SECTION_rom_vectors (ahbram, 0x60000000, LMA_EQ_VMA)
+ SECTION_text (ahbram, ALIGN (0x1), LMA_EQ_VMA)
+ SECTION_fini (ahbram, ALIGN (0x1), LMA_EQ_VMA)
+ SECTION_rodata (ahbram, ALIGN (0x1), LMA_EQ_VMA)
+ SECTION_rodata1 (ahbram, ALIGN (0x1), LMA_EQ_VMA)
+ SECTION_fixup (ahbram, ALIGN (0x1), LMA_EQ_VMA)
+ SECTION_gcc_except_table (ahbram, ALIGN (0x1), LMA_EQ_VMA)
+ SECTION_data (ahbram, ALIGN (0x1), LMA_EQ_VMA)
+ SECTION_bss (ahbram, ALIGN (0x8) (NOLOAD), LMA_EQ_VMA)
+ SECTION_private (ahbram, ALIGN (0x4), LMA_EQ_VMA)
+ CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+ SECTIONS_END
+}