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authorNicolas Schodet2007-06-30 17:45:54 +0200
committerNicolas Schodet2007-06-30 17:45:54 +0200
commitd578aab00d511d4254ec200558bf2f17db481b73 (patch)
treef907950499429da592e8d5e2137cc7bf6454b382 /digital/asserv/src/hdlcounter/test_counter_top.wave
parent7b17b553ad370dd3a1a957fed8c6b30de410d971 (diff)
Added hdlcounter for CPLD.
Verilog source files and test cases.
Diffstat (limited to 'digital/asserv/src/hdlcounter/test_counter_top.wave')
-rw-r--r--digital/asserv/src/hdlcounter/test_counter_top.wave18
1 files changed, 18 insertions, 0 deletions
diff --git a/digital/asserv/src/hdlcounter/test_counter_top.wave b/digital/asserv/src/hdlcounter/test_counter_top.wave
new file mode 100644
index 00000000..338660ef
--- /dev/null
+++ b/digital/asserv/src/hdlcounter/test_counter_top.wave
@@ -0,0 +1,18 @@
+*-17,989300 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+@28
+test_counter_top.clk
+test_counter_top.rst
+@420
+test_counter_top.countdiv32_0[27:0]
+test_counter_top.countdiv32_1[27:0]
+test_counter_top.countdiv32_2[27:0]
+test_counter_top.countdiv32_3[27:0]
+@28
+test_counter_top.oe
+test_counter_top.sel[1:0]
+@22
+test_counter_top.countout[7:0]
+test_counter_top.uut.count0[7:0]
+test_counter_top.uut.count1[7:0]
+test_counter_top.uut.count2[7:0]
+test_counter_top.uut.count3[7:0]